c779a6c9d3e340022a9252a806960ddc409e9b72 - llvm-project/llvm

commit	c779a6c9d3e340022a9252a806960ddc409e9b72	[log] [tgz]
author	Alex Bradbury <asb@igalia.com>	Sun Oct 01 09:59:52 2023 +0100
committer	Copybara-Service <copybara-worker@google.com>	Sun Oct 01 02:06:56 2023 -0700
tree	d5305ff9d804f682e743bef31f02b41f1ca4a218
parent	df211bc0eec9bc344c21faf55103e8ab7ebb309a [diff]

[RISCV][MC] Fix all remaining fcvt instructions that didn't accept rounding mode but should have (#67889)

This is a follow-up to #67555, performing the same fix for the other
instructions that had this issue:
* fcvt.d.w
* fcvt.d.wu
* fcvt.s.h
* fcvt.d.h

As before, we stick to the 'rne' default because this gives maximum
compatibility with older LLVM and GNU tools when disassembling. I've
also double checked disassembling fp-default-rounding-mode.s with GNU
objdump to re-confirm it uses frm=0b000 for these instructions.

GitOrigin-RevId: bf94ba39b65d1212ea84d5783b393280e1ce7478

lib/Target/RISCV/RISCVInstrInfoD.td[diff]
lib/Target/RISCV/RISCVInstrInfoZfh.td[diff]
test/MC/RISCV/fp-default-rounding-mode.s[diff]
test/MC/RISCV/fp-inx-default-rounding-mode.s[diff]
test/MC/RISCV/rv32d-valid.s[diff]
test/MC/RISCV/rv32zdinx-valid.s[diff]
test/MC/RISCV/rv32zfhmin-valid.s[diff]
test/MC/RISCV/rv32zhinxmin-valid.s[diff]
test/MC/RISCV/rv64zhinxmin-valid.s[diff]

9 files changed

tree: d5305ff9d804f682e743bef31f02b41f1ca4a218