test/Transforms/IRCE/iv-for-another-loop.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=irce -irce-print-changed-loops=true < %s | FileCheck %s

target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
target triple = "x86_64-unknown-linux-gnu"

; REQUIRES: asserts

define void @test() {
; CHECK-LABEL: @test(
; CHECK-NEXT:  bb:
; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
; CHECK:       outer_latch:
; CHECK-NEXT:    [[TMP:%.*]] = or i32 [[TMP5:%.*]], 1
; CHECK-NEXT:    [[TMP2:%.*]] = add nuw nsw i32 [[TMP5]], 1
; CHECK-NEXT:    [[TMP3:%.*]] = icmp eq i32 [[TMP8:%.*]], 0
; CHECK-NEXT:    br i1 [[TMP3]], label [[RET2:%.*]], label [[OUTER_HEADER]]
; CHECK:       outer_header:
; CHECK-NEXT:    [[TMP5]] = phi i32 [ 0, [[BB:%.*]] ], [ [[TMP2]], [[OUTER_LATCH:%.*]] ]
; CHECK-NEXT:    br label [[INNER_HEADER:%.*]]
; CHECK:       inner_exit:
; CHECK-NEXT:    [[TMP12_LCSSA:%.*]] = phi i32 [ [[TMP12:%.*]], [[INNER_HEADER]] ]
; CHECK-NEXT:    [[TMP7:%.*]] = or i32 [[TMP12_LCSSA]], [[TMP5]]
; CHECK-NEXT:    [[TMP8]] = add nuw i32 [[TMP12_LCSSA]], [[TMP5]]
; CHECK-NEXT:    [[TMP9:%.*]] = icmp ult i32 [[TMP5]], 0
; CHECK-NEXT:    br i1 [[TMP9]], label [[OUTER_LATCH]], label [[RET1:%.*]]
; CHECK:       ret1:
; CHECK-NEXT:    ret void
; CHECK:       inner_header:
; CHECK-NEXT:    [[TMP12]] = phi i32 [ [[TMP14:%.*]], [[INNER_HEADER]] ], [ 0, [[OUTER_HEADER]] ]
; CHECK-NEXT:    [[TMP13:%.*]] = or i32 [[TMP12]], 1
; CHECK-NEXT:    [[TMP14]] = add nuw nsw i32 [[TMP12]], 1
; CHECK-NEXT:    br i1 true, label [[INNER_EXIT:%.*]], label [[INNER_HEADER]]
; CHECK:       ret2:
; CHECK-NEXT:    ret void
;
bb:
  br label %outer_header

outer_latch:                                      ; preds = %inner_exit
  %tmp = or i32 %tmp5, 1
  %tmp2 = add nuw nsw i32 %tmp5, 1
  %tmp3 = icmp eq i32 %tmp8, 0
  br i1 %tmp3, label %ret2, label %outer_header

outer_header:                                     ; preds = %outer_latch, %bb
  %tmp5 = phi i32 [ 0, %bb ], [ %tmp2, %outer_latch ]
  br label %inner_header

inner_exit:                                       ; preds = %inner_header
  %tmp12.lcssa = phi i32 [ %tmp12, %inner_header ]
  %tmp7 = or i32 %tmp12.lcssa, %tmp5
  %tmp8 = add nuw i32 %tmp12.lcssa, %tmp5
  %tmp9 = icmp ult i32 %tmp5, 0
  br i1 %tmp9, label %outer_latch, label %ret1

ret1:                                             ; preds = %inner_exit
  ret void

inner_header:                                     ; preds = %inner_header, %outer_header
  %tmp12 = phi i32 [ %tmp14, %inner_header ], [ 0, %outer_header ]
  %tmp13 = or i32 %tmp12, 1
  %tmp14 = add nuw nsw i32 %tmp12, 1
  br i1 true, label %inner_exit, label %inner_header

ret2:                                             ; preds = %outer_latch
  ret void
}