diff --git a/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td b/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
index a98bb0f..ea0e5f1 100644
--- a/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
+++ b/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
@@ -65,7 +65,7 @@
             (store_instr reg_class:$rs2, BaseAddr:$rs1, avl, sew)>;
 }
 
-multiclass VPatUSLoadStoreWholeVRSDNode<LLVMType type,
+multiclass VPatUSLoadStoreWholeVRSDNode<ValueType type,
                                         int sew,
                                         LMULInfo vlmul,
                                         VReg reg_class>