test/CodeGen/ARM/pr42062.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -o - %s 2>&1 | FileCheck %s --implicit-check-not=error
target triple = "thumbv8m.base-arm-none-eabi"
@foo = external global i8
declare i32 @bar(i8* nocapture, i32, i32, i8* nocapture)

define void @food(i8* %a) #0 {
; CHECK-LABEL: food:
; CHECK:    mov [[ARG0:r[4-7]]], r0
; CHECK-NEXT:    movs r1, #8
; CHECK-NEXT:    movs r2, #1
; CHECK-NEXT:    ldr [[FOO_R:r[4-7]]], [[FOO_ADDR:\..*]]
; CHECK-NEXT:    ldr [[BAR_R:r[4-7]]], [[BAR_ADDR:\..*]]
; CHECK-NEXT:    mov r3, [[FOO_R]]
; CHECK-NEXT:    blx [[BAR_R]]
; CHECK-NEXT:    movs r1, #9
; CHECK-NEXT:    movs r2, #0
; CHECK-NEXT:    mov r0, [[ARG0]]
; CHECK-NEXT:    mov r3, [[FOO_R]]
; CHECK-NEXT:    blx [[BAR_R]]
; CHECK-NEXT:    movs r1, #7
; CHECK-NEXT:    movs r2, #2
; CHECK-NEXT:    mov r0, [[ARG0]]
; CHECK-NEXT:    mov r3, [[FOO_R]]
; CHECK-NEXT:    blx [[BAR_R]]
; CHECK-NEXT:    pop {r4, r5, r6, pc}
; CHECK:         [[FOO_ADDR]]:
; CHECK-NEXT:    .long foo
; CHECK:         [[BAR_ADDR]]:
; CHECK-NEXT:    .long bar
entry:
  %0 = tail call i32 @bar(i8* %a, i32 8, i32 1, i8* nonnull @foo)
  %1 = tail call i32 @bar(i8* %a, i32 9, i32 0, i8* nonnull @foo)
  %2 = tail call i32 @bar(i8* %a, i32 7, i32 2, i8* nonnull @foo)
  ret void
}
attributes #0 = { minsize "target-cpu"="cortex-m23" }