| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=si-late-branch-lowering -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX10 %s |
| |
| --- | |
| define amdgpu_ps void @early_term_scc0_end_block() { |
| ret void |
| } |
| |
| define amdgpu_ps void @early_term_scc0_next_terminator() { |
| ret void |
| } |
| |
| define amdgpu_ps void @early_term_scc0_in_block() { |
| ret void |
| } |
| |
| define amdgpu_gs void @early_term_scc0_gs() { |
| ret void |
| } |
| |
| define amdgpu_cs void @early_term_scc0_cs() { |
| ret void |
| } |
| ... |
| |
| --- |
| name: early_term_scc0_end_block |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$sgpr0' } |
| - { reg: '$sgpr1' } |
| body: | |
| ; GFX10-LABEL: name: early_term_scc0_end_block |
| ; GFX10: bb.0: |
| ; GFX10: successors: %bb.1(0x80000000), %bb.2(0x00000000) |
| ; GFX10: liveins: $sgpr0, $sgpr1 |
| ; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| ; GFX10: S_CBRANCH_SCC0 %bb.2, implicit $scc |
| ; GFX10: bb.1: |
| ; GFX10: liveins: $vgpr0 |
| ; GFX10: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec |
| ; GFX10: S_ENDPGM 0 |
| ; GFX10: bb.2: |
| ; GFX10: $exec_lo = S_MOV_B32 0 |
| ; GFX10: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec |
| ; GFX10: S_ENDPGM 0 |
| bb.0: |
| liveins: $sgpr0, $sgpr1 |
| successors: %bb.1 |
| |
| $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec |
| |
| bb.1: |
| liveins: $vgpr0 |
| EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: early_term_scc0_next_terminator |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$sgpr0' } |
| - { reg: '$sgpr1' } |
| body: | |
| ; GFX10-LABEL: name: early_term_scc0_next_terminator |
| ; GFX10: bb.0: |
| ; GFX10: successors: %bb.2(0x80000000), %bb.3(0x00000000) |
| ; GFX10: liveins: $sgpr0, $sgpr1 |
| ; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| ; GFX10: S_CBRANCH_SCC0 %bb.3, implicit $scc |
| ; GFX10: S_BRANCH %bb.2 |
| ; GFX10: bb.1: |
| ; GFX10: successors: %bb.2(0x80000000) |
| ; GFX10: $vgpr0 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX10: bb.2: |
| ; GFX10: liveins: $vgpr0 |
| ; GFX10: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec |
| ; GFX10: S_ENDPGM 0 |
| ; GFX10: bb.3: |
| ; GFX10: $exec_lo = S_MOV_B32 0 |
| ; GFX10: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec |
| ; GFX10: S_ENDPGM 0 |
| bb.0: |
| liveins: $sgpr0, $sgpr1 |
| successors: %bb.2 |
| |
| $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| $vgpr0 = V_MOV_B32_e32 1, implicit $exec |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| liveins: $vgpr0 |
| EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: early_term_scc0_in_block |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$sgpr0' } |
| - { reg: '$sgpr1' } |
| body: | |
| ; GFX10-LABEL: name: early_term_scc0_in_block |
| ; GFX10: bb.0: |
| ; GFX10: successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| ; GFX10: liveins: $sgpr0, $sgpr1 |
| ; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| ; GFX10: S_CBRANCH_SCC0 %bb.2, implicit $scc |
| ; GFX10: bb.3: |
| ; GFX10: successors: %bb.1(0x80000000) |
| ; GFX10: liveins: $vgpr0, $scc |
| ; GFX10: $vgpr1 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX10: bb.1: |
| ; GFX10: liveins: $vgpr0, $vgpr1 |
| ; GFX10: EXP 1, $vgpr1, $vgpr1, $vgpr1, $vgpr1, -1, -1, 15, implicit $exec |
| ; GFX10: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec |
| ; GFX10: S_ENDPGM 0 |
| ; GFX10: bb.2: |
| ; GFX10: $exec_lo = S_MOV_B32 0 |
| ; GFX10: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec |
| ; GFX10: S_ENDPGM 0 |
| bb.0: |
| liveins: $sgpr0, $sgpr1 |
| successors: %bb.1 |
| |
| $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec |
| $vgpr1 = V_MOV_B32_e32 1, implicit $exec |
| |
| bb.1: |
| liveins: $vgpr0, $vgpr1 |
| EXP 1, $vgpr1, $vgpr1, $vgpr1, $vgpr1, -1, -1, 15, implicit $exec |
| EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: early_term_scc0_gs |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$sgpr0' } |
| - { reg: '$sgpr1' } |
| body: | |
| ; GFX10-LABEL: name: early_term_scc0_gs |
| ; GFX10: bb.0: |
| ; GFX10: successors: %bb.1(0x80000000) |
| ; GFX10: liveins: $sgpr0, $sgpr1 |
| ; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| ; GFX10: bb.1: |
| ; GFX10: liveins: $vgpr0 |
| ; GFX10: S_ENDPGM 0 |
| bb.0: |
| liveins: $sgpr0, $sgpr1 |
| successors: %bb.1 |
| |
| $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec |
| |
| bb.1: |
| liveins: $vgpr0 |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: early_term_scc0_cs |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$sgpr0' } |
| - { reg: '$sgpr1' } |
| body: | |
| ; GFX10-LABEL: name: early_term_scc0_cs |
| ; GFX10: bb.0: |
| ; GFX10: successors: %bb.1(0x80000000), %bb.2(0x00000000) |
| ; GFX10: liveins: $sgpr0, $sgpr1 |
| ; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX10: dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| ; GFX10: S_CBRANCH_SCC0 %bb.2, implicit $scc |
| ; GFX10: bb.1: |
| ; GFX10: liveins: $vgpr0 |
| ; GFX10: S_ENDPGM 0 |
| ; GFX10: bb.2: |
| ; GFX10: $exec_lo = S_MOV_B32 0 |
| ; GFX10: S_ENDPGM 0 |
| bb.0: |
| liveins: $sgpr0, $sgpr1 |
| successors: %bb.1 |
| |
| $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| dead $sgpr0 = S_AND_B32 $sgpr0, killed $sgpr1, implicit-def $scc |
| SI_EARLY_TERMINATE_SCC0 implicit $scc, implicit $exec |
| |
| bb.1: |
| liveins: $vgpr0 |
| S_ENDPGM 0 |
| ... |