| // RUN: llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s |
| |
| s_add_u32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x05,0x80] |
| |
| s_add_u32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0x65,0x80] |
| |
| s_add_u32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x66,0x80] |
| |
| s_add_u32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x67,0x80] |
| |
| s_add_u32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6a,0x80] |
| |
| s_add_u32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6b,0x80] |
| |
| s_add_u32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6c,0x80] |
| |
| s_add_u32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6d,0x80] |
| |
| s_add_u32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6e,0x80] |
| |
| s_add_u32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6f,0x80] |
| |
| s_add_u32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0x7b,0x80] |
| |
| s_add_u32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0x7c,0x80] |
| |
| s_add_u32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x7e,0x80] |
| |
| s_add_u32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x7f,0x80] |
| |
| s_add_u32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x05,0x80] |
| |
| s_add_u32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x05,0x80] |
| |
| s_add_u32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x05,0x80] |
| |
| s_add_u32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x05,0x80] |
| |
| s_add_u32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x05,0x80] |
| |
| s_add_u32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x05,0x80] |
| |
| s_add_u32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x05,0x80] |
| |
| s_add_u32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x05,0x80] |
| |
| s_add_u32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x05,0x80] |
| |
| s_add_u32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x05,0x80] |
| |
| s_add_u32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x05,0x80] |
| |
| s_add_u32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x05,0x80] |
| |
| s_add_u32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x05,0x80] |
| |
| s_add_u32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x05,0x80] |
| |
| s_add_u32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x05,0x80] |
| |
| s_add_u32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x05,0x80] |
| |
| s_add_u32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x05,0x80] |
| |
| s_add_u32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x05,0x80] |
| |
| s_add_u32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x05,0x80] |
| |
| s_add_u32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x05,0x80] |
| |
| s_add_u32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x05,0x80,0x56,0x34,0x12,0xaf] |
| |
| s_add_u32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x05,0x80,0x73,0x72,0x71,0x3f] |
| |
| s_add_u32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x05,0x80] |
| |
| s_add_u32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x05,0x80] |
| |
| s_add_u32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x05,0x80] |
| |
| s_add_u32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x05,0x80] |
| |
| s_add_u32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x05,0x80] |
| |
| s_add_u32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x05,0x80] |
| |
| s_add_u32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x05,0x80] |
| |
| s_add_u32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x05,0x80] |
| |
| s_add_u32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x05,0x80] |
| |
| s_add_u32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x05,0x80] |
| |
| s_add_u32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x05,0x80] |
| |
| s_add_u32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x05,0x80] |
| |
| s_add_u32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x05,0x80] |
| |
| s_add_u32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x05,0x80] |
| |
| s_add_u32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x05,0x80] |
| |
| s_add_u32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x05,0x80] |
| |
| s_add_u32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x05,0x80] |
| |
| s_add_u32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x05,0x80] |
| |
| s_add_u32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x05,0x80] |
| |
| s_add_u32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x05,0x80] |
| |
| s_add_u32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x05,0x80,0x56,0x34,0x12,0xaf] |
| |
| s_add_u32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x05,0x80,0x73,0x72,0x71,0x3f] |
| |
| s_sub_u32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x85,0x80] |
| |
| s_sub_u32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0xe5,0x80] |
| |
| s_sub_u32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xe6,0x80] |
| |
| s_sub_u32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xe7,0x80] |
| |
| s_sub_u32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xea,0x80] |
| |
| s_sub_u32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xeb,0x80] |
| |
| s_sub_u32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xec,0x80] |
| |
| s_sub_u32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xed,0x80] |
| |
| s_sub_u32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xee,0x80] |
| |
| s_sub_u32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xef,0x80] |
| |
| s_sub_u32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0xfb,0x80] |
| |
| s_sub_u32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0xfc,0x80] |
| |
| s_sub_u32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xfe,0x80] |
| |
| s_sub_u32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xff,0x80] |
| |
| s_sub_u32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x85,0x80] |
| |
| s_sub_u32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x85,0x80,0x56,0x34,0x12,0xaf] |
| |
| s_sub_u32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x85,0x80,0x73,0x72,0x71,0x3f] |
| |
| s_sub_u32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x85,0x80] |
| |
| s_sub_u32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x85,0x80] |
| |
| s_sub_u32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x85,0x80] |
| |
| s_sub_u32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x85,0x80] |
| |
| s_sub_u32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x85,0x80] |
| |
| s_sub_u32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x85,0x80] |
| |
| s_sub_u32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x85,0x80] |
| |
| s_sub_u32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x85,0x80] |
| |
| s_sub_u32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x85,0x80] |
| |
| s_sub_u32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x85,0x80] |
| |
| s_sub_u32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x85,0x80] |
| |
| s_sub_u32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x85,0x80] |
| |
| s_sub_u32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x85,0x80] |
| |
| s_sub_u32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x85,0x80] |
| |
| s_sub_u32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x85,0x80] |
| |
| s_sub_u32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x85,0x80] |
| |
| s_sub_u32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x85,0x80] |
| |
| s_sub_u32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x85,0x80] |
| |
| s_sub_u32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x85,0x80] |
| |
| s_sub_u32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x85,0x80] |
| |
| s_sub_u32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x85,0x80,0x56,0x34,0x12,0xaf] |
| |
| s_sub_u32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x85,0x80,0x73,0x72,0x71,0x3f] |
| |
| s_add_i32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x05,0x81] |
| |
| s_add_i32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0x65,0x81] |
| |
| s_add_i32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x66,0x81] |
| |
| s_add_i32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x67,0x81] |
| |
| s_add_i32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6a,0x81] |
| |
| s_add_i32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6b,0x81] |
| |
| s_add_i32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6c,0x81] |
| |
| s_add_i32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6d,0x81] |
| |
| s_add_i32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6e,0x81] |
| |
| s_add_i32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6f,0x81] |
| |
| s_add_i32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0x7b,0x81] |
| |
| s_add_i32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0x7c,0x81] |
| |
| s_add_i32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x7e,0x81] |
| |
| s_add_i32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x7f,0x81] |
| |
| s_add_i32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x05,0x81] |
| |
| s_add_i32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x05,0x81] |
| |
| s_add_i32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x05,0x81] |
| |
| s_add_i32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x05,0x81] |
| |
| s_add_i32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x05,0x81] |
| |
| s_add_i32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x05,0x81] |
| |
| s_add_i32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x05,0x81] |
| |
| s_add_i32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x05,0x81] |
| |
| s_add_i32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x05,0x81] |
| |
| s_add_i32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x05,0x81] |
| |
| s_add_i32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x05,0x81] |
| |
| s_add_i32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x05,0x81] |
| |
| s_add_i32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x05,0x81] |
| |
| s_add_i32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x05,0x81] |
| |
| s_add_i32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x05,0x81] |
| |
| s_add_i32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x05,0x81] |
| |
| s_add_i32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x05,0x81] |
| |
| s_add_i32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x05,0x81] |
| |
| s_add_i32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x05,0x81] |
| |
| s_add_i32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x05,0x81] |
| |
| s_add_i32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x05,0x81,0x56,0x34,0x12,0xaf] |
| |
| s_add_i32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x05,0x81,0x73,0x72,0x71,0x3f] |
| |
| s_add_i32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x05,0x81] |
| |
| s_add_i32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x05,0x81] |
| |
| s_add_i32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x05,0x81] |
| |
| s_add_i32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x05,0x81] |
| |
| s_add_i32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x05,0x81] |
| |
| s_add_i32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x05,0x81] |
| |
| s_add_i32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x05,0x81] |
| |
| s_add_i32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x05,0x81] |
| |
| s_add_i32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x05,0x81] |
| |
| s_add_i32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x05,0x81] |
| |
| s_add_i32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x05,0x81] |
| |
| s_add_i32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x05,0x81] |
| |
| s_add_i32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x05,0x81] |
| |
| s_add_i32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x05,0x81] |
| |
| s_add_i32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x05,0x81] |
| |
| s_add_i32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x05,0x81] |
| |
| s_add_i32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x05,0x81] |
| |
| s_add_i32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x05,0x81] |
| |
| s_add_i32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x05,0x81] |
| |
| s_add_i32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x05,0x81] |
| |
| s_add_i32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x05,0x81,0x56,0x34,0x12,0xaf] |
| |
| s_add_i32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x05,0x81,0x73,0x72,0x71,0x3f] |
| |
| s_sub_i32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x85,0x81] |
| |
| s_sub_i32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0xe5,0x81] |
| |
| s_sub_i32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xe6,0x81] |
| |
| s_sub_i32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xe7,0x81] |
| |
| s_sub_i32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xea,0x81] |
| |
| s_sub_i32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xeb,0x81] |
| |
| s_sub_i32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xec,0x81] |
| |
| s_sub_i32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xed,0x81] |
| |
| s_sub_i32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xee,0x81] |
| |
| s_sub_i32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xef,0x81] |
| |
| s_sub_i32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0xfb,0x81] |
| |
| s_sub_i32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0xfc,0x81] |
| |
| s_sub_i32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xfe,0x81] |
| |
| s_sub_i32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xff,0x81] |
| |
| s_sub_i32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x85,0x81] |
| |
| s_sub_i32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x85,0x81,0x56,0x34,0x12,0xaf] |
| |
| s_sub_i32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x85,0x81,0x73,0x72,0x71,0x3f] |
| |
| s_sub_i32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x85,0x81] |
| |
| s_sub_i32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x85,0x81] |
| |
| s_sub_i32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x85,0x81] |
| |
| s_sub_i32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x85,0x81] |
| |
| s_sub_i32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x85,0x81] |
| |
| s_sub_i32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x85,0x81] |
| |
| s_sub_i32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x85,0x81] |
| |
| s_sub_i32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x85,0x81] |
| |
| s_sub_i32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x85,0x81] |
| |
| s_sub_i32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x85,0x81] |
| |
| s_sub_i32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x85,0x81] |
| |
| s_sub_i32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x85,0x81] |
| |
| s_sub_i32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x85,0x81] |
| |
| s_sub_i32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x85,0x81] |
| |
| s_sub_i32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x85,0x81] |
| |
| s_sub_i32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x85,0x81] |
| |
| s_sub_i32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x85,0x81] |
| |
| s_sub_i32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x85,0x81] |
| |
| s_sub_i32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x85,0x81] |
| |
| s_sub_i32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x85,0x81] |
| |
| s_sub_i32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x85,0x81,0x56,0x34,0x12,0xaf] |
| |
| s_sub_i32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x85,0x81,0x73,0x72,0x71,0x3f] |
| |
| s_addc_u32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x05,0x82] |
| |
| s_addc_u32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0x65,0x82] |
| |
| s_addc_u32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x66,0x82] |
| |
| s_addc_u32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x67,0x82] |
| |
| s_addc_u32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6a,0x82] |
| |
| s_addc_u32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6b,0x82] |
| |
| s_addc_u32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6c,0x82] |
| |
| s_addc_u32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6d,0x82] |
| |
| s_addc_u32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6e,0x82] |
| |
| s_addc_u32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6f,0x82] |
| |
| s_addc_u32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0x7b,0x82] |
| |
| s_addc_u32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0x7c,0x82] |
| |
| s_addc_u32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x7e,0x82] |
| |
| s_addc_u32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x7f,0x82] |
| |
| s_addc_u32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x05,0x82] |
| |
| s_addc_u32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x05,0x82,0x56,0x34,0x12,0xaf] |
| |
| s_addc_u32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x05,0x82,0x73,0x72,0x71,0x3f] |
| |
| s_addc_u32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x05,0x82] |
| |
| s_addc_u32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x05,0x82] |
| |
| s_addc_u32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x05,0x82] |
| |
| s_addc_u32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x05,0x82] |
| |
| s_addc_u32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x05,0x82] |
| |
| s_addc_u32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x05,0x82] |
| |
| s_addc_u32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x05,0x82] |
| |
| s_addc_u32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x05,0x82] |
| |
| s_addc_u32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x05,0x82] |
| |
| s_addc_u32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x05,0x82] |
| |
| s_addc_u32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x05,0x82] |
| |
| s_addc_u32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x05,0x82] |
| |
| s_addc_u32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x05,0x82] |
| |
| s_addc_u32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x05,0x82] |
| |
| s_addc_u32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x05,0x82] |
| |
| s_addc_u32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x05,0x82] |
| |
| s_addc_u32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x05,0x82] |
| |
| s_addc_u32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x05,0x82] |
| |
| s_addc_u32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x05,0x82] |
| |
| s_addc_u32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x05,0x82] |
| |
| s_addc_u32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x05,0x82,0x56,0x34,0x12,0xaf] |
| |
| s_addc_u32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x05,0x82,0x73,0x72,0x71,0x3f] |
| |
| s_subb_u32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x85,0x82] |
| |
| s_subb_u32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0xe5,0x82] |
| |
| s_subb_u32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xe6,0x82] |
| |
| s_subb_u32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xe7,0x82] |
| |
| s_subb_u32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xea,0x82] |
| |
| s_subb_u32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xeb,0x82] |
| |
| s_subb_u32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xec,0x82] |
| |
| s_subb_u32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xed,0x82] |
| |
| s_subb_u32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xee,0x82] |
| |
| s_subb_u32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xef,0x82] |
| |
| s_subb_u32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0xfb,0x82] |
| |
| s_subb_u32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0xfc,0x82] |
| |
| s_subb_u32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xfe,0x82] |
| |
| s_subb_u32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xff,0x82] |
| |
| s_subb_u32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x85,0x82] |
| |
| s_subb_u32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x85,0x82,0x56,0x34,0x12,0xaf] |
| |
| s_subb_u32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x85,0x82,0x73,0x72,0x71,0x3f] |
| |
| s_subb_u32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x85,0x82] |
| |
| s_subb_u32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x85,0x82] |
| |
| s_subb_u32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x85,0x82] |
| |
| s_subb_u32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x85,0x82] |
| |
| s_subb_u32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x85,0x82] |
| |
| s_subb_u32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x85,0x82] |
| |
| s_subb_u32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x85,0x82] |
| |
| s_subb_u32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x85,0x82] |
| |
| s_subb_u32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x85,0x82] |
| |
| s_subb_u32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x85,0x82] |
| |
| s_subb_u32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x85,0x82] |
| |
| s_subb_u32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x85,0x82] |
| |
| s_subb_u32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x85,0x82] |
| |
| s_subb_u32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x85,0x82] |
| |
| s_subb_u32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x85,0x82] |
| |
| s_subb_u32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x85,0x82] |
| |
| s_subb_u32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x85,0x82] |
| |
| s_subb_u32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x85,0x82] |
| |
| s_subb_u32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x85,0x82] |
| |
| s_subb_u32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x85,0x82] |
| |
| s_subb_u32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x85,0x82,0x56,0x34,0x12,0xaf] |
| |
| s_subb_u32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x85,0x82,0x73,0x72,0x71,0x3f] |
| |
| s_min_i32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x05,0x83] |
| |
| s_min_i32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0x65,0x83] |
| |
| s_min_i32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x66,0x83] |
| |
| s_min_i32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x67,0x83] |
| |
| s_min_i32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6a,0x83] |
| |
| s_min_i32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6b,0x83] |
| |
| s_min_i32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6c,0x83] |
| |
| s_min_i32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6d,0x83] |
| |
| s_min_i32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6e,0x83] |
| |
| s_min_i32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6f,0x83] |
| |
| s_min_i32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0x7b,0x83] |
| |
| s_min_i32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0x7c,0x83] |
| |
| s_min_i32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x7e,0x83] |
| |
| s_min_i32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x7f,0x83] |
| |
| s_min_i32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x05,0x83] |
| |
| s_min_i32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x05,0x83] |
| |
| s_min_i32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x05,0x83] |
| |
| s_min_i32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x05,0x83] |
| |
| s_min_i32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x05,0x83] |
| |
| s_min_i32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x05,0x83] |
| |
| s_min_i32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x05,0x83] |
| |
| s_min_i32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x05,0x83] |
| |
| s_min_i32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x05,0x83] |
| |
| s_min_i32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x05,0x83] |
| |
| s_min_i32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x05,0x83] |
| |
| s_min_i32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x05,0x83] |
| |
| s_min_i32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x05,0x83] |
| |
| s_min_i32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x05,0x83] |
| |
| s_min_i32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x05,0x83] |
| |
| s_min_i32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x05,0x83] |
| |
| s_min_i32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x05,0x83] |
| |
| s_min_i32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x05,0x83] |
| |
| s_min_i32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x05,0x83] |
| |
| s_min_i32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x05,0x83] |
| |
| s_min_i32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x05,0x83,0x56,0x34,0x12,0xaf] |
| |
| s_min_i32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x05,0x83,0x73,0x72,0x71,0x3f] |
| |
| s_min_i32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x05,0x83] |
| |
| s_min_i32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x05,0x83] |
| |
| s_min_i32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x05,0x83] |
| |
| s_min_i32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x05,0x83] |
| |
| s_min_i32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x05,0x83] |
| |
| s_min_i32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x05,0x83] |
| |
| s_min_i32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x05,0x83] |
| |
| s_min_i32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x05,0x83] |
| |
| s_min_i32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x05,0x83] |
| |
| s_min_i32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x05,0x83] |
| |
| s_min_i32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x05,0x83] |
| |
| s_min_i32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x05,0x83] |
| |
| s_min_i32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x05,0x83] |
| |
| s_min_i32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x05,0x83] |
| |
| s_min_i32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x05,0x83] |
| |
| s_min_i32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x05,0x83] |
| |
| s_min_i32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x05,0x83] |
| |
| s_min_i32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x05,0x83] |
| |
| s_min_i32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x05,0x83] |
| |
| s_min_i32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x05,0x83] |
| |
| s_min_i32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x05,0x83,0x56,0x34,0x12,0xaf] |
| |
| s_min_i32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x05,0x83,0x73,0x72,0x71,0x3f] |
| |
| s_min_u32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x85,0x83] |
| |
| s_min_u32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0xe5,0x83] |
| |
| s_min_u32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xe6,0x83] |
| |
| s_min_u32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xe7,0x83] |
| |
| s_min_u32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xea,0x83] |
| |
| s_min_u32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xeb,0x83] |
| |
| s_min_u32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xec,0x83] |
| |
| s_min_u32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xed,0x83] |
| |
| s_min_u32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xee,0x83] |
| |
| s_min_u32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xef,0x83] |
| |
| s_min_u32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0xfb,0x83] |
| |
| s_min_u32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0xfc,0x83] |
| |
| s_min_u32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xfe,0x83] |
| |
| s_min_u32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xff,0x83] |
| |
| s_min_u32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x85,0x83] |
| |
| s_min_u32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x85,0x83] |
| |
| s_min_u32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x85,0x83] |
| |
| s_min_u32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x85,0x83] |
| |
| s_min_u32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x85,0x83] |
| |
| s_min_u32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x85,0x83] |
| |
| s_min_u32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x85,0x83] |
| |
| s_min_u32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x85,0x83] |
| |
| s_min_u32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x85,0x83] |
| |
| s_min_u32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x85,0x83] |
| |
| s_min_u32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x85,0x83] |
| |
| s_min_u32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x85,0x83] |
| |
| s_min_u32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x85,0x83] |
| |
| s_min_u32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x85,0x83] |
| |
| s_min_u32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x85,0x83] |
| |
| s_min_u32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x85,0x83] |
| |
| s_min_u32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x85,0x83] |
| |
| s_min_u32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x85,0x83] |
| |
| s_min_u32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x85,0x83] |
| |
| s_min_u32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x85,0x83] |
| |
| s_min_u32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x85,0x83,0x56,0x34,0x12,0xaf] |
| |
| s_min_u32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x85,0x83,0x73,0x72,0x71,0x3f] |
| |
| s_min_u32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x85,0x83] |
| |
| s_min_u32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x85,0x83] |
| |
| s_min_u32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x85,0x83] |
| |
| s_min_u32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x85,0x83] |
| |
| s_min_u32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x85,0x83] |
| |
| s_min_u32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x85,0x83] |
| |
| s_min_u32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x85,0x83] |
| |
| s_min_u32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x85,0x83] |
| |
| s_min_u32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x85,0x83] |
| |
| s_min_u32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x85,0x83] |
| |
| s_min_u32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x85,0x83] |
| |
| s_min_u32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x85,0x83] |
| |
| s_min_u32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x85,0x83] |
| |
| s_min_u32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x85,0x83] |
| |
| s_min_u32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x85,0x83] |
| |
| s_min_u32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x85,0x83] |
| |
| s_min_u32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x85,0x83] |
| |
| s_min_u32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x85,0x83] |
| |
| s_min_u32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x85,0x83] |
| |
| s_min_u32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x85,0x83] |
| |
| s_min_u32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x85,0x83,0x56,0x34,0x12,0xaf] |
| |
| s_min_u32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x85,0x83,0x73,0x72,0x71,0x3f] |
| |
| s_max_i32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x05,0x84] |
| |
| s_max_i32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0x65,0x84] |
| |
| s_max_i32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x66,0x84] |
| |
| s_max_i32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x67,0x84] |
| |
| s_max_i32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6a,0x84] |
| |
| s_max_i32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6b,0x84] |
| |
| s_max_i32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6c,0x84] |
| |
| s_max_i32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6d,0x84] |
| |
| s_max_i32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6e,0x84] |
| |
| s_max_i32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6f,0x84] |
| |
| s_max_i32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0x7b,0x84] |
| |
| s_max_i32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0x7c,0x84] |
| |
| s_max_i32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x7e,0x84] |
| |
| s_max_i32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x7f,0x84] |
| |
| s_max_i32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x05,0x84] |
| |
| s_max_i32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x05,0x84] |
| |
| s_max_i32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x05,0x84] |
| |
| s_max_i32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x05,0x84] |
| |
| s_max_i32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x05,0x84] |
| |
| s_max_i32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x05,0x84] |
| |
| s_max_i32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x05,0x84] |
| |
| s_max_i32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x05,0x84] |
| |
| s_max_i32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x05,0x84] |
| |
| s_max_i32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x05,0x84] |
| |
| s_max_i32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x05,0x84] |
| |
| s_max_i32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x05,0x84] |
| |
| s_max_i32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x05,0x84] |
| |
| s_max_i32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x05,0x84] |
| |
| s_max_i32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x05,0x84] |
| |
| s_max_i32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x05,0x84] |
| |
| s_max_i32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x05,0x84] |
| |
| s_max_i32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x05,0x84] |
| |
| s_max_i32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x05,0x84] |
| |
| s_max_i32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x05,0x84] |
| |
| s_max_i32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x05,0x84,0x56,0x34,0x12,0xaf] |
| |
| s_max_i32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x05,0x84,0x73,0x72,0x71,0x3f] |
| |
| s_max_i32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x05,0x84] |
| |
| s_max_i32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x05,0x84] |
| |
| s_max_i32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x05,0x84] |
| |
| s_max_i32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x05,0x84] |
| |
| s_max_i32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x05,0x84] |
| |
| s_max_i32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x05,0x84] |
| |
| s_max_i32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x05,0x84] |
| |
| s_max_i32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x05,0x84] |
| |
| s_max_i32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x05,0x84] |
| |
| s_max_i32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x05,0x84] |
| |
| s_max_i32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x05,0x84] |
| |
| s_max_i32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x05,0x84] |
| |
| s_max_i32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x05,0x84] |
| |
| s_max_i32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x05,0x84] |
| |
| s_max_i32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x05,0x84] |
| |
| s_max_i32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x05,0x84] |
| |
| s_max_i32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x05,0x84] |
| |
| s_max_i32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x05,0x84] |
| |
| s_max_i32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x05,0x84] |
| |
| s_max_i32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x05,0x84] |
| |
| s_max_i32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x05,0x84,0x56,0x34,0x12,0xaf] |
| |
| s_max_i32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x05,0x84,0x73,0x72,0x71,0x3f] |
| |
| s_max_u32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x85,0x84] |
| |
| s_max_u32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0xe5,0x84] |
| |
| s_max_u32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xe6,0x84] |
| |
| s_max_u32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xe7,0x84] |
| |
| s_max_u32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xea,0x84] |
| |
| s_max_u32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xeb,0x84] |
| |
| s_max_u32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xec,0x84] |
| |
| s_max_u32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xed,0x84] |
| |
| s_max_u32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xee,0x84] |
| |
| s_max_u32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xef,0x84] |
| |
| s_max_u32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0xfb,0x84] |
| |
| s_max_u32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0xfc,0x84] |
| |
| s_max_u32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0xfe,0x84] |
| |
| s_max_u32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0xff,0x84] |
| |
| s_max_u32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x85,0x84] |
| |
| s_max_u32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x85,0x84] |
| |
| s_max_u32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x85,0x84] |
| |
| s_max_u32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x85,0x84] |
| |
| s_max_u32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x85,0x84] |
| |
| s_max_u32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x85,0x84] |
| |
| s_max_u32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x85,0x84] |
| |
| s_max_u32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x85,0x84] |
| |
| s_max_u32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x85,0x84] |
| |
| s_max_u32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x85,0x84] |
| |
| s_max_u32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x85,0x84] |
| |
| s_max_u32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x85,0x84] |
| |
| s_max_u32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x85,0x84] |
| |
| s_max_u32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x85,0x84] |
| |
| s_max_u32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x85,0x84] |
| |
| s_max_u32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x85,0x84] |
| |
| s_max_u32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x85,0x84] |
| |
| s_max_u32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x85,0x84] |
| |
| s_max_u32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x85,0x84] |
| |
| s_max_u32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x85,0x84] |
| |
| s_max_u32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x85,0x84,0x56,0x34,0x12,0xaf] |
| |
| s_max_u32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x85,0x84,0x73,0x72,0x71,0x3f] |
| |
| s_max_u32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x85,0x84] |
| |
| s_max_u32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x85,0x84] |
| |
| s_max_u32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x85,0x84] |
| |
| s_max_u32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x85,0x84] |
| |
| s_max_u32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x85,0x84] |
| |
| s_max_u32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x85,0x84] |
| |
| s_max_u32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x85,0x84] |
| |
| s_max_u32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x85,0x84] |
| |
| s_max_u32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x85,0x84] |
| |
| s_max_u32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x85,0x84] |
| |
| s_max_u32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x85,0x84] |
| |
| s_max_u32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x85,0x84] |
| |
| s_max_u32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x85,0x84] |
| |
| s_max_u32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x85,0x84] |
| |
| s_max_u32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x85,0x84] |
| |
| s_max_u32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x85,0x84] |
| |
| s_max_u32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x85,0x84] |
| |
| s_max_u32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x85,0x84] |
| |
| s_max_u32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x85,0x84] |
| |
| s_max_u32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x85,0x84] |
| |
| s_max_u32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x85,0x84,0x56,0x34,0x12,0xaf] |
| |
| s_max_u32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x85,0x84,0x73,0x72,0x71,0x3f] |
| |
| s_cselect_b32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x05,0x85] |
| |
| s_cselect_b32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0x65,0x85] |
| |
| s_cselect_b32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x66,0x85] |
| |
| s_cselect_b32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x67,0x85] |
| |
| s_cselect_b32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6a,0x85] |
| |
| s_cselect_b32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6b,0x85] |
| |
| s_cselect_b32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6c,0x85] |
| |
| s_cselect_b32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6d,0x85] |
| |
| s_cselect_b32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6e,0x85] |
| |
| s_cselect_b32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6f,0x85] |
| |
| s_cselect_b32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0x7b,0x85] |
| |
| s_cselect_b32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0x7c,0x85] |
| |
| s_cselect_b32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x7e,0x85] |
| |
| s_cselect_b32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x7f,0x85] |
| |
| s_cselect_b32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x05,0x85] |
| |
| s_cselect_b32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x05,0x85,0x56,0x34,0x12,0xaf] |
| |
| s_cselect_b32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x05,0x85,0x73,0x72,0x71,0x3f] |
| |
| s_cselect_b32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x05,0x85] |
| |
| s_cselect_b32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x05,0x85,0x56,0x34,0x12,0xaf] |
| |
| s_cselect_b32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x05,0x85,0x73,0x72,0x71,0x3f] |
| |
| s_cselect_b64 s[10:11], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[12:13], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0x8c,0x85] |
| |
| s_cselect_b64 s[100:101], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xe4,0x85] |
| |
| s_cselect_b64 flat_scratch, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xe6,0x85] |
| |
| s_cselect_b64 vcc, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xea,0x85] |
| |
| s_cselect_b64 tba, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xec,0x85] |
| |
| s_cselect_b64 tma, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xee,0x85] |
| |
| s_cselect_b64 ttmp[10:11], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xfa,0x85] |
| |
| s_cselect_b64 exec, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xfe,0x85] |
| |
| s_cselect_b64 s[10:11], s[4:5], s[4:5] |
| // CHECK: [0x04,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[100:101], s[4:5] |
| // CHECK: [0x64,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], flat_scratch, s[4:5] |
| // CHECK: [0x66,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], vcc, s[4:5] |
| // CHECK: [0x6a,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], tba, s[4:5] |
| // CHECK: [0x6c,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], tma, s[4:5] |
| // CHECK: [0x6e,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], ttmp[10:11], s[4:5] |
| // CHECK: [0x7a,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], exec, s[4:5] |
| // CHECK: [0x7e,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], 0, s[4:5] |
| // CHECK: [0x80,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], -1, s[4:5] |
| // CHECK: [0xc1,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], 0.5, s[4:5] |
| // CHECK: [0xf0,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], -4.0, s[4:5] |
| // CHECK: [0xf7,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], src_vccz, s[4:5] |
| // CHECK: [0xfb,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], src_execz, s[4:5] |
| // CHECK: [0xfc,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], src_scc, s[4:5] |
| // CHECK: [0xfd,0x04,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], 0xaf123456, s[4:5] |
| // CHECK: [0xff,0x04,0x8a,0x85,0x56,0x34,0x12,0xaf] |
| |
| s_cselect_b64 s[10:11], 0x3f717273, s[4:5] |
| // CHECK: [0xff,0x04,0x8a,0x85,0x73,0x72,0x71,0x3f] |
| |
| s_cselect_b64 s[10:11], s[2:3], s[6:7] |
| // CHECK: [0x02,0x06,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], s[100:101] |
| // CHECK: [0x02,0x64,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], flat_scratch |
| // CHECK: [0x02,0x66,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], vcc |
| // CHECK: [0x02,0x6a,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], tba |
| // CHECK: [0x02,0x6c,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], tma |
| // CHECK: [0x02,0x6e,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], ttmp[10:11] |
| // CHECK: [0x02,0x7a,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], exec |
| // CHECK: [0x02,0x7e,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], 0 |
| // CHECK: [0x02,0x80,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], -1 |
| // CHECK: [0x02,0xc1,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], 0.5 |
| // CHECK: [0x02,0xf0,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], -4.0 |
| // CHECK: [0x02,0xf7,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], src_vccz |
| // CHECK: [0x02,0xfb,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], src_execz |
| // CHECK: [0x02,0xfc,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], src_scc |
| // CHECK: [0x02,0xfd,0x8a,0x85] |
| |
| s_cselect_b64 s[10:11], s[2:3], 0xaf123456 |
| // CHECK: [0x02,0xff,0x8a,0x85,0x56,0x34,0x12,0xaf] |
| |
| s_cselect_b64 s[10:11], s[2:3], 0x3f717273 |
| // CHECK: [0x02,0xff,0x8a,0x85,0x73,0x72,0x71,0x3f] |
| |
| s_and_b32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x05,0x86] |
| |
| s_and_b32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0x65,0x86] |
| |
| s_and_b32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x66,0x86] |
| |
| s_and_b32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x67,0x86] |
| |
| s_and_b32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6a,0x86] |
| |
| s_and_b32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6b,0x86] |
| |
| s_and_b32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6c,0x86] |
| |
| s_and_b32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6d,0x86] |
| |
| s_and_b32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6e,0x86] |
| |
| s_and_b32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6f,0x86] |
| |
| s_and_b32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0x7b,0x86] |
| |
| s_and_b32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0x7c,0x86] |
| |
| s_and_b32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x7e,0x86] |
| |
| s_and_b32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x7f,0x86] |
| |
| s_and_b32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x05,0x86] |
| |
| s_and_b32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x05,0x86] |
| |
| s_and_b32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x05,0x86] |
| |
| s_and_b32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x05,0x86] |
| |
| s_and_b32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x05,0x86] |
| |
| s_and_b32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x05,0x86] |
| |
| s_and_b32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x05,0x86] |
| |
| s_and_b32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x05,0x86] |
| |
| s_and_b32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x05,0x86] |
| |
| s_and_b32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x05,0x86] |
| |
| s_and_b32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x05,0x86] |
| |
| s_and_b32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x05,0x86] |
| |
| s_and_b32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x05,0x86] |
| |
| s_and_b32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x05,0x86] |
| |
| s_and_b32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x05,0x86] |
| |
| s_and_b32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x05,0x86] |
| |
| s_and_b32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x05,0x86] |
| |
| s_and_b32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x05,0x86] |
| |
| s_and_b32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x05,0x86] |
| |
| s_and_b32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x05,0x86] |
| |
| s_and_b32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x05,0x86,0x56,0x34,0x12,0xaf] |
| |
| s_and_b32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x05,0x86,0x73,0x72,0x71,0x3f] |
| |
| s_and_b32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x05,0x86] |
| |
| s_and_b32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x05,0x86] |
| |
| s_and_b32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x05,0x86] |
| |
| s_and_b32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x05,0x86] |
| |
| s_and_b32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x05,0x86] |
| |
| s_and_b32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x05,0x86] |
| |
| s_and_b32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x05,0x86] |
| |
| s_and_b32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x05,0x86] |
| |
| s_and_b32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x05,0x86] |
| |
| s_and_b32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x05,0x86] |
| |
| s_and_b32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x05,0x86] |
| |
| s_and_b32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x05,0x86] |
| |
| s_and_b32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x05,0x86] |
| |
| s_and_b32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x05,0x86] |
| |
| s_and_b32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x05,0x86] |
| |
| s_and_b32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x05,0x86] |
| |
| s_and_b32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x05,0x86] |
| |
| s_and_b32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x05,0x86] |
| |
| s_and_b32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x05,0x86] |
| |
| s_and_b32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x05,0x86] |
| |
| s_and_b32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x05,0x86,0x56,0x34,0x12,0xaf] |
| |
| s_and_b32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x05,0x86,0x73,0x72,0x71,0x3f] |
| |
| s_and_b64 s[10:11], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0x8a,0x86] |
| |
| s_and_b64 s[12:13], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0x8c,0x86] |
| |
| s_and_b64 s[100:101], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xe4,0x86] |
| |
| s_and_b64 flat_scratch, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xe6,0x86] |
| |
| s_and_b64 vcc, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xea,0x86] |
| |
| s_and_b64 tba, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xec,0x86] |
| |
| s_and_b64 tma, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xee,0x86] |
| |
| s_and_b64 ttmp[10:11], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xfa,0x86] |
| |
| s_and_b64 exec, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xfe,0x86] |
| |
| s_and_b64 s[10:11], s[4:5], s[4:5] |
| // CHECK: [0x04,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[100:101], s[4:5] |
| // CHECK: [0x64,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], flat_scratch, s[4:5] |
| // CHECK: [0x66,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], vcc, s[4:5] |
| // CHECK: [0x6a,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], tba, s[4:5] |
| // CHECK: [0x6c,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], tma, s[4:5] |
| // CHECK: [0x6e,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], ttmp[10:11], s[4:5] |
| // CHECK: [0x7a,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], exec, s[4:5] |
| // CHECK: [0x7e,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], 0, s[4:5] |
| // CHECK: [0x80,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], -1, s[4:5] |
| // CHECK: [0xc1,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], 0.5, s[4:5] |
| // CHECK: [0xf0,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], -4.0, s[4:5] |
| // CHECK: [0xf7,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], src_vccz, s[4:5] |
| // CHECK: [0xfb,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], src_execz, s[4:5] |
| // CHECK: [0xfc,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], src_scc, s[4:5] |
| // CHECK: [0xfd,0x04,0x8a,0x86] |
| |
| s_and_b64 s[10:11], 0xaf123456, s[4:5] |
| // CHECK: [0xff,0x04,0x8a,0x86,0x56,0x34,0x12,0xaf] |
| |
| s_and_b64 s[10:11], 0x3f717273, s[4:5] |
| // CHECK: [0xff,0x04,0x8a,0x86,0x73,0x72,0x71,0x3f] |
| |
| s_and_b64 s[10:11], s[2:3], s[6:7] |
| // CHECK: [0x02,0x06,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], s[100:101] |
| // CHECK: [0x02,0x64,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], flat_scratch |
| // CHECK: [0x02,0x66,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], vcc |
| // CHECK: [0x02,0x6a,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], tba |
| // CHECK: [0x02,0x6c,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], tma |
| // CHECK: [0x02,0x6e,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], ttmp[10:11] |
| // CHECK: [0x02,0x7a,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], exec |
| // CHECK: [0x02,0x7e,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], 0 |
| // CHECK: [0x02,0x80,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], -1 |
| // CHECK: [0x02,0xc1,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], 0.5 |
| // CHECK: [0x02,0xf0,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], -4.0 |
| // CHECK: [0x02,0xf7,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], src_vccz |
| // CHECK: [0x02,0xfb,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], src_execz |
| // CHECK: [0x02,0xfc,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], src_scc |
| // CHECK: [0x02,0xfd,0x8a,0x86] |
| |
| s_and_b64 s[10:11], s[2:3], 0xaf123456 |
| // CHECK: [0x02,0xff,0x8a,0x86,0x56,0x34,0x12,0xaf] |
| |
| s_and_b64 s[10:11], s[2:3], 0x3f717273 |
| // CHECK: [0x02,0xff,0x8a,0x86,0x73,0x72,0x71,0x3f] |
| |
| s_or_b32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x05,0x87] |
| |
| s_or_b32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0x65,0x87] |
| |
| s_or_b32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x66,0x87] |
| |
| s_or_b32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x67,0x87] |
| |
| s_or_b32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6a,0x87] |
| |
| s_or_b32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6b,0x87] |
| |
| s_or_b32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6c,0x87] |
| |
| s_or_b32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6d,0x87] |
| |
| s_or_b32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6e,0x87] |
| |
| s_or_b32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6f,0x87] |
| |
| s_or_b32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0x7b,0x87] |
| |
| s_or_b32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0x7c,0x87] |
| |
| s_or_b32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x7e,0x87] |
| |
| s_or_b32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x7f,0x87] |
| |
| s_or_b32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x05,0x87] |
| |
| s_or_b32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x05,0x87] |
| |
| s_or_b32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x05,0x87] |
| |
| s_or_b32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x05,0x87] |
| |
| s_or_b32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x05,0x87] |
| |
| s_or_b32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x05,0x87] |
| |
| s_or_b32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x05,0x87] |
| |
| s_or_b32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x05,0x87] |
| |
| s_or_b32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x05,0x87] |
| |
| s_or_b32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x05,0x87] |
| |
| s_or_b32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x05,0x87] |
| |
| s_or_b32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x05,0x87] |
| |
| s_or_b32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x05,0x87] |
| |
| s_or_b32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x05,0x87] |
| |
| s_or_b32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x05,0x87] |
| |
| s_or_b32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x05,0x87] |
| |
| s_or_b32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x05,0x87] |
| |
| s_or_b32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x05,0x87] |
| |
| s_or_b32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x05,0x87] |
| |
| s_or_b32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x05,0x87] |
| |
| s_or_b32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x05,0x87,0x56,0x34,0x12,0xaf] |
| |
| s_or_b32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x05,0x87,0x73,0x72,0x71,0x3f] |
| |
| s_or_b32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x05,0x87] |
| |
| s_or_b32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x05,0x87] |
| |
| s_or_b32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x05,0x87] |
| |
| s_or_b32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x05,0x87] |
| |
| s_or_b32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x05,0x87] |
| |
| s_or_b32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x05,0x87] |
| |
| s_or_b32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x05,0x87] |
| |
| s_or_b32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x05,0x87] |
| |
| s_or_b32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x05,0x87] |
| |
| s_or_b32 s5, s1, ttmp11 |
| // CHECK: [0x01,0x7b,0x05,0x87] |
| |
| s_or_b32 s5, s1, m0 |
| // CHECK: [0x01,0x7c,0x05,0x87] |
| |
| s_or_b32 s5, s1, exec_lo |
| // CHECK: [0x01,0x7e,0x05,0x87] |
| |
| s_or_b32 s5, s1, exec_hi |
| // CHECK: [0x01,0x7f,0x05,0x87] |
| |
| s_or_b32 s5, s1, 0 |
| // CHECK: [0x01,0x80,0x05,0x87] |
| |
| s_or_b32 s5, s1, -1 |
| // CHECK: [0x01,0xc1,0x05,0x87] |
| |
| s_or_b32 s5, s1, 0.5 |
| // CHECK: [0x01,0xf0,0x05,0x87] |
| |
| s_or_b32 s5, s1, -4.0 |
| // CHECK: [0x01,0xf7,0x05,0x87] |
| |
| s_or_b32 s5, s1, src_vccz |
| // CHECK: [0x01,0xfb,0x05,0x87] |
| |
| s_or_b32 s5, s1, src_execz |
| // CHECK: [0x01,0xfc,0x05,0x87] |
| |
| s_or_b32 s5, s1, src_scc |
| // CHECK: [0x01,0xfd,0x05,0x87] |
| |
| s_or_b32 s5, s1, 0xaf123456 |
| // CHECK: [0x01,0xff,0x05,0x87,0x56,0x34,0x12,0xaf] |
| |
| s_or_b32 s5, s1, 0x3f717273 |
| // CHECK: [0x01,0xff,0x05,0x87,0x73,0x72,0x71,0x3f] |
| |
| s_or_b64 s[10:11], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0x8a,0x87] |
| |
| s_or_b64 s[12:13], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0x8c,0x87] |
| |
| s_or_b64 s[100:101], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xe4,0x87] |
| |
| s_or_b64 flat_scratch, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xe6,0x87] |
| |
| s_or_b64 vcc, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xea,0x87] |
| |
| s_or_b64 tba, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xec,0x87] |
| |
| s_or_b64 tma, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xee,0x87] |
| |
| s_or_b64 ttmp[10:11], s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xfa,0x87] |
| |
| s_or_b64 exec, s[2:3], s[4:5] |
| // CHECK: [0x02,0x04,0xfe,0x87] |
| |
| s_or_b64 s[10:11], s[4:5], s[4:5] |
| // CHECK: [0x04,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[100:101], s[4:5] |
| // CHECK: [0x64,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], flat_scratch, s[4:5] |
| // CHECK: [0x66,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], vcc, s[4:5] |
| // CHECK: [0x6a,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], tba, s[4:5] |
| // CHECK: [0x6c,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], tma, s[4:5] |
| // CHECK: [0x6e,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], ttmp[10:11], s[4:5] |
| // CHECK: [0x7a,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], exec, s[4:5] |
| // CHECK: [0x7e,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], 0, s[4:5] |
| // CHECK: [0x80,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], -1, s[4:5] |
| // CHECK: [0xc1,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], 0.5, s[4:5] |
| // CHECK: [0xf0,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], -4.0, s[4:5] |
| // CHECK: [0xf7,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], src_vccz, s[4:5] |
| // CHECK: [0xfb,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], src_execz, s[4:5] |
| // CHECK: [0xfc,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], src_scc, s[4:5] |
| // CHECK: [0xfd,0x04,0x8a,0x87] |
| |
| s_or_b64 s[10:11], 0xaf123456, s[4:5] |
| // CHECK: [0xff,0x04,0x8a,0x87,0x56,0x34,0x12,0xaf] |
| |
| s_or_b64 s[10:11], 0x3f717273, s[4:5] |
| // CHECK: [0xff,0x04,0x8a,0x87,0x73,0x72,0x71,0x3f] |
| |
| s_or_b64 s[10:11], s[2:3], s[6:7] |
| // CHECK: [0x02,0x06,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], s[100:101] |
| // CHECK: [0x02,0x64,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], flat_scratch |
| // CHECK: [0x02,0x66,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], vcc |
| // CHECK: [0x02,0x6a,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], tba |
| // CHECK: [0x02,0x6c,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], tma |
| // CHECK: [0x02,0x6e,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], ttmp[10:11] |
| // CHECK: [0x02,0x7a,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], exec |
| // CHECK: [0x02,0x7e,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], 0 |
| // CHECK: [0x02,0x80,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], -1 |
| // CHECK: [0x02,0xc1,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], 0.5 |
| // CHECK: [0x02,0xf0,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], -4.0 |
| // CHECK: [0x02,0xf7,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], src_vccz |
| // CHECK: [0x02,0xfb,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], src_execz |
| // CHECK: [0x02,0xfc,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], src_scc |
| // CHECK: [0x02,0xfd,0x8a,0x87] |
| |
| s_or_b64 s[10:11], s[2:3], 0xaf123456 |
| // CHECK: [0x02,0xff,0x8a,0x87,0x56,0x34,0x12,0xaf] |
| |
| s_or_b64 s[10:11], s[2:3], 0x3f717273 |
| // CHECK: [0x02,0xff,0x8a,0x87,0x73,0x72,0x71,0x3f] |
| |
| s_xor_b32 s5, s1, s2 |
| // CHECK: [0x01,0x02,0x05,0x88] |
| |
| s_xor_b32 s101, s1, s2 |
| // CHECK: [0x01,0x02,0x65,0x88] |
| |
| s_xor_b32 flat_scratch_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x66,0x88] |
| |
| s_xor_b32 flat_scratch_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x67,0x88] |
| |
| s_xor_b32 vcc_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6a,0x88] |
| |
| s_xor_b32 vcc_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6b,0x88] |
| |
| s_xor_b32 tba_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6c,0x88] |
| |
| s_xor_b32 tba_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6d,0x88] |
| |
| s_xor_b32 tma_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x6e,0x88] |
| |
| s_xor_b32 tma_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x6f,0x88] |
| |
| s_xor_b32 ttmp11, s1, s2 |
| // CHECK: [0x01,0x02,0x7b,0x88] |
| |
| s_xor_b32 m0, s1, s2 |
| // CHECK: [0x01,0x02,0x7c,0x88] |
| |
| s_xor_b32 exec_lo, s1, s2 |
| // CHECK: [0x01,0x02,0x7e,0x88] |
| |
| s_xor_b32 exec_hi, s1, s2 |
| // CHECK: [0x01,0x02,0x7f,0x88] |
| |
| s_xor_b32 s5, s101, s2 |
| // CHECK: [0x65,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, flat_scratch_lo, s2 |
| // CHECK: [0x66,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, flat_scratch_hi, s2 |
| // CHECK: [0x67,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, vcc_lo, s2 |
| // CHECK: [0x6a,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, vcc_hi, s2 |
| // CHECK: [0x6b,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, tba_lo, s2 |
| // CHECK: [0x6c,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, tba_hi, s2 |
| // CHECK: [0x6d,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, tma_lo, s2 |
| // CHECK: [0x6e,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, tma_hi, s2 |
| // CHECK: [0x6f,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, ttmp11, s2 |
| // CHECK: [0x7b,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, m0, s2 |
| // CHECK: [0x7c,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, exec_lo, s2 |
| // CHECK: [0x7e,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, exec_hi, s2 |
| // CHECK: [0x7f,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, 0, s2 |
| // CHECK: [0x80,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, -1, s2 |
| // CHECK: [0xc1,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, 0.5, s2 |
| // CHECK: [0xf0,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, -4.0, s2 |
| // CHECK: [0xf7,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, src_vccz, s2 |
| // CHECK: [0xfb,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, src_execz, s2 |
| // CHECK: [0xfc,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, src_scc, s2 |
| // CHECK: [0xfd,0x02,0x05,0x88] |
| |
| s_xor_b32 s5, 0xaf123456, s2 |
| // CHECK: [0xff,0x02,0x05,0x88,0x56,0x34,0x12,0xaf] |
| |
| s_xor_b32 s5, 0x3f717273, s2 |
| // CHECK: [0xff,0x02,0x05,0x88,0x73,0x72,0x71,0x3f] |
| |
| s_xor_b32 s5, s1, s101 |
| // CHECK: [0x01,0x65,0x05,0x88] |
| |
| s_xor_b32 s5, s1, flat_scratch_lo |
| // CHECK: [0x01,0x66,0x05,0x88] |
| |
| s_xor_b32 s5, s1, flat_scratch_hi |
| // CHECK: [0x01,0x67,0x05,0x88] |
| |
| s_xor_b32 s5, s1, vcc_lo |
| // CHECK: [0x01,0x6a,0x05,0x88] |
| |
| s_xor_b32 s5, s1, vcc_hi |
| // CHECK: [0x01,0x6b,0x05,0x88] |
| |
| s_xor_b32 s5, s1, tba_lo |
| // CHECK: [0x01,0x6c,0x05,0x88] |
| |
| s_xor_b32 s5, s1, tba_hi |
| // CHECK: [0x01,0x6d,0x05,0x88] |
| |
| s_xor_b32 s5, s1, tma_lo |
| // CHECK: [0x01,0x6e,0x05,0x88] |
| |
| s_xor_b32 s5, s1, tma_hi |
| // CHECK: [0x01,0x6f,0x05,0x88] |
| |
