; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Test get the address of constant pool without grs instruction
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky  | FileCheck %s --check-prefix=GENERIC

declare i32 @llvm.cttz.i32(i32, i1)

define void @cttztest(i32 %C, i32* %CP) {
; GENERIC-LABEL: cttztest:
; GENERIC:       # %bb.0:
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a2, 0
; GENERIC-NEXT:    subu16 a2, a2, a0
; GENERIC-NEXT:    and16 a2, a0
; GENERIC-NEXT:    movi16 a0, 7
; GENERIC-NEXT:    lsli16 a0, a0, 24
; GENERIC-NEXT:    movi16 a3, 124
; GENERIC-NEXT:    lsli16 a3, a3, 16
; GENERIC-NEXT:    or16 a3, a0
; GENERIC-NEXT:    movi16 a0, 181
; GENERIC-NEXT:    lsli16 a0, a0, 8
; GENERIC-NEXT:    or16 a0, a3
; GENERIC-NEXT:    movi16 a3, 49
; GENERIC-NEXT:    or16 a3, a0
; GENERIC-NEXT:    mult16 a3, a2
; GENERIC-NEXT:    lsri16 a0, a3, 27
; GENERIC-NEXT:    lrw32 a2, [.LCPI0_1]
; GENERIC-NEXT:    addu16 a0, a2, a0
; GENERIC-NEXT:    ld16.b a0, (a0, 0)
; GENERIC-NEXT:    st16.w a0, (a1, 0)
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI0_1:
; GENERIC-NEXT:    .long .LCPI0_0
; GENERIC-NEXT:  .LCPI0_0:
; GENERIC-NEXT:    .ascii "\000\001\034\002\035\016\030\003\036\026\024\017\031\021\004\b\037\033\r\027\025\023\020\007\032\f\022\006\013\005\n\t"
	%c = call i32 @llvm.cttz.i32( i32 %C, i1 true )
	store i32 %c, i32* %CP
	ret void
}