; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple aarch64-unknown-unknown -mattr=+fullfp16 | FileCheck %s

define half @test_vrecpeh_f16(half %a) #0 {
; CHECK-LABEL: test_vrecpeh_f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    frecpe h0, h0
; CHECK-NEXT:    ret
  %r = call half @llvm.aarch64.neon.frecpe.f16(half %a)
  ret half %r
}

define half @test_vrecpxh_f16(half %a) #0 {
; CHECK-LABEL: test_vrecpxh_f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    frecpx h0, h0
; CHECK-NEXT:    ret
  %r = call half @llvm.aarch64.neon.frecpx.f16(half %a)
  ret half %r
}

define half @test_vrsqrteh_f16(half %a) #0 {
; CHECK-LABEL: test_vrsqrteh_f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    frsqrte h0, h0
; CHECK-NEXT:    ret
  %r = call half @llvm.aarch64.neon.frsqrte.f16(half %a)
  ret half %r
}

declare half @llvm.aarch64.neon.frecpe.f16(half %a) #0
declare half @llvm.aarch64.neon.frecpx.f16(half %a) #0
declare half @llvm.aarch64.neon.frsqrte.f16(half %a) #0