blob: 8eb0cf3039bbd44ffd4734c085a3e06df77e3705 [file] [log] [blame]
//===-- AVRRegisterInfo.h - AVR Register Information Impl -------*- C++ -*-===//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// This file contains the AVR implementation of the TargetRegisterInfo class.
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include ""
namespace llvm {
/// Utilities relating to AVR registers.
class AVRRegisterInfo : public AVRGenRegisterInfo {
const uint16_t *
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
const uint32_t *getCallPreservedMask(const MachineFunction &MF,
CallingConv::ID CC) const override;
BitVector getReservedRegs(const MachineFunction &MF) const override;
const TargetRegisterClass *
getLargestLegalSuperClass(const TargetRegisterClass *RC,
const MachineFunction &MF) const override;
/// Stack Frame Processing Methods
bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
unsigned FIOperandNum,
RegScavenger *RS = nullptr) const override;
Register getFrameRegister(const MachineFunction &MF) const override;
const TargetRegisterClass *
getPointerRegClass(const MachineFunction &MF,
unsigned Kind = 0) const override;
/// Splits a 16-bit `DREGS` register into the lo/hi register pair.
/// \param Reg A 16-bit register to split.
void splitReg(Register Reg, Register &LoReg, Register &HiReg) const;
bool shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC,
unsigned SubReg, const TargetRegisterClass *DstRC,
unsigned DstSubReg, const TargetRegisterClass *NewRC,
LiveIntervals &LIS) const override;
} // end namespace llvm