test/CodeGen/PowerPC/legalize-invert-br_cc.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O1 -mtriple powerpc -mattr=+spe -o - %s | FileCheck %s

; This used to hit an assert
;
;   ../lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3971: bool {anonymous}::SelectionDAGLegalize::ExpandNode(llvm::SDNode*): Assertion `!NeedInvert && "Don't know how to invert BR_CC!"' failed.

define void @test_fcmpueq_legalize_br_cc_with_invert(float %a) {
; CHECK-LABEL: test_fcmpueq_legalize_br_cc_with_invert:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lis 4, .LCPI0_0@ha
; CHECK-NEXT:    lwz 4, .LCPI0_0@l(4)
; CHECK-NEXT:  .LBB0_1: # %l1
; CHECK-NEXT:    #
; CHECK-NEXT:    efscmplt 7, 3, 4
; CHECK-NEXT:    efscmpgt 0, 3, 4
; CHECK-NEXT:    mfcr 5 # cr7
; CHECK-NEXT:    mcrf 7, 0
; CHECK-NEXT:    mfcr 6 # cr7
; CHECK-NEXT:    rlwinm 5, 5, 30, 31, 31
; CHECK-NEXT:    rlwinm 6, 6, 30, 31, 31
; CHECK-NEXT:    or. 5, 6, 5
; CHECK-NEXT:    beq 0, .LBB0_1
; CHECK-NEXT:  # %bb.2: # %l2
; CHECK-NEXT:    blr
entry:
  br label %l1
l1:
  %fcmp = fcmp ueq float %a, 0xC6306B3440000000
  br i1 %fcmp, label %l1, label %l2
l2:
  ret void
}