; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=armv7-none-linux-eabi < %s | FileCheck %s

define void @vld1x2(i8* %v4, i32 %v2) {
; CHECK-LABEL: vld1x2:
; CHECK:       @ %bb.0:
; CHECK-NEXT:    mov r0, #0
; CHECK-NEXT:  .LBB0_1: @ %.preheader
; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    cmp r0, #0
; CHECK-NEXT:    bne .LBB0_1
; CHECK-NEXT:  @ %bb.2: @ %.loopexit
; CHECK-NEXT:    @ in Loop: Header=BB0_1 Depth=1
; CHECK-NEXT:    vst3.8 {d16, d17, d18}, [r0]
; CHECK-NEXT:    b .LBB0_1
  br label %.preheader

.preheader:                                       ; preds = %.preheader, %3
  %v5 = icmp eq i8* %v4, undef
  br i1 %v5, label %.loopexit, label %.preheader

.loopexit:                                        ; preds = %.preheader
  %v6 = tail call { <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x2.v8i8.p0i8(i8* %v4)
  %v7 = getelementptr inbounds i8, i8* %v4, i32 %v2
  %v8 = tail call { <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x2.v8i8.p0i8(i8* %v7)
  tail call void @llvm.arm.neon.vst3.p0i8.v8i8(i8* undef, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 1)
  br label %.preheader
}

define void @vld1x3(i8* %v4, i32 %v2) {
; CHECK-LABEL: vld1x3:
; CHECK:       @ %bb.0:
; CHECK-NEXT:    mov r0, #0
; CHECK-NEXT:  .LBB1_1: @ %.preheader
; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    cmp r0, #0
; CHECK-NEXT:    bne .LBB1_1
; CHECK-NEXT:  @ %bb.2: @ %.loopexit
; CHECK-NEXT:    @ in Loop: Header=BB1_1 Depth=1
; CHECK-NEXT:    vst3.8 {d16, d17, d18}, [r0]
; CHECK-NEXT:    b .LBB1_1
  br label %.preheader

.preheader:                                       ; preds = %.preheader, %3
  %v5 = icmp eq i8* %v4, undef
  br i1 %v5, label %.loopexit, label %.preheader

.loopexit:                                        ; preds = %.preheader
  %v6 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x3.v8i8.p0i8(i8* %v4)
  %v7 = getelementptr inbounds i8, i8* %v4, i32 %v2
  %v8 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x3.v8i8.p0i8(i8* %v7)
  tail call void @llvm.arm.neon.vst3.p0i8.v8i8(i8* undef, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 1)
  br label %.preheader
}

define void @vld1x4(i8* %v4, i32 %v2) {
; CHECK-LABEL: vld1x4:
; CHECK:       @ %bb.0:
; CHECK-NEXT:    mov r0, #0
; CHECK-NEXT:  .LBB2_1: @ %.preheader
; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    cmp r0, #0
; CHECK-NEXT:    bne .LBB2_1
; CHECK-NEXT:  @ %bb.2: @ %.loopexit
; CHECK-NEXT:    @ in Loop: Header=BB2_1 Depth=1
; CHECK-NEXT:    vst3.8 {d16, d17, d18}, [r0]
; CHECK-NEXT:    b .LBB2_1
  br label %.preheader

.preheader:                                       ; preds = %.preheader, %3
  %v5 = icmp eq i8* %v4, undef
  br i1 %v5, label %.loopexit, label %.preheader

.loopexit:                                        ; preds = %.preheader
  %v6 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x4.v8i8.p0i8(i8* %v4)
  %v7 = getelementptr inbounds i8, i8* %v4, i32 %v2
  %v8 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x4.v8i8.p0i8(i8* %v7)
  tail call void @llvm.arm.neon.vst3.p0i8.v8i8(i8* undef, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 1)
  br label %.preheader
}

declare void @llvm.arm.neon.vst3.p0i8.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32)
declare { <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x2.v8i8.p0i8(i8*)
declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x3.v8i8.p0i8(i8*)
declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x4.v8i8.p0i8(i8*)