| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=thumbv7 -run-pass=if-converter %s -o - | FileCheck %s --check-prefix=CHECK-V7 |
| # RUN: llc -mtriple=thumbv8 -run-pass=if-converter %s -o - | FileCheck %s --check-prefix=CHECK-V8 |
| --- | |
| define void @test_nosize() { |
| %c0 = icmp sgt i64 0, 0 |
| br i1 %c0, label %b1, label %b6 |
| |
| b1: ; preds = %0 |
| br i1 undef, label %b3, label %b2 |
| |
| b2: ; preds = %b1 |
| %v0 = tail call i32 @extfunc() |
| br label %b5 |
| |
| b3: ; preds = %b1 |
| %v1 = load i32, i32* undef, align 4 |
| %v2 = and i32 %v1, 256 |
| br label %b5 |
| |
| b5: ; preds = %b3, %b2 |
| %v3 = phi i32 [ %v2, %b3 ], [ %v0, %b2 ] |
| %c1 = icmp eq i32 %v3, 0 |
| br i1 %c1, label %b8, label %b7 |
| |
| b6: ; preds = %0 |
| %1 = tail call i32 @extfunc() |
| ret void |
| |
| b7: ; preds = %b5 |
| %2 = tail call i32 @extfunc() |
| ret void |
| |
| b8: ; preds = %b5 |
| ret void |
| } |
| |
| ; Function Attrs: optsize |
| define void @test_optsize() #0 { |
| %c0 = icmp sgt i64 0, 0 |
| br i1 %c0, label %b1, label %b6 |
| |
| b1: ; preds = %0 |
| br i1 undef, label %b3, label %b2 |
| |
| b2: ; preds = %b1 |
| %v0 = tail call i32 @extfunc() |
| br label %b5 |
| |
| b3: ; preds = %b1 |
| %v1 = load i32, i32* undef, align 4 |
| %v2 = and i32 %v1, 256 |
| br label %b5 |
| |
| b5: ; preds = %b3, %b2 |
| %v3 = phi i32 [ %v2, %b3 ], [ %v0, %b2 ] |
| %c1 = icmp eq i32 %v3, 0 |
| br i1 %c1, label %b8, label %b7 |
| |
| b6: ; preds = %0 |
| %1 = tail call i32 @extfunc() |
| ret void |
| |
| b7: ; preds = %b5 |
| %2 = tail call i32 @extfunc() |
| ret void |
| |
| b8: ; preds = %b5 |
| ret void |
| } |
| |
| ; Function Attrs: minsize |
| define void @test_minsize() #1 { |
| %c0 = icmp sgt i64 0, 0 |
| br i1 %c0, label %b1, label %b6 |
| |
| b1: ; preds = %0 |
| br i1 undef, label %b3, label %b2 |
| |
| b2: ; preds = %b1 |
| %v0 = tail call i32 @extfunc() |
| br label %b5 |
| |
| b3: ; preds = %b1 |
| %v1 = load i32, i32* undef, align 4 |
| %v2 = and i32 %v1, 256 |
| br label %b5 |
| |
| b5: ; preds = %b3, %b2 |
| %v3 = phi i32 [ %v2, %b3 ], [ %v0, %b2 ] |
| %c1 = icmp eq i32 %v3, 0 |
| br i1 %c1, label %b8, label %b7 |
| |
| b6: ; preds = %0 |
| %1 = tail call i32 @extfunc() |
| ret void |
| |
| b7: ; preds = %b5 |
| %2 = tail call i32 @extfunc() |
| ret void |
| |
| b8: ; preds = %b5 |
| ret void |
| } |
| |
| declare i32 @extfunc() |
| |
| ; Function Attrs: nounwind |
| declare void @llvm.stackprotector(i8*, i8**) #2 |
| |
| attributes #0 = { optsize } |
| attributes #1 = { minsize } |
| attributes #2 = { nounwind } |
| |
| ... |
| --- |
| name: test_nosize |
| alignment: 2 |
| exposesReturnsTwice: false |
| legalized: false |
| regBankSelected: false |
| selected: false |
| failedISel: false |
| tracksRegLiveness: true |
| hasWinCFI: false |
| registers: [] |
| liveins: [] |
| frameInfo: |
| isFrameAddressTaken: false |
| isReturnAddressTaken: false |
| hasStackMap: false |
| hasPatchPoint: false |
| stackSize: 8 |
| offsetAdjustment: 0 |
| maxAlignment: 4 |
| adjustsStack: true |
| hasCalls: true |
| stackProtector: '' |
| maxCallFrameSize: 0 |
| cvBytesOfCalleeSavedRegisters: 0 |
| hasOpaqueSPAdjustment: false |
| hasVAStart: false |
| hasMustTailInVarArgFunc: false |
| localFrameSize: 0 |
| savePoint: '' |
| restorePoint: '' |
| fixedStack: [] |
| stack: |
| - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| callSites: [] |
| constants: [] |
| machineFunctionInfo: {} |
| body: | |
| ; CHECK-V7-LABEL: name: test_nosize |
| ; CHECK-V7: bb.0 (%ir-block.0): |
| ; CHECK-V7: successors: %bb.1(0x80000000) |
| ; CHECK-V7: liveins: $lr, $r7 |
| ; CHECK-V7: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V7: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V7: tTAILJMPdND @extfunc, 1 /* CC::ne */, killed $cpsr, implicit $sp, implicit $sp |
| ; CHECK-V7: bb.1.b1: |
| ; CHECK-V7: successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| ; CHECK-V7: liveins: $r7, $lr |
| ; CHECK-V7: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr |
| ; CHECK-V7: frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| ; CHECK-V7: frame-setup CFI_INSTRUCTION offset $lr, -4 |
| ; CHECK-V7: frame-setup CFI_INSTRUCTION offset $r7, -8 |
| ; CHECK-V7: renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V7: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V7: t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V7: bb.2.b2: |
| ; CHECK-V7: successors: %bb.4(0x80000000) |
| ; CHECK-V7: tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0 |
| ; CHECK-V7: t2B %bb.4, 14 /* CC::al */, $noreg |
| ; CHECK-V7: bb.3.b3: |
| ; CHECK-V7: successors: %bb.4(0x80000000) |
| ; CHECK-V7: renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`) |
| ; CHECK-V7: renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V7: bb.4.b5: |
| ; CHECK-V7: successors: %bb.5(0x50000000) |
| ; CHECK-V7: liveins: $r0 |
| ; CHECK-V7: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V7: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr |
| ; CHECK-V7: tBX_RET 0 /* CC::eq */, killed $cpsr |
| ; CHECK-V7: bb.5.b7: |
| ; CHECK-V7: liveins: $lr, $r7 |
| ; CHECK-V7: tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp |
| ; CHECK-V8-LABEL: name: test_nosize |
| ; CHECK-V8: bb.0 (%ir-block.0): |
| ; CHECK-V8: successors: %bb.1(0x50000000), %bb.6(0x30000000) |
| ; CHECK-V8: liveins: $lr, $r7 |
| ; CHECK-V8: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V8: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V8: bb.1.b1: |
| ; CHECK-V8: successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| ; CHECK-V8: liveins: $r7, $lr |
| ; CHECK-V8: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr |
| ; CHECK-V8: frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| ; CHECK-V8: frame-setup CFI_INSTRUCTION offset $lr, -4 |
| ; CHECK-V8: frame-setup CFI_INSTRUCTION offset $r7, -8 |
| ; CHECK-V8: renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V8: t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V8: bb.2.b2: |
| ; CHECK-V8: successors: %bb.4(0x80000000) |
| ; CHECK-V8: tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0 |
| ; CHECK-V8: t2B %bb.4, 14 /* CC::al */, $noreg |
| ; CHECK-V8: bb.3.b3: |
| ; CHECK-V8: successors: %bb.4(0x80000000) |
| ; CHECK-V8: renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`) |
| ; CHECK-V8: renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V8: bb.4.b5: |
| ; CHECK-V8: successors: %bb.5(0x30000000), %bb.6(0x50000000) |
| ; CHECK-V8: liveins: $r0 |
| ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V8: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr |
| ; CHECK-V8: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V8: bb.5.b8: |
| ; CHECK-V8: liveins: $lr, $r7 |
| ; CHECK-V8: tBX_RET 14 /* CC::al */, $noreg |
| ; CHECK-V8: bb.6.b7: |
| ; CHECK-V8: liveins: $lr, $r7 |
| ; CHECK-V8: tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp |
| bb.0 (%ir-block.0): |
| successors: %bb.1(0x50000000), %bb.6(0x30000000) |
| liveins: $lr, $r7 |
| |
| renamable $r0 = t2MOVi 1, 14, $noreg, $noreg |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.6, 1, killed $cpsr |
| |
| bb.1.b1: |
| successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| liveins: $r7, $lr |
| |
| $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr |
| frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| frame-setup CFI_INSTRUCTION offset $lr, -4 |
| frame-setup CFI_INSTRUCTION offset $r7, -8 |
| renamable $r0 = t2MOVi 0, 14, $noreg, $noreg |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.3, 1, killed $cpsr |
| |
| bb.2.b2: |
| successors: %bb.4(0x80000000) |
| |
| tBL 14, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0 |
| t2B %bb.4, 14, $noreg |
| |
| bb.3.b3: |
| successors: %bb.4(0x80000000) |
| |
| renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14, $noreg :: (load 4 from `i32* undef`) |
| renamable $r0 = t2ANDri killed renamable $r0, 256, 14, $noreg, $noreg |
| |
| bb.4.b5: |
| successors: %bb.5(0x30000000), %bb.6(0x50000000) |
| liveins: $r0 |
| |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr |
| t2Bcc %bb.6, 1, killed $cpsr |
| |
| bb.5.b8: |
| liveins: $lr, $r7 |
| |
| tBX_RET 14, $noreg |
| |
| bb.6.b7: |
| liveins: $lr, $r7 |
| |
| tTAILJMPdND @extfunc, 14, $noreg, implicit $sp, implicit $sp |
| |
| ... |
| --- |
| name: test_optsize |
| alignment: 2 |
| exposesReturnsTwice: false |
| legalized: false |
| regBankSelected: false |
| selected: false |
| failedISel: false |
| tracksRegLiveness: true |
| hasWinCFI: false |
| registers: [] |
| liveins: [] |
| frameInfo: |
| isFrameAddressTaken: false |
| isReturnAddressTaken: false |
| hasStackMap: false |
| hasPatchPoint: false |
| stackSize: 8 |
| offsetAdjustment: 0 |
| maxAlignment: 4 |
| adjustsStack: true |
| hasCalls: true |
| stackProtector: '' |
| maxCallFrameSize: 0 |
| cvBytesOfCalleeSavedRegisters: 0 |
| hasOpaqueSPAdjustment: false |
| hasVAStart: false |
| hasMustTailInVarArgFunc: false |
| localFrameSize: 0 |
| savePoint: '' |
| restorePoint: '' |
| fixedStack: [] |
| stack: |
| - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| callSites: [] |
| constants: [] |
| machineFunctionInfo: {} |
| body: | |
| ; CHECK-V7-LABEL: name: test_optsize |
| ; CHECK-V7: bb.0 (%ir-block.0): |
| ; CHECK-V7: successors: %bb.1(0x50000000), %bb.6(0x30000000) |
| ; CHECK-V7: liveins: $lr, $r7 |
| ; CHECK-V7: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V7: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V7: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V7: bb.1.b1: |
| ; CHECK-V7: successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| ; CHECK-V7: liveins: $r7, $lr |
| ; CHECK-V7: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr |
| ; CHECK-V7: frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| ; CHECK-V7: frame-setup CFI_INSTRUCTION offset $lr, -4 |
| ; CHECK-V7: frame-setup CFI_INSTRUCTION offset $r7, -8 |
| ; CHECK-V7: renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V7: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V7: t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V7: bb.2.b2: |
| ; CHECK-V7: successors: %bb.4(0x80000000) |
| ; CHECK-V7: tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0 |
| ; CHECK-V7: t2B %bb.4, 14 /* CC::al */, $noreg |
| ; CHECK-V7: bb.3.b3: |
| ; CHECK-V7: successors: %bb.4(0x80000000) |
| ; CHECK-V7: renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`) |
| ; CHECK-V7: renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V7: bb.4.b5: |
| ; CHECK-V7: successors: %bb.5(0x30000000), %bb.6(0x50000000) |
| ; CHECK-V7: liveins: $r0 |
| ; CHECK-V7: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V7: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr |
| ; CHECK-V7: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V7: bb.5.b8: |
| ; CHECK-V7: liveins: $lr, $r7 |
| ; CHECK-V7: tBX_RET 14 /* CC::al */, $noreg |
| ; CHECK-V7: bb.6.b7: |
| ; CHECK-V7: liveins: $lr, $r7 |
| ; CHECK-V7: tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp |
| ; CHECK-V8-LABEL: name: test_optsize |
| ; CHECK-V8: bb.0 (%ir-block.0): |
| ; CHECK-V8: successors: %bb.1(0x50000000), %bb.6(0x30000000) |
| ; CHECK-V8: liveins: $lr, $r7 |
| ; CHECK-V8: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V8: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V8: bb.1.b1: |
| ; CHECK-V8: successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| ; CHECK-V8: liveins: $r7, $lr |
| ; CHECK-V8: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr |
| ; CHECK-V8: frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| ; CHECK-V8: frame-setup CFI_INSTRUCTION offset $lr, -4 |
| ; CHECK-V8: frame-setup CFI_INSTRUCTION offset $r7, -8 |
| ; CHECK-V8: renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V8: t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V8: bb.2.b2: |
| ; CHECK-V8: successors: %bb.4(0x80000000) |
| ; CHECK-V8: tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0 |
| ; CHECK-V8: t2B %bb.4, 14 /* CC::al */, $noreg |
| ; CHECK-V8: bb.3.b3: |
| ; CHECK-V8: successors: %bb.4(0x80000000) |
| ; CHECK-V8: renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`) |
| ; CHECK-V8: renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V8: bb.4.b5: |
| ; CHECK-V8: successors: %bb.5(0x30000000), %bb.6(0x50000000) |
| ; CHECK-V8: liveins: $r0 |
| ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V8: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr |
| ; CHECK-V8: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V8: bb.5.b8: |
| ; CHECK-V8: liveins: $lr, $r7 |
| ; CHECK-V8: tBX_RET 14 /* CC::al */, $noreg |
| ; CHECK-V8: bb.6.b7: |
| ; CHECK-V8: liveins: $lr, $r7 |
| ; CHECK-V8: tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp |
| bb.0 (%ir-block.0): |
| successors: %bb.1(0x50000000), %bb.6(0x30000000) |
| liveins: $lr, $r7 |
| |
| renamable $r0 = t2MOVi 1, 14, $noreg, $noreg |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.6, 1, killed $cpsr |
| |
| bb.1.b1: |
| successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| liveins: $r7, $lr |
| |
| $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr |
| frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| frame-setup CFI_INSTRUCTION offset $lr, -4 |
| frame-setup CFI_INSTRUCTION offset $r7, -8 |
| renamable $r0 = t2MOVi 0, 14, $noreg, $noreg |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.3, 1, killed $cpsr |
| |
| bb.2.b2: |
| successors: %bb.4(0x80000000) |
| |
| tBL 14, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0 |
| t2B %bb.4, 14, $noreg |
| |
| bb.3.b3: |
| successors: %bb.4(0x80000000) |
| |
| renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14, $noreg :: (load 4 from `i32* undef`) |
| renamable $r0 = t2ANDri killed renamable $r0, 256, 14, $noreg, $noreg |
| |
| bb.4.b5: |
| successors: %bb.5(0x30000000), %bb.6(0x50000000) |
| liveins: $r0 |
| |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr |
| t2Bcc %bb.6, 1, killed $cpsr |
| |
| bb.5.b8: |
| liveins: $lr, $r7 |
| |
| tBX_RET 14, $noreg |
| |
| bb.6.b7: |
| liveins: $lr, $r7 |
| |
| tTAILJMPdND @extfunc, 14, $noreg, implicit $sp, implicit $sp |
| |
| ... |
| --- |
| name: test_minsize |
| alignment: 2 |
| exposesReturnsTwice: false |
| legalized: false |
| regBankSelected: false |
| selected: false |
| failedISel: false |
| tracksRegLiveness: true |
| hasWinCFI: false |
| registers: [] |
| liveins: [] |
| frameInfo: |
| isFrameAddressTaken: false |
| isReturnAddressTaken: false |
| hasStackMap: false |
| hasPatchPoint: false |
| stackSize: 8 |
| offsetAdjustment: 0 |
| maxAlignment: 4 |
| adjustsStack: true |
| hasCalls: true |
| stackProtector: '' |
| maxCallFrameSize: 0 |
| cvBytesOfCalleeSavedRegisters: 0 |
| hasOpaqueSPAdjustment: false |
| hasVAStart: false |
| hasMustTailInVarArgFunc: false |
| localFrameSize: 0 |
| savePoint: '' |
| restorePoint: '' |
| fixedStack: [] |
| stack: |
| - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| callSites: [] |
| constants: [] |
| machineFunctionInfo: {} |
| body: | |
| ; CHECK-V7-LABEL: name: test_minsize |
| ; CHECK-V7: bb.0 (%ir-block.0): |
| ; CHECK-V7: successors: %bb.1(0x50000000), %bb.6(0x30000000) |
| ; CHECK-V7: liveins: $lr, $r7 |
| ; CHECK-V7: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V7: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V7: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V7: bb.1.b1: |
| ; CHECK-V7: successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| ; CHECK-V7: liveins: $r7, $lr |
| ; CHECK-V7: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr |
| ; CHECK-V7: frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| ; CHECK-V7: frame-setup CFI_INSTRUCTION offset $lr, -4 |
| ; CHECK-V7: frame-setup CFI_INSTRUCTION offset $r7, -8 |
| ; CHECK-V7: renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V7: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V7: t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V7: bb.2.b2: |
| ; CHECK-V7: successors: %bb.4(0x80000000) |
| ; CHECK-V7: tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0 |
| ; CHECK-V7: t2B %bb.4, 14 /* CC::al */, $noreg |
| ; CHECK-V7: bb.3.b3: |
| ; CHECK-V7: successors: %bb.4(0x80000000) |
| ; CHECK-V7: renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`) |
| ; CHECK-V7: renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V7: bb.4.b5: |
| ; CHECK-V7: successors: %bb.5(0x30000000), %bb.6(0x50000000) |
| ; CHECK-V7: liveins: $r0 |
| ; CHECK-V7: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V7: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr |
| ; CHECK-V7: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V7: bb.5.b8: |
| ; CHECK-V7: liveins: $lr, $r7 |
| ; CHECK-V7: tBX_RET 14 /* CC::al */, $noreg |
| ; CHECK-V7: bb.6.b7: |
| ; CHECK-V7: liveins: $lr, $r7 |
| ; CHECK-V7: tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp |
| ; CHECK-V8-LABEL: name: test_minsize |
| ; CHECK-V8: bb.0 (%ir-block.0): |
| ; CHECK-V8: successors: %bb.1(0x50000000), %bb.6(0x30000000) |
| ; CHECK-V8: liveins: $lr, $r7 |
| ; CHECK-V8: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V8: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V8: bb.1.b1: |
| ; CHECK-V8: successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| ; CHECK-V8: liveins: $r7, $lr |
| ; CHECK-V8: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr |
| ; CHECK-V8: frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| ; CHECK-V8: frame-setup CFI_INSTRUCTION offset $lr, -4 |
| ; CHECK-V8: frame-setup CFI_INSTRUCTION offset $r7, -8 |
| ; CHECK-V8: renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V8: t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V8: bb.2.b2: |
| ; CHECK-V8: successors: %bb.4(0x80000000) |
| ; CHECK-V8: tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0 |
| ; CHECK-V8: t2B %bb.4, 14 /* CC::al */, $noreg |
| ; CHECK-V8: bb.3.b3: |
| ; CHECK-V8: successors: %bb.4(0x80000000) |
| ; CHECK-V8: renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`) |
| ; CHECK-V8: renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg |
| ; CHECK-V8: bb.4.b5: |
| ; CHECK-V8: successors: %bb.5(0x30000000), %bb.6(0x50000000) |
| ; CHECK-V8: liveins: $r0 |
| ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr |
| ; CHECK-V8: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr |
| ; CHECK-V8: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr |
| ; CHECK-V8: bb.5.b8: |
| ; CHECK-V8: liveins: $lr, $r7 |
| ; CHECK-V8: tBX_RET 14 /* CC::al */, $noreg |
| ; CHECK-V8: bb.6.b7: |
| ; CHECK-V8: liveins: $lr, $r7 |
| ; CHECK-V8: tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp |
| bb.0 (%ir-block.0): |
| successors: %bb.1(0x50000000), %bb.6(0x30000000) |
| liveins: $lr, $r7 |
| |
| renamable $r0 = t2MOVi 1, 14, $noreg, $noreg |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.6, 1, killed $cpsr |
| |
| bb.1.b1: |
| successors: %bb.3(0x40000000), %bb.2(0x40000000) |
| liveins: $r7, $lr |
| |
| $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr |
| frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| frame-setup CFI_INSTRUCTION offset $lr, -4 |
| frame-setup CFI_INSTRUCTION offset $r7, -8 |
| renamable $r0 = t2MOVi 0, 14, $noreg, $noreg |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.3, 1, killed $cpsr |
| |
| bb.2.b2: |
| successors: %bb.4(0x80000000) |
| |
| tBL 14, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0 |
| t2B %bb.4, 14, $noreg |
| |
| bb.3.b3: |
| successors: %bb.4(0x80000000) |
| |
| renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14, $noreg :: (load 4 from `i32* undef`) |
| renamable $r0 = t2ANDri killed renamable $r0, 256, 14, $noreg, $noreg |
| |
| bb.4.b5: |
| successors: %bb.5(0x30000000), %bb.6(0x50000000) |
| liveins: $r0 |
| |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr |
| t2Bcc %bb.6, 1, killed $cpsr |
| |
| bb.5.b8: |
| liveins: $lr, $r7 |
| |
| tBX_RET 14, $noreg |
| |
| bb.6.b7: |
| liveins: $lr, $r7 |
| |
| tTAILJMPdND @extfunc, 14, $noreg, implicit $sp, implicit $sp |
| |
| ... |
