tree eedaf105e2a9fcd497baa88a7e8b4c49f8bfdd0c
parent 4094c07d64c5071fad86158732bfaae891b0cba1
author Youling Tang <tangyouling@loongson.cn> 1668058459 +0800
committer Copybara-Service <copybara-worker@google.com> 1668058801 -0800

[sanitizer] Add the settings of Read and Write flags in SignalContext for LoongArch

The bit-30 in this `__flags` means the address error is due to memory load, and the
bit-31 means the address error is due to memory store. (see SC_ADDRERR_RD
and SC_ADDRERR_WR in kernel arch/loongarch/include/uapi/asm/sigcontext.h).

`illegal_write_test.cpp` and `illegal_read_test.cpp` have been tested and passed.

Reviewed By: SixWeining, xen0n, XiaodongLoong

Differential Revision: https://reviews.llvm.org/D137231

GitOrigin-RevId: 14cd113e69935e2de9c4d300c3ab01cf83c5d4db