[PowerPC] Add missed clang portion of c933c2eb3346

The clang portion of c933c2eb3346 was missed as I made
some kind of mistake squashing the commits with git.
This patch just adds those.

The original review: https://reviews.llvm.org/D114088

GitOrigin-RevId: dc1aa8eacd1e0e554f206cc15d730f37ea90c4ea
diff --git a/include/clang/Basic/BuiltinsPPC.def b/include/clang/Basic/BuiltinsPPC.def
index cd6b2df..4ba23f8 100644
--- a/include/clang/Basic/BuiltinsPPC.def
+++ b/include/clang/Basic/BuiltinsPPC.def
@@ -424,6 +424,12 @@
 BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "")
 BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "")
 
+// P8 BCD builtins.
+BUILTIN(__builtin_ppc_bcdadd, "V16UcV16UcV16UcIi", "")
+BUILTIN(__builtin_ppc_bcdsub, "V16UcV16UcV16UcIi", "")
+BUILTIN(__builtin_ppc_bcdadd_p, "iiV16UcV16Uc", "")
+BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "")
+
 BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "")
 BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "")
 BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "")
diff --git a/lib/Headers/altivec.h b/lib/Headers/altivec.h
index 3366e1f..55195b0 100644
--- a/lib/Headers/altivec.h
+++ b/lib/Headers/altivec.h
@@ -19,6 +19,10 @@
 #define __CR6_EQ_REV 1
 #define __CR6_LT 2
 #define __CR6_LT_REV 3
+#define __CR6_GT 4
+#define __CR6_GT_REV 5
+#define __CR6_SO 6
+#define __CR6_SO_REV 7
 
 /* Constants for vec_test_data_class */
 #define __VEC_CLASS_FP_SUBNORMAL_N (1 << 0)
@@ -19037,6 +19041,51 @@
 #endif /* __SIZEOF_INT128__ */
 #endif /* __POWER10_VECTOR__ */
 
+#ifdef __POWER8_VECTOR__
+#define __bcdadd(__a, __b, __ps) __builtin_ppc_bcdadd((__a), (__b), (__ps))
+#define __bcdsub(__a, __b, __ps) __builtin_ppc_bcdsub((__a), (__b), (__ps))
+
+static __inline__ long __bcdadd_ofl(vector unsigned char __a,
+                                    vector unsigned char __b) {
+  return __builtin_ppc_bcdadd_p(__CR6_SO, __a, __b);
+}
+
+static __inline__ long __bcdsub_ofl(vector unsigned char __a,
+                                    vector unsigned char __b) {
+  return __builtin_ppc_bcdsub_p(__CR6_SO, __a, __b);
+}
+
+static __inline__ long __bcd_invalid(vector unsigned char __a) {
+  return __builtin_ppc_bcdsub_p(__CR6_SO, __a, __a);
+}
+
+static __inline__ long __bcdcmpeq(vector unsigned char __a,
+                                  vector unsigned char __b) {
+  return __builtin_ppc_bcdsub_p(__CR6_EQ, __a, __b);
+}
+
+static __inline__ long __bcdcmplt(vector unsigned char __a,
+                                  vector unsigned char __b) {
+  return __builtin_ppc_bcdsub_p(__CR6_LT, __a, __b);
+}
+
+static __inline__ long __bcdcmpgt(vector unsigned char __a,
+                                  vector unsigned char __b) {
+  return __builtin_ppc_bcdsub_p(__CR6_GT, __a, __b);
+}
+
+static __inline__ long __bcdcmple(vector unsigned char __a,
+                                  vector unsigned char __b) {
+  return __builtin_ppc_bcdsub_p(__CR6_GT_REV, __a, __b);
+}
+
+static __inline__ long __bcdcmpge(vector unsigned char __a,
+                                  vector unsigned char __b) {
+  return __builtin_ppc_bcdsub_p(__CR6_LT_REV, __a, __b);
+}
+
+#endif // __POWER8_VECTOR__
+
 #undef __ATTRS_o_ai
 
 #endif /* __ALTIVEC_H */
diff --git a/test/CodeGen/builtins-ppc-p8vector.c b/test/CodeGen/builtins-ppc-p8vector.c
index 90e6de2..7825d69 100644
--- a/test/CodeGen/builtins-ppc-p8vector.c
+++ b/test/CodeGen/builtins-ppc-p8vector.c
@@ -1272,3 +1272,85 @@
 // CHECK: xor <4 x i32> {{%[0-9]+}}, <i32 -1, i32 -1, i32 -1, i32 -1>
 // CHECK: ret <4 x i32>
 }
+
+int test_bcd_invalid(vector unsigned char a) {
+  // CHECK-LABEL: test_bcd_invalid
+  // CHECK: call i32 @llvm.ppc.bcdsub.p(i32 6, <16 x i8>
+  // CHECK-LE-LABEL: test_bcd_invalid
+  // CHECK-LE: call i32 @llvm.ppc.bcdsub.p(i32 6, <16 x i8>
+  return __bcd_invalid(a);
+}
+
+vector unsigned char test_bcd_add(vector unsigned char a, vector unsigned char b,
+                              int ps) {
+  // CHECK-LABEL: test_bcd_add
+  // CHECK: call <16 x i8> @llvm.ppc.bcdadd(<16 x i8>
+  // CHECK-LE-LABEL: test_bcd_add
+  // CHECK-LE: call <16 x i8> @llvm.ppc.bcdadd(<16 x i8>
+  return __bcdadd(a, b, 1);
+}
+
+int test_bcd_add_ofl(vector unsigned char a, vector unsigned char b, long ps) {
+  // CHECK-LABEL: test_bcd_add_ofl
+  // CHECK: call i32 @llvm.ppc.bcdadd.p(i32 6, <16 x i8>
+  // CHECK-LE-LABEL: test_bcd_add_ofl
+  // CHECK-LE: call i32 @llvm.ppc.bcdadd.p(i32 6, <16 x i8>
+  return __bcdadd_ofl(a, b);
+}
+
+vector unsigned char test_bcd_sub(vector unsigned char a, vector unsigned char b,
+                              int ps) {
+  // CHECK-LABEL: test_bcd_sub
+  // CHECK: call <16 x i8> @llvm.ppc.bcdsub(<16 x i8>
+  // CHECK-LE-LABEL: test_bcd_sub
+  // CHECK-LE: call <16 x i8> @llvm.ppc.bcdsub(<16 x i8>
+  return __bcdsub(a, b, 0);
+}
+
+int test_bcd_sub_ofl(vector unsigned char a, vector unsigned char b, long ps) {
+  // CHECK-LABEL: test_bcd_sub_ofl
+  // CHECK: call i32 @llvm.ppc.bcdsub.p(i32 6, <16 x i8>
+  // CHECK-LE-LABEL: test_bcd_sub_ofl
+  // CHECK-LE: call i32 @llvm.ppc.bcdsub.p(i32 6, <16 x i8>
+  return __bcdsub_ofl(a, b);
+}
+
+int test_bcd_cmplt(vector unsigned char a, vector unsigned char b) {
+  // CHECK-LABEL: test_bcd_cmplt
+  // CHECK: call i32 @llvm.ppc.bcdsub.p(i32 2, <16 x i8>
+  // CHECK-LE-LABEL: test_bcd_cmplt
+  // CHECK-LE: call i32 @llvm.ppc.bcdsub.p(i32 2, <16 x i8>
+  return __bcdcmplt(a, b);
+}
+
+int test_bcd_cmpgt(vector unsigned char a, vector unsigned char b) {
+  // CHECK-LABEL: test_bcd_cmpgt
+  // CHECK: call i32 @llvm.ppc.bcdsub.p(i32 4, <16 x i8>
+  // CHECK-LE-LABEL: test_bcd_cmpgt
+  // CHECK-LE: call i32 @llvm.ppc.bcdsub.p(i32 4, <16 x i8>
+  return __bcdcmpgt(a, b);
+}
+
+int test_bcd_cmpeq(vector unsigned char a, vector unsigned char b) {
+  // CHECK-LABEL: test_bcd_cmpeq
+  // CHECK: call i32 @llvm.ppc.bcdsub.p(i32 0, <16 x i8>
+  // CHECK-LE-LABEL: test_bcd_cmpeq
+  // CHECK-LE: call i32 @llvm.ppc.bcdsub.p(i32 0, <16 x i8>
+  return __bcdcmpeq(a, b);
+}
+
+int test_bcd_cmpge(vector unsigned char a, vector unsigned char b) {
+  // CHECK-LABEL: test_bcd_cmpge
+  // CHECK: call i32 @llvm.ppc.bcdsub.p(i32 3, <16 x i8>
+  // CHECK-LE-LABEL: test_bcd_cmpge
+  // CHECK-LE: call i32 @llvm.ppc.bcdsub.p(i32 3, <16 x i8>
+  return __bcdcmpge(a, b);
+}
+
+int test_bcd_cmple(vector unsigned char a, vector unsigned char b) {
+  // CHECK-LABEL: test_bcd_cmple
+  // CHECK: call i32 @llvm.ppc.bcdsub.p(i32 5, <16 x i8>
+  // CHECK-LE-LABEL: test_bcd_cmple
+  // CHECK-LE: call i32 @llvm.ppc.bcdsub.p(i32 5, <16 x i8>
+  return __bcdcmple(a, b);
+}