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llvm / llvm-project / 5048a0858beb15bdd203dee89dd4df9b2a72ba5f / llvm / test / CodeGen / RISCV / div-by-constant.ll
  1. 9122c52 [RISCV] Enable bidirectional scheduling and tracking register pressure (#115445) by Pengcheng Wang · 7 months ago
  2. aef0e77 [DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (#114992) by Simon Pilgrim · 8 months ago
  3. eabaee0 [RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467) by Fangrui Song · 1 year, 5 months ago
  4. 8624075 [RISCV] Strip W suffix from ADDIW (#68425) by Philip Reames · 1 year, 9 months ago
  5. 38f7c7e Revert "Revert "[RISCV] Add special case to selectImm for constants that can be created with (ADD (SLLI C, 32), C)."" by Florian Mayer · 2 years ago
  6. d5fbec3 Revert "[RISCV] Add special case to selectImm for constants that can be created with (ADD (SLLI C, 32), C)." by Florian Mayer · 2 years ago
  7. 58b2d65 [RISCV] Add special case to selectImm for constants that can be created with (ADD (SLLI C, 32), C). by Craig Topper · 2 years ago
  8. cbbcb10 [RISCV] Refine the (mul (zext.w X), C) -> mulhu isel heuristic. by Craig Topper · 2 years, 5 months ago
  9. 86eff6be [MachineCombiner] Use default latency model when no detailed model available by Philip Reames · 2 years, 5 months ago
  10. 002005e [RISCV] Add integer scalar instructions to isAssociativeAndCommutative by Hsiangkai Wang · 2 years, 6 months ago
  11. d64d3c5 [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility by Nitin John Raj · 2 years, 6 months ago
  12. e00e20a [RISCV] Add ADDW/AND/OR/XOR/SUB/SUBW to getRegAllocHints. by Craig Topper · 2 years, 7 months ago
  13. 64612f5 [RISCV] Add ADD to getRegAllocationHints to improve to improve use of c.add. by Craig Topper · 2 years, 7 months ago
  14. 38ffa2b [LegalizeTypes] Improve splitting for urem/udiv by constant for some constants. by Craig Topper · 2 years, 9 months ago
  15. 79016f6 [RISCV] Refine the heuristics for our custom (mul (and X, C2), C1) isel. by Craig Topper · 3 years ago
  16. 1903b99 [RISCV] Always select (and (srl X, C), Mask) as (srli (slli X, C2), C3). by Craig Topper · 3 years, 2 months ago
  17. 33d008b [RISCV] Update recently ratified Zb{a,b,c,s} extensions to no longer be experimental by Alex Bradbury · 3 years, 5 months ago
  18. b645bcd [RISCV] Generalize (srl (and X, 0xffff), C) -> (srli (slli X, (XLen-16), (XLen-16) + C) optimization. by Craig Topper · 3 years, 5 months ago
  19. 296e8ca [RISCV] Isel (sra (sext_inreg X, i16), C) -> (srai (slli X, (XLen-16), (XLen-16) + C). by Craig Topper · 3 years, 5 months ago
  20. 2dd52f8 [RISCV] Fold (srl (and X, 0xffff), C)->(srli (slli X, (XLen-16), (XLen-16) + C) even with Zbb/Zbp. by Craig Topper · 3 years, 5 months ago
  21. 41454ab [RISCV] Use constant pool for large integers by wangpc · 3 years, 6 months ago
  22. 015ff72 [RISCV] Add a few more instructions to hasAllNBitUsers. by Craig Topper · 3 years, 6 months ago
  23. f7b096d [RISCV] Add more div by constant test cases. by Craig Topper · 3 years, 6 months ago