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llvm/llvm-project/refs/heads/users/shiltian/amdgpu-thinlto-summary-block/./llvm/test/CodeGen/RISCV/GlobalISel
tree: 95905abbc254a8a0afc6f1761768f1667d429b7c
  1. instruction-select/
  2. irtranslator/
  3. legalizer/
  4. regbankselect/
  5. rvv/
  6. add-imm.ll
  7. addiw-sext-inreg.ll
  8. alu-roundtrip-rv64.ll
  9. alu-roundtrip.ll
  10. atomic-cmpxchg.ll
  11. atomic-fence.ll
  12. atomic-load-store-fp.ll
  13. atomic-load-store.ll
  14. atomicrmw-add-sub.ll
  15. bitmanip.ll
  16. calllowering-ret.ll
  17. calls.ll
  18. combine-neg-abs.ll
  19. combine.ll
  20. combine.mir
  21. constantpool.ll
  22. constbarrier-rv32.ll
  23. constbarrier-rv64.ll
  24. div-by-constant.ll
  25. double-arith.ll
  26. double-convert.ll
  27. double-fcmp.ll
  28. double-intrinsics.ll
  29. double-zfa.ll
  30. fastcc-float.ll
  31. float-arith.ll
  32. float-convert.ll
  33. float-fclass.ll
  34. float-fcmp.ll
  35. float-intrinsics.ll
  36. float-zfa.ll
  37. fp-fcanonicalize.ll
  38. fp128.ll
  39. fpr-gpr-copy-rv32.ll
  40. fpr-gpr-copy-rv64.ll
  41. freeze.ll
  42. get-register-noreserve.ll
  43. ghccc-rv32.ll
  44. ghccc-rv64.ll
  45. gisel-commandline-option.ll
  46. half-zfa.ll
  47. iabs.ll
  48. irtranslator-calllowering.ll
  49. irtranslator-inline-asm.ll
  50. jumptable.ll
  51. knownbits-copy-crash.mir
  52. legalizer-info-validation.mir
  53. libcalls.ll
  54. memcpy-inline.ll
  55. phi.ll
  56. riscv-unsupported.ll
  57. rotl-rotr.ll
  58. rv32p.ll
  59. rv32zba.ll
  60. rv32zbb-zbkb.ll
  61. rv32zbb.ll
  62. rv32zbkb.ll
  63. rv64-double-convert.ll
  64. rv64-float-convert.ll
  65. rv64p.ll
  66. rv64zba.ll
  67. rv64zbb-zbkb.ll
  68. rv64zbb.ll
  69. rv64zbkb.ll
  70. scalablevec-combiner-crash.ll
  71. scmp.ll
  72. shift.ll
  73. shifts.ll
  74. stacksave-stackrestore.ll
  75. store-fp-zero-to-x0.ll
  76. ucmp.ll
  77. vararg.ll
  78. wide-scalar-shift-by-byte-multiple-legalization.ll