; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,SI,GCN-SDAG,SI-SDAG %s
; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,SI,GCN-GISEL,SI-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,VI,GCN-SDAG,VI-SDAG %s
; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,VI,GCN-GISEL,VI-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX900,GCN-SDAG,GFX900-SDAG %s
; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX900,GCN-GISEL,GFX900-GISEL %s

define double @v_exp10_f64(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call double @llvm.exp10.f64(double %in)
  ret double %result
}

define <2 x double> @v_exp10_v2f64(<2 x double> %in) #0 {
; SI-SDAG-LABEL: v_exp10_v2f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[4:5], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s28, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v16, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v7, s28, v16, v5
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0
; SI-SDAG-NEXT:    v_add_f64 v[8:9], v[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s6, -1
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[7:8], v[8:9], -v[6:7]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[4:5]|, s[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s8, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v5, v8, v5, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v4, v7, v4, vcc
; SI-SDAG-NEXT:    s_mov_b32 s9, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[4:5], s[8:9], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s10, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s11, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[4:5], s[10:11], v[7:8]
; SI-SDAG-NEXT:    s_mov_b32 s12, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s13, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[9:10], v[7:8], s[12:13]
; SI-SDAG-NEXT:    v_mul_f64 v[14:15], v[2:3], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s14, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s15, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[7:8], s[14:15], v[9:10]
; SI-SDAG-NEXT:    v_bfi_b32 v7, s28, v16, v15
; SI-SDAG-NEXT:    v_add_f64 v[16:17], v[14:15], v[6:7]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[14:15]|, s[6:7]
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[16:17], -v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s16, 0xfca7ab0c
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v7, v7, v15, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v6, v6, v14, vcc
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], s[8:9], v[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s17, 0x3e928af3
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], s[10:11], v[14:15]
; SI-SDAG-NEXT:    v_mov_b32_e32 v10, s16
; SI-SDAG-NEXT:    s_mov_b32 s18, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s19, 0x3e5ade15
; SI-SDAG-NEXT:    v_mov_b32_e32 v11, s17
; SI-SDAG-NEXT:    v_mul_f64 v[16:17], v[14:15], s[12:13]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], s[18:19], v[10:11]
; SI-SDAG-NEXT:    s_mov_b32 s16, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s17, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], s[14:15], v[16:17]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
; SI-SDAG-NEXT:    s_mov_b32 s20, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s21, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[14:15], s[18:19], v[10:11]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
; SI-SDAG-NEXT:    s_mov_b32 s22, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s23, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[14:15], v[10:11], s[16:17]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], s[22:23]
; SI-SDAG-NEXT:    s_mov_b32 s24, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s25, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[14:15], v[10:11], s[20:21]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], s[24:25]
; SI-SDAG-NEXT:    s_mov_b32 s26, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s27, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[14:15], v[10:11], s[22:23]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], s[26:27]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[14:15], v[10:11], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s6, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[14:15], v[10:11], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], s[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s8, 11
; SI-SDAG-NEXT:    s_mov_b32 s9, 0x3fe00000
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v16, v[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[14:15], v[10:11], s[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], s[8:9]
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[14:15], v[4:5], s[6:7]
; SI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[14:15], v[4:5], s[8:9]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], v[12:13], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x40900000
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[14:15], v[4:5], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s8, 0
; SI-SDAG-NEXT:    s_mov_b32 s9, 0xc090cc00
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v6, v[6:7]
; SI-SDAG-NEXT:    v_ldexp_f64 v[8:9], v[8:9], v16
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[6:7], v[0:1]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[8:9], v[0:1]
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[14:15], v[4:5], 1.0
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v9, v7, v9, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v9, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v8, vcc
; SI-SDAG-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v6
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[6:7], v[2:3]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[8:9], v[2:3]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v5, v7, v5, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v5, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v4, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_v2f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[4:5], v[0:1], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v9, 0x80000000, v5
; SI-GISEL-NEXT:    v_or_b32_e32 v9, 0x43300000, v9
; SI-GISEL-NEXT:    v_add_f64 v[10:11], v[4:5], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[9:10], v[10:11], -v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, -1
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[4:5]|, v[11:12]
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[2:3], v[6:7]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v4, v9, v4, vcc
; SI-GISEL-NEXT:    v_and_b32_e32 v9, 0x80000000, v7
; SI-GISEL-NEXT:    v_or_b32_e32 v9, 0x43300000, v9
; SI-GISEL-NEXT:    v_add_f64 v[13:14], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v5, v10, v5, vcc
; SI-GISEL-NEXT:    v_add_f64 v[8:9], v[13:14], -v[8:9]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[6:7]|, v[11:12]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xa994fd21
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v6, v8, v6, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v7, v9, v7, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x509f79ff
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fd34413
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[4:5], v[8:9], v[0:1]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[6:7], v[8:9], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[4:5], v[12:13], v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[6:7], v[12:13], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[14:15], v[10:11], v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v16, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x40026bb1
; SI-GISEL-NEXT:    v_mul_f64 v[12:13], v[8:9], v[12:13]
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[16:17], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[16:17], v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[16:17], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x40900000
; SI-GISEL-NEXT:    v_mov_b32_e32 v16, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v17, 0xc090cc00
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[14:15]
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[16:17]
; SI-GISEL-NEXT:    v_fma_f64 v[0:1], v[8:9], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[0:1], 1.0
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v0, v[4:5]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v4, v[6:7]
; SI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[10:11], v0
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x7ff00000
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v10, v1, vcc
; SI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[8:9], v4
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[2:3], v[14:15]
; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[2:3], v[16:17]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v4, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v10, v5, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v4, s[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[4:5]
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_v2f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[4:5], v[0:1], s[4:5]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[2:3], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s6, 0xfca7ab0c
; VI-SDAG-NEXT:    s_mov_b32 s8, 0
; VI-SDAG-NEXT:    s_mov_b32 s9, 0xc090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], s[4:5], v[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], s[4:5], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], s[4:5], v[10:11]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v4, v[4:5]
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v6, v[6:7]
; VI-SDAG-NEXT:    v_mul_f64 v[12:13], v[8:9], s[4:5]
; VI-SDAG-NEXT:    v_mul_f64 v[14:15], v[10:11], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], s[4:5], v[12:13]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], s[4:5], v[14:15]
; VI-SDAG-NEXT:    v_mov_b32_e32 v13, s7
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_mov_b32_e32 v12, s6
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x40900000
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], s[4:5], v[12:13]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], s[4:5], v[12:13]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[6:7], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[8:9], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[8:9], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], v[14:15], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], v[12:13], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[4:5], v[8:9], v4
; VI-SDAG-NEXT:    v_ldexp_f64 v[6:7], v[10:11], v6
; VI-SDAG-NEXT:    v_mov_b32_e32 v8, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v5, v8, v5, vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v8, v7, s[6:7]
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v0, s[8:9]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[8:9], s[6:7]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v5, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v6, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_v2f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[0:1], v[4:5]
; VI-GISEL-NEXT:    v_mul_f64 v[4:5], v[2:3], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v16, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[6:7], v[8:9], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[4:5], v[8:9], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[4:5], v[12:13], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[6:7]
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v7, v[4:5]
; VI-GISEL-NEXT:    v_mul_f64 v[14:15], v[10:11], v[12:13]
; VI-GISEL-NEXT:    v_mul_f64 v[12:13], v[8:9], v[12:13]
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[16:17], v[12:13]
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], v[10:11], v[16:17], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[14:15], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[12:13], 1.0
; VI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[10:11], v6
; VI-GISEL-NEXT:    v_ldexp_f64 v[6:7], v[8:9], v7
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40900000
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[8:9]
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[8:9]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[6:7], v[0:1], v[10:11]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], v[2:3], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v4, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v6, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v0, v5, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v5, v0, v7, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v4, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v1, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v5, s[8:9]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_v2f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[4:5], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[2:3], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    s_mov_b32 s8, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s9, 0xc090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], s[4:5], v[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], s[4:5], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], s[4:5], v[10:11]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v4, v[4:5]
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v6, v[6:7]
; GFX900-SDAG-NEXT:    v_mul_f64 v[12:13], v[8:9], s[4:5]
; GFX900-SDAG-NEXT:    v_mul_f64 v[14:15], v[10:11], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], s[4:5], v[12:13]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], s[4:5], v[14:15]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v13, s7
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v12, s6
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x40900000
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], s[4:5], v[12:13]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], s[4:5], v[12:13]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[6:7], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[4:5]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[8:9], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[8:9], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], v[14:15], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], v[14:15], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], v[12:13], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[4:5], v[8:9], v4
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[6:7], v[10:11], v6
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v8, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v5, v8, v5, vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v8, v7, s[6:7]
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v0, s[8:9]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[8:9], s[6:7]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v5, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v6, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_v2f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[0:1], v[4:5]
; GFX900-GISEL-NEXT:    v_mul_f64 v[4:5], v[2:3], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v16, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v17, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], -v[6:7], v[8:9], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], -v[4:5], v[8:9], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], -v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], -v[4:5], v[12:13], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[6:7]
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v7, v[4:5]
; GFX900-GISEL-NEXT:    v_mul_f64 v[14:15], v[10:11], v[12:13]
; GFX900-GISEL-NEXT:    v_mul_f64 v[12:13], v[8:9], v[12:13]
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[16:17], v[12:13]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], v[10:11], v[16:17], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[14:15], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[12:13], 1.0
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[10:11], v6
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[6:7], v[8:9], v7
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40900000
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[8:9]
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[8:9]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[6:7], v[0:1], v[10:11]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], v[2:3], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v4, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v6, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v3, v0, v5, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v5, v0, v7, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v4, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v1, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v5, s[8:9]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call <2 x double> @llvm.exp10.v2f64(<2 x double> %in)
  ret <2 x double> %result
}

define <3 x double> @v_exp10_v3f64(<3 x double> %in) #0 {
; SI-SDAG-LABEL: v_exp10_v3f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s8, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s9, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[8:9], v[0:1], s[8:9]
; SI-SDAG-NEXT:    s_brev_b32 s60, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v10, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v7, s60, v10, v9
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0
; SI-SDAG-NEXT:    v_add_f64 v[11:12], v[8:9], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s10, -1
; SI-SDAG-NEXT:    s_mov_b32 s11, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[11:12], v[11:12], -v[6:7]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[8:9]|, s[10:11]
; SI-SDAG-NEXT:    s_mov_b32 s12, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v12, v12, v9, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v11, v11, v8, vcc
; SI-SDAG-NEXT:    s_mov_b32 s13, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[11:12], s[12:13], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s14, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s15, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[11:12], s[14:15], v[7:8]
; SI-SDAG-NEXT:    s_mov_b32 s16, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s17, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[13:14], v[7:8], s[16:17]
; SI-SDAG-NEXT:    s_mov_b32 s18, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s19, 0x40026bb1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e928af3
; SI-SDAG-NEXT:    v_fma_f64 v[13:14], v[7:8], s[18:19], v[13:14]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v9, s5
; SI-SDAG-NEXT:    s_mov_b32 s20, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s21, 0x3e5ade15
; SI-SDAG-NEXT:    v_mov_b32_e32 v8, s4
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], s[20:21], v[8:9]
; SI-SDAG-NEXT:    s_mov_b32 s22, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s23, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], v[15:16], s[22:23]
; SI-SDAG-NEXT:    s_mov_b32 s24, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s25, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], v[15:16], s[24:25]
; SI-SDAG-NEXT:    s_mov_b32 s26, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s27, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], v[15:16], s[26:27]
; SI-SDAG-NEXT:    s_mov_b32 s28, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s29, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], v[15:16], s[28:29]
; SI-SDAG-NEXT:    s_mov_b32 s40, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s41, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], v[15:16], s[40:41]
; SI-SDAG-NEXT:    s_mov_b32 s42, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s43, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], v[15:16], s[42:43]
; SI-SDAG-NEXT:    s_mov_b32 s44, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s45, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], v[15:16], s[44:45]
; SI-SDAG-NEXT:    s_mov_b32 s56, 11
; SI-SDAG-NEXT:    s_mov_b32 s57, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], v[15:16], s[56:57]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v7, v[11:12]
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], v[15:16], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s46, 0
; SI-SDAG-NEXT:    v_fma_f64 v[11:12], v[13:14], v[15:16], 1.0
; SI-SDAG-NEXT:    v_mul_f64 v[13:14], v[2:3], s[8:9]
; SI-SDAG-NEXT:    v_ldexp_f64 v[11:12], v[11:12], v7
; SI-SDAG-NEXT:    v_bfi_b32 v7, s60, v10, v14
; SI-SDAG-NEXT:    v_add_f64 v[15:16], v[13:14], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s47, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s58, 0
; SI-SDAG-NEXT:    s_mov_b32 s59, 0xc090cc00
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[46:47], v[0:1]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[58:59], v[0:1]
; SI-SDAG-NEXT:    v_add_f64 v[0:1], v[15:16], -v[6:7]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 s[6:7], |v[13:14]|, s[10:11]
; SI-SDAG-NEXT:    v_mov_b32_e32 v21, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v14, v1, v14, s[6:7]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v13, v0, v13, s[6:7]
; SI-SDAG-NEXT:    v_mul_f64 v[0:1], v[4:5], s[8:9]
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], s[12:13], v[2:3]
; SI-SDAG-NEXT:    v_bfi_b32 v7, s60, v10, v1
; SI-SDAG-NEXT:    v_add_f64 v[17:18], v[0:1], v[6:7]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 s[6:7], |v[0:1]|, s[10:11]
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[17:18], -v[6:7]
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[13:14], s[14:15], v[15:16]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v7, v7, v1, s[6:7]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v6, v6, v0, s[6:7]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[6:7], s[12:13], v[4:5]
; SI-SDAG-NEXT:    v_mul_f64 v[17:18], v[15:16], s[16:17]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[6:7], s[14:15], v[0:1]
; SI-SDAG-NEXT:    v_fma_f64 v[15:16], v[15:16], s[18:19], v[17:18]
; SI-SDAG-NEXT:    v_mul_f64 v[17:18], v[0:1], s[16:17]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v12, v21, v12, vcc
; SI-SDAG-NEXT:    v_fma_f64 v[17:18], v[0:1], s[18:19], v[17:18]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[15:16], s[20:21], v[8:9]
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_fma_f64 v[19:20], v[15:16], v[0:1], s[22:23]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], s[20:21], v[8:9]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v11, vcc
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[15:16], v[19:20], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], s[22:23]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[15:16], v[10:11], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[15:16], v[10:11], s[28:29]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[15:16], v[10:11], s[40:41]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], s[28:29]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[15:16], v[10:11], s[42:43]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], s[40:41]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[15:16], v[10:11], s[44:45]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], s[42:43]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[15:16], v[10:11], s[56:57]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], s[44:45]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v12, s[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[15:16], v[10:11], 1.0
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v12, v[13:14]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], s[56:57]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[15:16], v[10:11], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], 1.0
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v6, v[6:7]
; SI-SDAG-NEXT:    v_ldexp_f64 v[10:11], v[10:11], v12
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[46:47], v[2:3]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[58:59], v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[17:18], v[8:9], 1.0
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v7, v21, v11, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v7, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v10, vcc
; SI-SDAG-NEXT:    v_ldexp_f64 v[6:7], v[8:9], v6
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[46:47], v[4:5]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[58:59], v[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v7, v21, v7, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v7, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v4, 0, v6, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_v3f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[0:1], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v8, 0x80000000, v7
; SI-GISEL-NEXT:    v_or_b32_e32 v13, 0x43300000, v8
; SI-GISEL-NEXT:    v_add_f64 v[14:15], v[6:7], v[12:13]
; SI-GISEL-NEXT:    v_mul_f64 v[16:17], v[2:3], v[10:11]
; SI-GISEL-NEXT:    v_add_f64 v[14:15], v[14:15], -v[12:13]
; SI-GISEL-NEXT:    v_and_b32_e32 v13, 0x80000000, v17
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_or_b32_e32 v13, 0x43300000, v13
; SI-GISEL-NEXT:    v_add_f64 v[18:19], v[16:17], v[12:13]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[6:7]|, v[8:9]
; SI-GISEL-NEXT:    v_add_f64 v[18:19], v[18:19], -v[12:13]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v14, v14, v6, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v15, v15, v7, vcc
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[16:17]|, v[8:9]
; SI-GISEL-NEXT:    v_mul_f64 v[10:11], v[4:5], v[10:11]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v6, v18, v16, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v7, v19, v17, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v16, 0x509f79ff
; SI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x3fd34413
; SI-GISEL-NEXT:    v_fma_f64 v[18:19], -v[14:15], v[16:17], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v20, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v21, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[18:19], -v[14:15], v[20:21], v[18:19]
; SI-GISEL-NEXT:    v_and_b32_e32 v13, 0x80000000, v11
; SI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v23, 0xbcaf48ad
; SI-GISEL-NEXT:    v_or_b32_e32 v13, 0x43300000, v13
; SI-GISEL-NEXT:    v_mul_f64 v[26:27], v[18:19], v[22:23]
; SI-GISEL-NEXT:    v_add_f64 v[24:25], v[10:11], v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v28, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v29, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[18:19], v[18:19], v[28:29], v[26:27]
; SI-GISEL-NEXT:    v_add_f64 v[12:13], v[24:25], -v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v24, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v25, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v26, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3e928af3
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[10:11]|, v[8:9]
; SI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[24:25], v[26:27]
; SI-GISEL-NEXT:    v_mov_b32_e32 v32, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v33, 0x3ec71dee
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v8, v12, v10, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v9, v13, v11, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[30:31], v[32:33]
; SI-GISEL-NEXT:    v_fma_f64 v[30:31], -v[6:7], v[16:17], v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], -v[8:9], v[16:17], v[4:5]
; SI-GISEL-NEXT:    v_fma_f64 v[30:31], -v[6:7], v[20:21], v[30:31]
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], -v[8:9], v[20:21], v[16:17]
; SI-GISEL-NEXT:    v_mul_f64 v[48:49], v[30:31], v[22:23]
; SI-GISEL-NEXT:    v_mul_f64 v[22:23], v[16:17], v[22:23]
; SI-GISEL-NEXT:    v_fma_f64 v[30:31], v[30:31], v[28:29], v[48:49]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[10:11], v[12:13]
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[16:17], v[28:29], v[22:23]
; SI-GISEL-NEXT:    v_fma_f64 v[28:29], v[30:31], v[24:25], v[26:27]
; SI-GISEL-NEXT:    v_mov_b32_e32 v34, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v35, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[10:11], v[34:35]
; SI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[26:27]
; SI-GISEL-NEXT:    v_fma_f64 v[26:27], v[30:31], v[28:29], v[32:33]
; SI-GISEL-NEXT:    v_mov_b32_e32 v36, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v37, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[10:11], v[36:37]
; SI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[32:33]
; SI-GISEL-NEXT:    v_fma_f64 v[26:27], v[30:31], v[26:27], v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v38, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v39, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[10:11], v[38:39]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[24:25], v[12:13]
; SI-GISEL-NEXT:    v_fma_f64 v[24:25], v[30:31], v[26:27], v[34:35]
; SI-GISEL-NEXT:    v_mov_b32_e32 v50, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v51, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[10:11], v[50:51]
; SI-GISEL-NEXT:    v_fma_f64 v[24:25], v[30:31], v[24:25], v[36:37]
; SI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[10:11], v[20:21]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v26, v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[30:31], v[24:25], v[38:39]
; SI-GISEL-NEXT:    v_mov_b32_e32 v48, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v49, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[34:35]
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[10:11], v[48:49]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[30:31], v[14:15], v[50:51]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[36:37]
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[10:11], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[30:31], v[14:15], v[20:21]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[38:39]
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[18:19], v[10:11], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[30:31], v[14:15], v[48:49]
; SI-GISEL-NEXT:    v_mov_b32_e32 v18, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v19, 0x40900000
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[50:51]
; SI-GISEL-NEXT:    v_ldexp_f64 v[10:11], v[10:11], v26
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[18:19]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[30:31], v[14:15], 1.0
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v22, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v23, 0xc090cc00
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[20:21]
; SI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x7ff00000
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v10, 0, v10, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[30:31], v[14:15], 1.0
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v11, v20, v11, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[22:23]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[48:49]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v10, vcc
; SI-GISEL-NEXT:    v_ldexp_f64 v[6:7], v[14:15], v6
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v11, vcc
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[2:3], v[18:19]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[8:9]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v10, 0, v6, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v11, v20, v7, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[16:17], v[12:13], 1.0
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[2:3], v[22:23]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[16:17], v[6:7], 1.0
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v10, vcc
; SI-GISEL-NEXT:    v_ldexp_f64 v[6:7], v[6:7], v8
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, 0, v11, vcc
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[4:5], v[18:19]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v6, 0, v6, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v7, v20, v7, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[4:5], v[22:23]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v6, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v5, 0, v7, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_v3f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[0:1], s[4:5]
; VI-SDAG-NEXT:    v_mul_f64 v[8:9], v[2:3], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xbfd34413
; VI-SDAG-NEXT:    v_mul_f64 v[12:13], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    s_mov_b32 s8, 0x494ea3e9
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[8:9], v[8:9]
; VI-SDAG-NEXT:    s_mov_b32 s9, 0xbcaf48ad
; VI-SDAG-NEXT:    s_mov_b32 s10, 0x623fde64
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[12:13], v[12:13]
; VI-SDAG-NEXT:    s_mov_b32 s11, 0x3ec71dee
; VI-SDAG-NEXT:    s_mov_b32 s12, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s13, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], s[6:7], v[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s14, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s15, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], s[6:7], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x40026bb1
; VI-SDAG-NEXT:    s_mov_b32 s16, 0x555502a1
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], s[4:5], v[10:11]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], s[4:5], v[14:15]
; VI-SDAG-NEXT:    s_mov_b32 s17, 0x3fa55555
; VI-SDAG-NEXT:    s_mov_b32 s18, 0x55555511
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], s[4:5], v[18:19]
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xfca7ab0c
; VI-SDAG-NEXT:    s_mov_b32 s19, 0x3fc55555
; VI-SDAG-NEXT:    v_mul_f64 v[16:17], v[10:11], s[8:9]
; VI-SDAG-NEXT:    s_mov_b32 s20, 11
; VI-SDAG-NEXT:    s_mov_b32 s21, 0x3fe00000
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v12, v[12:13]
; VI-SDAG-NEXT:    v_mov_b32_e32 v13, 0x7ff00000
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], s[6:7], v[16:17]
; VI-SDAG-NEXT:    v_mul_f64 v[16:17], v[14:15], s[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], s[6:7], v[16:17]
; VI-SDAG-NEXT:    v_mul_f64 v[16:17], v[18:19], s[8:9]
; VI-SDAG-NEXT:    s_mov_b32 s8, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s9, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[18:19], s[6:7], v[16:17]
; VI-SDAG-NEXT:    v_mov_b32_e32 v19, s5
; VI-SDAG-NEXT:    v_mov_b32_e32 v18, s4
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], s[8:9], v[18:19]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[10:11]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[12:13]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[14:15]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], v[20:21], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], s[8:9], v[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], s[8:9], v[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[10:11]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[10:11]
; VI-SDAG-NEXT:    s_mov_b32 s10, 0
; VI-SDAG-NEXT:    s_mov_b32 s11, 0x40900000
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[10:11], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[6:7]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[10:11], v[2:3]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[10:11], s[10:11], v[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[12:13]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[12:13]
; VI-SDAG-NEXT:    s_mov_b32 s12, 0
; VI-SDAG-NEXT:    s_mov_b32 s13, 0xc090cc00
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[12:13], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[12:13], v[2:3]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[12:13], v[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[14:15]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[14:15]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], v[20:21], 1.0
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v20, v[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[16:17], v[18:19], 1.0
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v21, v[8:9]
; VI-SDAG-NEXT:    v_ldexp_f64 v[8:9], v[10:11], v20
; VI-SDAG-NEXT:    v_ldexp_f64 v[10:11], v[14:15], v21
; VI-SDAG-NEXT:    v_ldexp_f64 v[6:7], v[6:7], v12
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v9, v13, v9, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v9, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v13, v11, s[6:7]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v0, s[8:9]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, v13, v7, s[10:11]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v8, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[8:9], s[6:7]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v2, s[12:13]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v10, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[12:13], s[10:11]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v4, 0, v6, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_v3f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[0:1], v[8:9]
; VI-GISEL-NEXT:    v_mul_f64 v[10:11], v[2:3], v[8:9]
; VI-GISEL-NEXT:    v_mul_f64 v[8:9], v[4:5], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v16, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v17, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x494ea3e9
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[10:11], v[10:11]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[8:9], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0xbcaf48ad
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], -v[6:7], v[12:13], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], -v[10:11], v[12:13], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], -v[8:9], v[12:13], v[4:5]
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], -v[6:7], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], -v[10:11], v[16:17], v[18:19]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], -v[8:9], v[16:17], v[12:13]
; VI-GISEL-NEXT:    v_mov_b32_e32 v16, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x40026bb1
; VI-GISEL-NEXT:    v_mul_f64 v[22:23], v[14:15], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], v[14:15], v[16:17], v[22:23]
; VI-GISEL-NEXT:    v_mul_f64 v[22:23], v[18:19], v[20:21]
; VI-GISEL-NEXT:    v_mul_f64 v[20:21], v[12:13], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[18:19], v[16:17], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_mov_b32_e32 v16, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[22:23], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[18:19], v[24:25], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], v[14:15], v[20:21], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v20, v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[18:19], v[22:23], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[12:13], v[16:17], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v16, v[10:11]
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v17, v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x40900000
; VI-GISEL-NEXT:    v_ldexp_f64 v[8:9], v[14:15], v20
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0xc090cc00
; VI-GISEL-NEXT:    v_ldexp_f64 v[14:15], v[18:19], v16
; VI-GISEL-NEXT:    v_ldexp_f64 v[6:7], v[6:7], v17
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[12:13]
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[12:13]
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[6:7], v[4:5], v[12:13]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], v[0:1], v[10:11]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[10:11], v[2:3], v[10:11]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[12:13], v[4:5], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v16, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v8, 0, v8, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v14, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v6, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v5, v16, v9, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v6, v16, v15, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v7, v16, v7, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v8, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v1, s[10:11]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v3, s[12:13]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v5, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v6, s[10:11]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, v7, s[12:13]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_v3f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    v_mul_f64 v[8:9], v[2:3], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xbfd34413
; GFX900-SDAG-NEXT:    v_mul_f64 v[12:13], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    s_mov_b32 s8, 0x494ea3e9
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[8:9], v[8:9]
; GFX900-SDAG-NEXT:    s_mov_b32 s9, 0xbcaf48ad
; GFX900-SDAG-NEXT:    s_mov_b32 s10, 0x623fde64
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[12:13], v[12:13]
; GFX900-SDAG-NEXT:    s_mov_b32 s11, 0x3ec71dee
; GFX900-SDAG-NEXT:    s_mov_b32 s12, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s13, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], s[6:7], v[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s14, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s15, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], s[6:7], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x40026bb1
; GFX900-SDAG-NEXT:    s_mov_b32 s16, 0x555502a1
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], s[4:5], v[10:11]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[8:9], s[4:5], v[14:15]
; GFX900-SDAG-NEXT:    s_mov_b32 s17, 0x3fa55555
; GFX900-SDAG-NEXT:    s_mov_b32 s18, 0x55555511
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], s[4:5], v[18:19]
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xfca7ab0c
; GFX900-SDAG-NEXT:    s_mov_b32 s19, 0x3fc55555
; GFX900-SDAG-NEXT:    v_mul_f64 v[16:17], v[10:11], s[8:9]
; GFX900-SDAG-NEXT:    s_mov_b32 s20, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s21, 0x3fe00000
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v12, v[12:13]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v13, 0x7ff00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], s[6:7], v[16:17]
; GFX900-SDAG-NEXT:    v_mul_f64 v[16:17], v[14:15], s[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], s[6:7], v[16:17]
; GFX900-SDAG-NEXT:    v_mul_f64 v[16:17], v[18:19], s[8:9]
; GFX900-SDAG-NEXT:    s_mov_b32 s8, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s9, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[18:19], s[6:7], v[16:17]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v19, s5
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v18, s4
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], s[8:9], v[18:19]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[10:11]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[12:13]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[14:15]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], v[20:21], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], v[20:21], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], s[8:9], v[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], s[8:9], v[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[10:11]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[10:11]
; GFX900-SDAG-NEXT:    s_mov_b32 s10, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s11, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[10:11], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[6:7]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[10:11], v[2:3]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[10:11], s[10:11], v[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[12:13]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[12:13]
; GFX900-SDAG-NEXT:    s_mov_b32 s12, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s13, 0xc090cc00
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[12:13], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[12:13], v[2:3]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[12:13], v[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[14:15]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[14:15]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], v[20:21], 1.0
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v20, v[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[16:17], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v21, v[8:9]
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[8:9], v[10:11], v20
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[10:11], v[14:15], v21
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[6:7], v[6:7], v12
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v9, v13, v9, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v9, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v13, v11, s[6:7]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v0, s[8:9]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, v13, v7, s[10:11]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v8, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[8:9], s[6:7]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v2, s[12:13]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v10, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[12:13], s[10:11]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v4, 0, v6, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_v3f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[0:1], v[8:9]
; GFX900-GISEL-NEXT:    v_mul_f64 v[10:11], v[2:3], v[8:9]
; GFX900-GISEL-NEXT:    v_mul_f64 v[8:9], v[4:5], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v16, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v17, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[10:11], v[10:11]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[8:9], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], -v[6:7], v[12:13], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], -v[10:11], v[12:13], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], -v[8:9], v[12:13], v[4:5]
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], -v[6:7], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], -v[10:11], v[16:17], v[18:19]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], -v[8:9], v[16:17], v[12:13]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v16, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v17, 0x40026bb1
; GFX900-GISEL-NEXT:    v_mul_f64 v[22:23], v[14:15], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], v[14:15], v[16:17], v[22:23]
; GFX900-GISEL-NEXT:    v_mul_f64 v[22:23], v[18:19], v[20:21]
; GFX900-GISEL-NEXT:    v_mul_f64 v[20:21], v[12:13], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[18:19], v[16:17], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v16, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v17, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[14:15], v[22:23], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[18:19], v[24:25], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[22:23], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[18:19], v[24:25], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], v[14:15], v[20:21], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v20, v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[18:19], v[22:23], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[12:13], v[16:17], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v16, v[10:11]
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v17, v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0x40900000
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[8:9], v[14:15], v20
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0xc090cc00
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[14:15], v[18:19], v16
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[6:7], v[6:7], v17
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[12:13]
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[12:13]
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[6:7], v[4:5], v[12:13]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], v[0:1], v[10:11]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[10:11], v[2:3], v[10:11]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[12:13], v[4:5], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v16, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v8, 0, v8, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v14, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v6, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v5, v16, v9, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v6, v16, v15, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v7, v16, v7, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v8, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v1, s[10:11]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v3, s[12:13]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v5, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v6, s[10:11]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, v7, s[12:13]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call <3 x double> @llvm.exp10.v2f64(<3 x double> %in)
  ret <3 x double> %result
}

define <4 x double> @v_exp10_v4f64(<4 x double> %in) #0 {
; SI-SDAG-LABEL: v_exp10_v4f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[8:9], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s8, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v16, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v15, s8, v16, v9
; SI-SDAG-NEXT:    v_mov_b32_e32 v14, 0
; SI-SDAG-NEXT:    v_add_f64 v[10:11], v[8:9], v[14:15]
; SI-SDAG-NEXT:    s_mov_b32 s6, -1
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[10:11], v[10:11], -v[14:15]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[8:9]|, s[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s16, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v9, v11, v9, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v8, v10, v8, vcc
; SI-SDAG-NEXT:    v_mul_f64 v[10:11], v[2:3], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s17, 0xbfd34413
; SI-SDAG-NEXT:    v_bfi_b32 v15, s8, v16, v11
; SI-SDAG-NEXT:    v_add_f64 v[12:13], v[10:11], v[14:15]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[10:11]|, s[6:7]
; SI-SDAG-NEXT:    v_add_f64 v[12:13], v[12:13], -v[14:15]
; SI-SDAG-NEXT:    s_mov_b32 s14, 0xa994fd21
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v11, v13, v11, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v10, v12, v10, vcc
; SI-SDAG-NEXT:    v_mul_f64 v[12:13], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s15, 0x3c49dc1d
; SI-SDAG-NEXT:    v_bfi_b32 v15, s8, v16, v13
; SI-SDAG-NEXT:    v_add_f64 v[17:18], v[12:13], v[14:15]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[12:13]|, s[6:7]
; SI-SDAG-NEXT:    v_add_f64 v[17:18], v[17:18], -v[14:15]
; SI-SDAG-NEXT:    s_mov_b32 s20, 0x494ea3e9
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v13, v18, v13, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v12, v17, v12, vcc
; SI-SDAG-NEXT:    v_mul_f64 v[17:18], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s21, 0xbcaf48ad
; SI-SDAG-NEXT:    v_bfi_b32 v15, s8, v16, v18
; SI-SDAG-NEXT:    v_add_f64 v[19:20], v[17:18], v[14:15]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[17:18]|, s[6:7]
; SI-SDAG-NEXT:    v_add_f64 v[14:15], v[19:20], -v[14:15]
; SI-SDAG-NEXT:    s_mov_b32 s22, 0xbbb55516
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v14, v14, v17, vcc
; SI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], s[16:17], v[0:1]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v15, v15, v18, vcc
; SI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], s[14:15], v[16:17]
; SI-SDAG-NEXT:    s_mov_b32 s23, 0x40026bb1
; SI-SDAG-NEXT:    v_mul_f64 v[18:19], v[16:17], s[20:21]
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e928af3
; SI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], s[22:23], v[18:19]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v17, s5
; SI-SDAG-NEXT:    s_mov_b32 s10, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s11, 0x3e5ade15
; SI-SDAG-NEXT:    v_mov_b32_e32 v16, s4
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], s[10:11], v[16:17]
; SI-SDAG-NEXT:    s_mov_b32 s12, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s13, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], s[12:13]
; SI-SDAG-NEXT:    s_mov_b32 s18, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s19, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], s[18:19]
; SI-SDAG-NEXT:    s_mov_b32 s24, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s25, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], s[24:25]
; SI-SDAG-NEXT:    s_mov_b32 s26, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s27, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], s[26:27]
; SI-SDAG-NEXT:    s_mov_b32 s42, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s43, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], s[42:43]
; SI-SDAG-NEXT:    s_mov_b32 s44, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s45, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], s[44:45]
; SI-SDAG-NEXT:    s_mov_b32 s46, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s47, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], s[46:47]
; SI-SDAG-NEXT:    s_mov_b32 s56, 11
; SI-SDAG-NEXT:    s_mov_b32 s57, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], s[56:57]
; SI-SDAG-NEXT:    s_mov_b32 s28, 0
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s29, 0x40900000
; SI-SDAG-NEXT:    v_fma_f64 v[18:19], v[18:19], v[20:21], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], s[16:17], v[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s40, 0
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[10:11], s[14:15], v[20:21]
; SI-SDAG-NEXT:    s_mov_b32 s41, 0xc090cc00
; SI-SDAG-NEXT:    v_mul_f64 v[22:23], v[20:21], s[20:21]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], s[28:29], v[0:1]
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[20:21], s[22:23], v[22:23]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[40:41], v[0:1]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], s[10:11], v[16:17]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[28:29], v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], v[0:1], s[12:13]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[40:41], v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], v[0:1], s[18:19]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], v[0:1], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], v[0:1], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], v[0:1], s[42:43]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], v[0:1], s[44:45]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], v[0:1], s[46:47]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], v[0:1], s[56:57]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[20:21], v[0:1], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[20:21], v[20:21], v[0:1], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[12:13], s[16:17], v[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[12:13], s[14:15], v[0:1]
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[20:21]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[0:1], s[22:23], v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[14:15], s[16:17], v[6:7]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[14:15], s[14:15], v[2:3]
; SI-SDAG-NEXT:    s_and_b64 s[14:15], vcc, s[4:5]
; SI-SDAG-NEXT:    v_mul_f64 v[22:23], v[2:3], s[20:21]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[2:3], s[22:23], v[22:23]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], s[10:11], v[16:17]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], s[12:13]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], s[18:19]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], s[42:43]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], s[44:45]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], s[46:47]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], s[56:57]
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[22:23], v[0:1], v[22:23], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], s[10:11], v[16:17]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[10:11], s[28:29], v[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[0:1], s[12:13]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[40:41], v[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[0:1], s[18:19]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v4, v[12:13]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[0:1], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[0:1], s[26:27]
; SI-SDAG-NEXT:    v_ldexp_f64 v[4:5], v[22:23], v4
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[0:1], s[42:43]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[0:1], s[44:45]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[0:1], s[46:47]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[0:1], s[56:57]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[0:1], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[16:17], v[2:3], v[0:1], 1.0
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v0, v[8:9]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[10:11]
; SI-SDAG-NEXT:    v_mov_b32_e32 v10, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v5, v10, v5, s[10:11]
; SI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[18:19], v0
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v5, s[12:13]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v3, v10, v1, s[4:5]
; SI-SDAG-NEXT:    v_ldexp_f64 v[1:2], v[20:21], v2
; SI-SDAG-NEXT:    s_and_b64 s[4:5], s[8:9], s[6:7]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v8, v10, v2, s[6:7]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v1, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v8, s[8:9]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[14:15]
; SI-SDAG-NEXT:    s_and_b64 vcc, s[12:13], s[10:11]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v4, 0, v4, vcc
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[28:29], v[6:7]
; SI-SDAG-NEXT:    v_ldexp_f64 v[8:9], v[16:17], v8
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[40:41], v[6:7]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v6, v10, v9, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[14:15]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v7, 0, v6, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v6, 0, v8, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_v4f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v16, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[8:9], v[0:1], v[16:17]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v10, 0x80000000, v9
; SI-GISEL-NEXT:    v_or_b32_e32 v13, 0x43300000, v10
; SI-GISEL-NEXT:    v_add_f64 v[14:15], v[8:9], v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[13:14], v[14:15], -v[12:13]
; SI-GISEL-NEXT:    v_mul_f64 v[18:19], v[2:3], v[16:17]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[8:9]|, v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v28, 0xbbb55516
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v8, v13, v8, vcc
; SI-GISEL-NEXT:    v_and_b32_e32 v13, 0x80000000, v19
; SI-GISEL-NEXT:    v_or_b32_e32 v13, 0x43300000, v13
; SI-GISEL-NEXT:    v_add_f64 v[20:21], v[18:19], v[12:13]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v9, v14, v9, vcc
; SI-GISEL-NEXT:    v_add_f64 v[14:15], v[20:21], -v[12:13]
; SI-GISEL-NEXT:    v_mul_f64 v[20:21], v[4:5], v[16:17]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[18:19]|, v[10:11]
; SI-GISEL-NEXT:    v_and_b32_e32 v13, 0x80000000, v21
; SI-GISEL-NEXT:    v_or_b32_e32 v13, 0x43300000, v13
; SI-GISEL-NEXT:    v_add_f64 v[22:23], v[20:21], v[12:13]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v14, v14, v18, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v15, v15, v19, vcc
; SI-GISEL-NEXT:    v_add_f64 v[18:19], v[22:23], -v[12:13]
; SI-GISEL-NEXT:    v_mul_f64 v[22:23], v[6:7], v[16:17]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[20:21]|, v[10:11]
; SI-GISEL-NEXT:    v_and_b32_e32 v13, 0x80000000, v23
; SI-GISEL-NEXT:    v_or_b32_e32 v13, 0x43300000, v13
; SI-GISEL-NEXT:    v_add_f64 v[24:25], v[22:23], v[12:13]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v16, v18, v20, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v17, v19, v21, vcc
; SI-GISEL-NEXT:    v_add_f64 v[12:13], v[24:25], -v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v18, 0x509f79ff
; SI-GISEL-NEXT:    v_mov_b32_e32 v19, 0x3fd34413
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[22:23]|, v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], -v[8:9], v[18:19], v[0:1]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v10, v12, v22, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v24, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v25, 0xbc49dc1d
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v11, v13, v23, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], -v[14:15], v[18:19], v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], -v[8:9], v[24:25], v[20:21]
; SI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v21, 0xbcaf48ad
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], -v[14:15], v[24:25], v[22:23]
; SI-GISEL-NEXT:    v_mul_f64 v[26:27], v[12:13], v[20:21]
; SI-GISEL-NEXT:    v_mov_b32_e32 v29, 0x40026bb1
; SI-GISEL-NEXT:    v_mul_f64 v[30:31], v[22:23], v[20:21]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[12:13], v[28:29], v[26:27]
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], v[22:23], v[28:29], v[30:31]
; SI-GISEL-NEXT:    v_mov_b32_e32 v30, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v31, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v32, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v33, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[26:27], -v[16:17], v[18:19], v[4:5]
; SI-GISEL-NEXT:    v_fma_f64 v[18:19], -v[10:11], v[18:19], v[6:7]
; SI-GISEL-NEXT:    v_fma_f64 v[34:35], v[12:13], v[30:31], v[32:33]
; SI-GISEL-NEXT:    v_mov_b32_e32 v36, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v37, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[26:27], -v[16:17], v[24:25], v[26:27]
; SI-GISEL-NEXT:    v_fma_f64 v[18:19], -v[10:11], v[24:25], v[18:19]
; SI-GISEL-NEXT:    v_fma_f64 v[24:25], v[12:13], v[34:35], v[36:37]
; SI-GISEL-NEXT:    v_mov_b32_e32 v34, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v35, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[24:25], v[12:13], v[24:25], v[34:35]
; SI-GISEL-NEXT:    v_mul_f64 v[38:39], v[26:27], v[20:21]
; SI-GISEL-NEXT:    v_mov_b32_e32 v48, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v49, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[24:25], v[12:13], v[24:25], v[48:49]
; SI-GISEL-NEXT:    v_fma_f64 v[26:27], v[26:27], v[28:29], v[38:39]
; SI-GISEL-NEXT:    v_mov_b32_e32 v38, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v39, 0x3f56c16c
; SI-GISEL-NEXT:    v_mul_f64 v[20:21], v[18:19], v[20:21]
; SI-GISEL-NEXT:    v_fma_f64 v[24:25], v[12:13], v[24:25], v[38:39]
; SI-GISEL-NEXT:    v_mov_b32_e32 v50, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v51, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[18:19], v[18:19], v[28:29], v[20:21]
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[12:13], v[24:25], v[50:51]
; SI-GISEL-NEXT:    v_mov_b32_e32 v24, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v25, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[12:13], v[20:21], v[24:25]
; SI-GISEL-NEXT:    v_mov_b32_e32 v28, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v29, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[12:13], v[20:21], v[28:29]
; SI-GISEL-NEXT:    v_mov_b32_e32 v52, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v53, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[12:13], v[20:21], v[52:53]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[8:9]
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[12:13], v[20:21], 1.0
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v10, v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[12:13], v[20:21], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[26:27], v[30:31], v[32:33]
; SI-GISEL-NEXT:    v_ldexp_f64 v[8:9], v[12:13], v8
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[30:31], v[32:33]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], v[36:37]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], v[34:35]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], v[48:49]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], v[38:39]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], v[50:51]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], v[24:25]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], v[28:29]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], v[52:53]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[22:23], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], v[18:19], v[30:31], v[32:33]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v32, v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[20:21], v[36:37]
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[18:19], v[22:23], v[36:37]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[14:15], v[34:35]
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], v[34:35]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[14:15], v[48:49]
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], v[48:49]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[14:15], v[38:39]
; SI-GISEL-NEXT:    v_mov_b32_e32 v30, 0
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[14:15], v[50:51]
; SI-GISEL-NEXT:    v_mov_b32_e32 v31, 0x40900000
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[14:15], v[24:25]
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[30:31]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[14:15], v[28:29]
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], v[38:39]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[14:15], v[52:53]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v33, 0, v8, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], v[50:51]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[14:15], 1.0
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[16:17]
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], v[24:25]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[26:27], v[14:15], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v16, 0x7ff00000
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], v[28:29]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v17, v16, v9, vcc
; SI-GISEL-NEXT:    v_ldexp_f64 v[8:9], v[14:15], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[4:5], v[30:31]
; SI-GISEL-NEXT:    v_mov_b32_e32 v22, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v23, 0xc090cc00
; SI-GISEL-NEXT:    v_fma_f64 v[20:21], v[18:19], v[20:21], v[52:53]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v14, 0, v8, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v15, v16, v9, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[22:23]
; SI-GISEL-NEXT:    v_ldexp_f64 v[12:13], v[12:13], v32
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[4:5], v[2:3], v[30:31]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v33, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v17, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[2:3], v[22:23]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[18:19], v[20:21], 1.0
; SI-GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, v12, s[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e64 v13, v16, v13, s[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v12, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, 0, v13, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[4:5], v[22:23]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], 1.0
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v14, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v5, 0, v15, vcc
; SI-GISEL-NEXT:    v_ldexp_f64 v[8:9], v[8:9], v10
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[6:7], v[30:31]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v8, 0, v8, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v9, v16, v9, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[6:7], v[22:23]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v6, 0, v8, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v7, 0, v9, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_v4f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s56, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s57, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[8:9], v[0:1], s[56:57]
; VI-SDAG-NEXT:    s_mov_b32 s58, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s59, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s60, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s61, 0x3c49dc1d
; VI-SDAG-NEXT:    s_mov_b32 s62, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s63, 0xbcaf48ad
; VI-SDAG-NEXT:    s_mov_b32 s72, 0xbbb55516
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[10:11], v[8:9]
; VI-SDAG-NEXT:    s_mov_b32 s73, 0x40026bb1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xfca7ab0c
; VI-SDAG-NEXT:    s_mov_b32 s16, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s17, 0x3e5ade15
; VI-SDAG-NEXT:    s_mov_b32 s18, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s19, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[10:11], s[58:59], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s20, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s21, 0x3efa0199
; VI-SDAG-NEXT:    s_mov_b32 s22, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s23, 0x3f2a01a0
; VI-SDAG-NEXT:    s_mov_b32 s24, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s25, 0x3f56c16c
; VI-SDAG-NEXT:    s_mov_b32 s26, 0x11122322
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[10:11], s[60:61], v[8:9]
; VI-SDAG-NEXT:    s_mov_b32 s27, 0x3f811111
; VI-SDAG-NEXT:    s_mov_b32 s28, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s29, 0x3fa55555
; VI-SDAG-NEXT:    s_mov_b32 s40, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s41, 0x3fc55555
; VI-SDAG-NEXT:    s_mov_b32 s42, 11
; VI-SDAG-NEXT:    s_mov_b32 s43, 0x3fe00000
; VI-SDAG-NEXT:    v_mul_f64 v[12:13], v[8:9], s[62:63]
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v10, v[10:11]
; VI-SDAG-NEXT:    s_mov_b32 s44, 0
; VI-SDAG-NEXT:    s_mov_b32 s45, 0x40900000
; VI-SDAG-NEXT:    s_mov_b32 s46, 0
; VI-SDAG-NEXT:    s_mov_b32 s47, 0xc090cc00
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[44:45], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[46:47], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], s[72:73], v[12:13]
; VI-SDAG-NEXT:    v_mov_b32_e32 v9, s5
; VI-SDAG-NEXT:    v_mov_b32_e32 v8, s4
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[46:47], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[46:47], v[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], s[16:17], v[8:9]
; VI-SDAG-NEXT:    s_and_b64 s[6:7], s[4:5], vcc
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[22:23]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[24:25]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[26:27]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[28:29]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[40:41]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[42:43]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[12:13], v[14:15], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[10:11], v[12:13], v10
; VI-SDAG-NEXT:    v_mul_f64 v[12:13], v[2:3], s[56:57]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, v10, s[6:7]
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[12:13], v[12:13]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[44:45], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], s[58:59], v[2:3]
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v1, v[12:13]
; VI-SDAG-NEXT:    s_and_b64 s[10:11], s[8:9], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], s[60:61], v[14:15]
; VI-SDAG-NEXT:    v_mul_f64 v[16:17], v[14:15], s[62:63]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], s[72:73], v[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], s[16:17], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[22:23]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[24:25]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[26:27]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[28:29]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[40:41]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[42:43]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], v[16:17], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[12:13], v[14:15], v1
; VI-SDAG-NEXT:    v_mul_f64 v[14:15], v[4:5], s[56:57]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v12, s[10:11]
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[14:15], v[14:15]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[10:11], s[44:45], v[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], s[58:59], v[4:5]
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v1, v[14:15]
; VI-SDAG-NEXT:    s_and_b64 s[14:15], s[12:13], s[10:11]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], s[60:61], v[16:17]
; VI-SDAG-NEXT:    v_mul_f64 v[18:19], v[16:17], s[62:63]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[16:17], s[72:73], v[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], s[16:17], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[22:23]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[24:25]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[26:27]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[28:29]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[40:41]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[42:43]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[16:17], v[18:19], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[14:15], v[16:17], v1
; VI-SDAG-NEXT:    v_mul_f64 v[16:17], v[6:7], s[56:57]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v4, 0, v14, s[14:15]
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[16:17], v[16:17]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[14:15], s[44:45], v[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], s[58:59], v[6:7]
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v1, v[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], s[60:61], v[18:19]
; VI-SDAG-NEXT:    v_mul_f64 v[20:21], v[18:19], s[62:63]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[18:19], s[72:73], v[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], s[16:17], v[8:9]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[16:17], s[46:47], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, v7, v13, s[6:7]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v5, v7, v15, s[10:11]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[8:9]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v5, s[12:13]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[18:19]
; VI-SDAG-NEXT:    s_and_b64 s[18:19], s[16:17], s[14:15]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[22:23]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[24:25]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[26:27]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[28:29]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[40:41]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[42:43]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[8:9], v[8:9], v1
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v7, v11, vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v7, v7, v9, s[14:15]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v6, 0, v8, s[18:19]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v7, 0, v7, s[16:17]
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_v4f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[8:9], v[0:1], v[10:11]
; VI-GISEL-NEXT:    v_mul_f64 v[12:13], v[2:3], v[10:11]
; VI-GISEL-NEXT:    v_mul_f64 v[14:15], v[4:5], v[10:11]
; VI-GISEL-NEXT:    v_mul_f64 v[10:11], v[6:7], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v16, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0xbc49dc1d
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[8:9], v[8:9]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[12:13], v[12:13]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[14:15], v[14:15]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[10:11], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0xbcaf48ad
; VI-GISEL-NEXT:    v_mov_b32_e32 v30, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v31, 0x40026bb1
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], -v[8:9], v[16:17], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], -v[12:13], v[16:17], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], -v[14:15], v[16:17], v[4:5]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], -v[10:11], v[16:17], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], -v[8:9], v[20:21], v[18:19]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], -v[12:13], v[20:21], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], -v[14:15], v[20:21], v[24:25]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], -v[10:11], v[20:21], v[16:17]
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v14, v[14:15]
; VI-GISEL-NEXT:    v_mul_f64 v[28:29], v[18:19], v[26:27]
; VI-GISEL-NEXT:    v_mul_f64 v[32:33], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[18:19], v[30:31], v[28:29]
; VI-GISEL-NEXT:    v_mul_f64 v[28:29], v[24:25], v[26:27]
; VI-GISEL-NEXT:    v_mul_f64 v[26:27], v[20:21], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[22:23], v[30:31], v[32:33]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3e5ade15
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[24:25], v[30:31], v[28:29]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[20:21], v[30:31], v[26:27]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; VI-GISEL-NEXT:    v_fma_f64 v[26:27], v[16:17], v[28:29], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[28:29], v[18:19], v[30:31], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[30:31], v[24:25], v[32:33], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[16:17], v[26:27], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[18:19], v[28:29], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v26, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x40900000
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[24:25], v[30:31], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v31, v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[20:21], v[22:23], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v20, v[12:13]
; VI-GISEL-NEXT:    v_mov_b32_e32 v28, 0
; VI-GISEL-NEXT:    v_ldexp_f64 v[12:13], v[16:17], v31
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v16, v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v29, 0xc090cc00
; VI-GISEL-NEXT:    v_ldexp_f64 v[10:11], v[18:19], v20
; VI-GISEL-NEXT:    v_ldexp_f64 v[14:15], v[24:25], v14
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[4:5], v[26:27]
; VI-GISEL-NEXT:    v_ldexp_f64 v[8:9], v[8:9], v16
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[4:5], v[6:7], v[26:27]
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[6:7], v[0:1], v[26:27]
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[10:11], v[2:3], v[26:27]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], v[0:1], v[28:29]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[12:13], v[2:3], v[28:29]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[14:15], v[4:5], v[28:29]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[16:17], v[6:7], v[28:29]
; VI-GISEL-NEXT:    v_mov_b32_e32 v30, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v3, 0, v14, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, v12, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v10, s[10:11]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, v8, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v7, v30, v13, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v8, v30, v11, s[10:11]
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v10, v30, v15, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v9, v30, v9, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v12, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v1, s[12:13]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v3, s[14:15]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, v5, s[16:17]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v7, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v8, s[12:13]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, v10, s[14:15]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, v9, s[16:17]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_v4f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s56, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s57, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[8:9], v[0:1], s[56:57]
; GFX900-SDAG-NEXT:    s_mov_b32 s58, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s59, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s60, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s61, 0x3c49dc1d
; GFX900-SDAG-NEXT:    s_mov_b32 s62, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s63, 0xbcaf48ad
; GFX900-SDAG-NEXT:    s_mov_b32 s72, 0xbbb55516
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[10:11], v[8:9]
; GFX900-SDAG-NEXT:    s_mov_b32 s73, 0x40026bb1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xfca7ab0c
; GFX900-SDAG-NEXT:    s_mov_b32 s16, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s17, 0x3e5ade15
; GFX900-SDAG-NEXT:    s_mov_b32 s18, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s19, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[10:11], s[58:59], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s20, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s21, 0x3efa0199
; GFX900-SDAG-NEXT:    s_mov_b32 s22, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s23, 0x3f2a01a0
; GFX900-SDAG-NEXT:    s_mov_b32 s24, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s25, 0x3f56c16c
; GFX900-SDAG-NEXT:    s_mov_b32 s26, 0x11122322
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[10:11], s[60:61], v[8:9]
; GFX900-SDAG-NEXT:    s_mov_b32 s27, 0x3f811111
; GFX900-SDAG-NEXT:    s_mov_b32 s28, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s29, 0x3fa55555
; GFX900-SDAG-NEXT:    s_mov_b32 s40, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s41, 0x3fc55555
; GFX900-SDAG-NEXT:    s_mov_b32 s42, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s43, 0x3fe00000
; GFX900-SDAG-NEXT:    v_mul_f64 v[12:13], v[8:9], s[62:63]
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v10, v[10:11]
; GFX900-SDAG-NEXT:    s_mov_b32 s44, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s45, 0x40900000
; GFX900-SDAG-NEXT:    s_mov_b32 s46, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s47, 0xc090cc00
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[44:45], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[46:47], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[8:9], s[72:73], v[12:13]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v9, s5
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v8, s4
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[46:47], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[46:47], v[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], s[16:17], v[8:9]
; GFX900-SDAG-NEXT:    s_and_b64 s[6:7], s[4:5], vcc
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[22:23]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[24:25]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[26:27]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[28:29]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[40:41]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], s[42:43]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], v[14:15], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[12:13], v[14:15], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[10:11], v[12:13], v10
; GFX900-SDAG-NEXT:    v_mul_f64 v[12:13], v[2:3], s[56:57]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, v10, s[6:7]
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[12:13], v[12:13]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[44:45], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], s[58:59], v[2:3]
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v1, v[12:13]
; GFX900-SDAG-NEXT:    s_and_b64 s[10:11], s[8:9], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], s[60:61], v[14:15]
; GFX900-SDAG-NEXT:    v_mul_f64 v[16:17], v[14:15], s[62:63]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], s[72:73], v[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], s[16:17], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[22:23]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[24:25]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[26:27]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[28:29]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[40:41]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[42:43]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], v[16:17], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[12:13], v[14:15], v1
; GFX900-SDAG-NEXT:    v_mul_f64 v[14:15], v[4:5], s[56:57]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v12, s[10:11]
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[14:15], v[14:15]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[10:11], s[44:45], v[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], s[58:59], v[4:5]
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v1, v[14:15]
; GFX900-SDAG-NEXT:    s_and_b64 s[14:15], s[12:13], s[10:11]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], s[60:61], v[16:17]
; GFX900-SDAG-NEXT:    v_mul_f64 v[18:19], v[16:17], s[62:63]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[16:17], s[72:73], v[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], s[16:17], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[22:23]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[24:25]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[26:27]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[28:29]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[40:41]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], s[42:43]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[16:17], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[14:15], v[16:17], v1
; GFX900-SDAG-NEXT:    v_mul_f64 v[16:17], v[6:7], s[56:57]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v4, 0, v14, s[14:15]
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[16:17], v[16:17]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[14:15], s[44:45], v[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], s[58:59], v[6:7]
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v1, v[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[16:17], s[60:61], v[18:19]
; GFX900-SDAG-NEXT:    v_mul_f64 v[20:21], v[18:19], s[62:63]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[18:19], s[72:73], v[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], s[16:17], v[8:9]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[16:17], s[46:47], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, v7, v13, s[6:7]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v5, v7, v15, s[10:11]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[8:9]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v5, s[12:13]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[18:19]
; GFX900-SDAG-NEXT:    s_and_b64 s[18:19], s[16:17], s[14:15]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[22:23]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[24:25]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[26:27]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[28:29]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[40:41]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], s[42:43]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[18:19], v[8:9], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[8:9], v[8:9], v1
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, v7, v11, vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v7, v7, v9, s[14:15]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v6, 0, v8, s[18:19]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v7, 0, v7, s[16:17]
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_v4f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[8:9], v[0:1], v[10:11]
; GFX900-GISEL-NEXT:    v_mul_f64 v[12:13], v[2:3], v[10:11]
; GFX900-GISEL-NEXT:    v_mul_f64 v[14:15], v[4:5], v[10:11]
; GFX900-GISEL-NEXT:    v_mul_f64 v[10:11], v[6:7], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v16, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v17, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[8:9], v[8:9]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[12:13], v[12:13]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[14:15], v[14:15]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[10:11], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v30, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v31, 0x40026bb1
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], -v[8:9], v[16:17], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], -v[12:13], v[16:17], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], -v[14:15], v[16:17], v[4:5]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], -v[10:11], v[16:17], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], -v[8:9], v[20:21], v[18:19]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], -v[12:13], v[20:21], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], -v[14:15], v[20:21], v[24:25]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], -v[10:11], v[20:21], v[16:17]
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v14, v[14:15]
; GFX900-GISEL-NEXT:    v_mul_f64 v[28:29], v[18:19], v[26:27]
; GFX900-GISEL-NEXT:    v_mul_f64 v[32:33], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[18:19], v[30:31], v[28:29]
; GFX900-GISEL-NEXT:    v_mul_f64 v[28:29], v[24:25], v[26:27]
; GFX900-GISEL-NEXT:    v_mul_f64 v[26:27], v[20:21], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[22:23], v[30:31], v[32:33]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[24:25], v[30:31], v[28:29]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[20:21], v[30:31], v[26:27]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[16:17], v[28:29], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[18:19], v[30:31], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[32:33], v[24:25], v[32:33], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], v[26:27]
; GFX900-GISEL-NEXT:    v_fma_f64 v[26:27], v[16:17], v[28:29], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[28:29], v[18:19], v[30:31], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[30:31], v[24:25], v[32:33], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[20:21], v[22:23], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[16:17], v[26:27], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[18:19], v[28:29], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v26, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v27, 0x40900000
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[24:25], v[30:31], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v31, v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[20:21], v[22:23], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v20, v[12:13]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v28, 0
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[12:13], v[16:17], v31
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v16, v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v29, 0xc090cc00
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[10:11], v[18:19], v20
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[14:15], v[24:25], v14
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[4:5], v[26:27]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[8:9], v[8:9], v16
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[4:5], v[6:7], v[26:27]
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[6:7], v[0:1], v[26:27]
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[10:11], v[2:3], v[26:27]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], v[0:1], v[28:29]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[12:13], v[2:3], v[28:29]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[14:15], v[4:5], v[28:29]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[16:17], v[6:7], v[28:29]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v30, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v3, 0, v14, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, v12, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v10, s[10:11]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, v8, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v7, v30, v13, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v8, v30, v11, s[10:11]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v10, v30, v15, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v9, v30, v9, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v12, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v1, s[12:13]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v3, s[14:15]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, v5, s[16:17]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v7, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v8, s[12:13]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, v10, s[14:15]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, v9, s[16:17]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call <4 x double> @llvm.exp10.v2f64(<4 x double> %in)
  ret <4 x double> %result
}

define amdgpu_ps <2 x i32> @s_exp10_f64(double inreg %in) #0 {
; SI-SDAG-LABEL: s_exp10_f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x979a371
; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; SI-SDAG-NEXT:    s_brev_b32 s2, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v2, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v3, s2, v2, v1
; SI-SDAG-NEXT:    v_mov_b32_e32 v2, 0
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[0:1], v[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, -1
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[2:3], v[4:5], -v[2:3]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
; SI-SDAG-NEXT:    v_mov_b32_e32 v3, s1
; SI-SDAG-NEXT:    s_mov_b32 s3, 0xbfd34413
; SI-SDAG-NEXT:    v_mov_b32_e32 v2, s0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[0:1], s[2:3], v[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[0:1], s[2:3], v[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s3, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[4:5], v[2:3], s[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[2:3], s[2:3], v[4:5]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v5, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s2, 11
; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v6, v[0:1]
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[2:3], v[4:5], 1.0
; SI-SDAG-NEXT:    v_mov_b32_e32 v2, 0
; SI-SDAG-NEXT:    v_mov_b32_e32 v3, 0x40900000
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v6
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[2:3]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[4:5]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[0:1], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[0:1]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; SI-SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; SI-SDAG-NEXT:    ; return to shader part epilog
;
; SI-GISEL-LABEL: s_exp10_f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v3, 0x80000000, v1
; SI-GISEL-NEXT:    v_or_b32_e32 v3, 0x43300000, v3
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[2:3], v[4:5], -v[2:3]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[0:1]|, v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], -v[0:1], v[4:5], s[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], -v[0:1], v[4:5], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[4:5], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[0:1]
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[0:1], v[2:3], v[4:5], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v6
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v4, v1, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[0:1], v[2:3]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
; SI-GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; SI-GISEL-NEXT:    v_readfirstlane_b32 s1, v1
; SI-GISEL-NEXT:    ; return to shader part epilog
;
; VI-SDAG-LABEL: s_exp10_f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x979a371
; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; VI-SDAG-NEXT:    v_mov_b32_e32 v3, s1
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s3, 0xbfd34413
; VI-SDAG-NEXT:    v_mov_b32_e32 v2, s0
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[2:3], v[0:1], s[2:3], v[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[2:3], v[0:1], s[2:3], v[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s3, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v0, v[0:1]
; VI-SDAG-NEXT:    v_mul_f64 v[4:5], v[2:3], s[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[2:3], v[2:3], s[2:3], v[4:5]
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v5, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[2:3], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; VI-SDAG-NEXT:    s_mov_b32 s2, 11
; VI-SDAG-NEXT:    s_mov_b32 s3, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[2:3], v[2:3], v[4:5], 1.0
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; VI-SDAG-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[2:3], s[0:1], v[4:5]
; VI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[2:3], v0
; VI-SDAG-NEXT:    v_mov_b32_e32 v2, 0
; VI-SDAG-NEXT:    v_mov_b32_e32 v3, 0x40900000
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[2:3]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[2:3], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[2:3]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; VI-SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; VI-SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; VI-SDAG-NEXT:    ; return to shader part epilog
;
; VI-GISEL-LABEL: s_exp10_f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[2:3], -v[0:1], v[2:3], s[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[2:3], -v[0:1], v[4:5], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v0, v[0:1]
; VI-GISEL-NEXT:    v_mul_f64 v[4:5], v[2:3], v[4:5]
; VI-GISEL-NEXT:    v_fma_f64 v[2:3], v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[2:3], v[2:3], v[4:5], 1.0
; VI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[2:3], v0
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[2:3], s[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v2, v1, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[2:3]
; VI-GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v1, s[2:3]
; VI-GISEL-NEXT:    v_readfirstlane_b32 s1, v0
; VI-GISEL-NEXT:    ; return to shader part epilog
;
; GFX900-SDAG-LABEL: s_exp10_f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v0, 0x979a371
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v3, s1
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0xbfd34413
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v2, s0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[2:3], v[0:1], s[2:3], v[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[2:3], v[0:1], s[2:3], v[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v0, v[0:1]
; GFX900-SDAG-NEXT:    v_mul_f64 v[4:5], v[2:3], s[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[2:3], v[2:3], s[2:3], v[4:5]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v5, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[2:3], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; GFX900-SDAG-NEXT:    s_mov_b32 s2, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], s[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[2:3], v[2:3], v[4:5], 1.0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[2:3], s[0:1], v[4:5]
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[2:3], v0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v2, 0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v3, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[2:3]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[2:3], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[2:3]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; GFX900-SDAG-NEXT:    ; return to shader part epilog
;
; GFX900-GISEL-LABEL: s_exp10_f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[2:3], -v[0:1], v[2:3], s[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[2:3], -v[0:1], v[4:5], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v0, v[0:1]
; GFX900-GISEL-NEXT:    v_mul_f64 v[4:5], v[2:3], v[4:5]
; GFX900-GISEL-NEXT:    v_fma_f64 v[2:3], v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[2:3], v[4:5], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[2:3], v[2:3], v[4:5], 1.0
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[2:3], v0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[2:3], s[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v2, v1, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[2:3]
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v1, s[2:3]
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s1, v0
; GFX900-GISEL-NEXT:    ; return to shader part epilog
  %result = call double @llvm.exp10.f64(double %in)
  %cast = bitcast double %result to <2 x i32>
  ret <2 x i32> %cast
}

define amdgpu_ps <4 x i32> @s_exp10_v2f64(<2 x double> inreg %in) #0 {
; SI-SDAG-LABEL: s_exp10_v2f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mov_b32_e32 v0, s4
; SI-SDAG-NEXT:    v_mov_b32_e32 v1, s5
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], s[2:3], v[0:1]
; SI-SDAG-NEXT:    s_brev_b32 s28, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v12, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s28, v12, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[5:6], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s6, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, s3
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xbfd34413
; SI-SDAG-NEXT:    v_mov_b32_e32 v5, s2
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[2:3], s[6:7], v[5:6]
; SI-SDAG-NEXT:    s_mov_b32 s8, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s9, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[2:3], s[8:9], v[5:6]
; SI-SDAG-NEXT:    s_mov_b32 s10, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s11, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[7:8], v[5:6], s[10:11]
; SI-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s12, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s13, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[5:6], s[12:13], v[7:8]
; SI-SDAG-NEXT:    v_bfi_b32 v5, s28, v12, v1
; SI-SDAG-NEXT:    v_add_f64 v[12:13], v[0:1], v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[4:5]
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[12:13], -v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s14, 0xfca7ab0c
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
; SI-SDAG-NEXT:    v_mov_b32_e32 v5, s1
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, s0
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[0:1], s[6:7], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s15, 0x3e928af3
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[0:1], s[8:9], v[4:5]
; SI-SDAG-NEXT:    v_mov_b32_e32 v8, s14
; SI-SDAG-NEXT:    v_mul_f64 v[12:13], v[4:5], s[10:11]
; SI-SDAG-NEXT:    s_mov_b32 s16, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s17, 0x3e5ade15
; SI-SDAG-NEXT:    v_mov_b32_e32 v9, s15
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[12:13], v[12:13]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], s[16:17], v[8:9]
; SI-SDAG-NEXT:    s_mov_b32 s14, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s15, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], s[16:17], v[8:9]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], v[10:11], s[14:15]
; SI-SDAG-NEXT:    s_mov_b32 s18, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s19, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], s[14:15]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], v[10:11], s[18:19]
; SI-SDAG-NEXT:    s_mov_b32 s20, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s21, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], s[18:19]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], v[10:11], s[20:21]
; SI-SDAG-NEXT:    s_mov_b32 s22, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s23, 0x3f56c16c
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v12, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[8:9], s[20:21]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], v[10:11], s[22:23]
; SI-SDAG-NEXT:    s_mov_b32 s24, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s25, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[2:3], s[22:23]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], v[10:11], s[24:25]
; SI-SDAG-NEXT:    s_mov_b32 s26, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s27, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[2:3], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], v[10:11], s[26:27]
; SI-SDAG-NEXT:    s_mov_b32 s28, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s29, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[2:3], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], v[10:11], s[28:29]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[2:3], s[28:29]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[2:3], s[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[6:7], v[10:11], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[2:3], 1.0
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v13, v[0:1]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[6:7], v[10:11], 1.0
; SI-SDAG-NEXT:    v_mov_b32_e32 v8, 0
; SI-SDAG-NEXT:    v_mov_b32_e32 v9, 0x40900000
; SI-SDAG-NEXT:    v_mov_b32_e32 v10, 0
; SI-SDAG-NEXT:    v_mov_b32_e32 v11, 0xc090cc00
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[4:5], v[2:3], 1.0
; SI-SDAG-NEXT:    v_ldexp_f64 v[6:7], v[6:7], v12
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[2:3], v[8:9]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[10:11]
; SI-SDAG-NEXT:    v_mov_b32_e32 v12, 0x7ff00000
; SI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v13
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[0:1], v[8:9]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[10:11]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v7, v12, v7, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[2:3], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v12, v1, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v6, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[0:1], s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v7, s[2:3]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[0:1]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; SI-SDAG-NEXT:    v_readfirstlane_b32 s2, v3
; SI-SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; SI-SDAG-NEXT:    v_readfirstlane_b32 s3, v2
; SI-SDAG-NEXT:    ; return to shader part epilog
;
; SI-GISEL-LABEL: s_exp10_v2f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], s[0:1], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[5:6], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mul_f64 v[0:1], s[2:3], v[0:1]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v1
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x509f79ff
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fd34413
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[0:1]|, v[8:9]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], -v[2:3], v[10:11], s[0:1]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], -v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[0:1], v[10:11], s[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0xbcaf48ad
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[0:1], v[4:5], v[8:9]
; SI-GISEL-NEXT:    v_mul_f64 v[8:9], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[6:7], v[12:13], v[8:9]
; SI-GISEL-NEXT:    v_mul_f64 v[8:9], v[4:5], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0xfca7ab0c
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[12:13], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[8:9], v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v16, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[16:17]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], 1.0
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v10, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[8:9], v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[6:7], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[2:3], v[16:17]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[6:7], v[6:7], v10
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[8:9]
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[2:3], 1.0
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v13, v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x7ff00000
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v11, 0, v6, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v12, v10, v7, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; SI-GISEL-NEXT:    v_fma_f64 v[0:1], v[4:5], v[2:3], 1.0
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[0:1], v[6:7]
; SI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v13
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[0:1], s[2:3], v[8:9]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v11, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, 0, v12, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[2:3], v[6:7]
; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[0:1]
; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, v10, v1, s[0:1]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
; SI-GISEL-NEXT:    v_readfirstlane_b32 s0, v2
; SI-GISEL-NEXT:    v_readfirstlane_b32 s1, v3
; SI-GISEL-NEXT:    v_readfirstlane_b32 s2, v0
; SI-GISEL-NEXT:    v_readfirstlane_b32 s3, v1
; SI-GISEL-NEXT:    ; return to shader part epilog
;
; VI-SDAG-LABEL: s_exp10_v2f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mov_b32_e32 v0, s4
; VI-SDAG-NEXT:    v_mov_b32_e32 v1, s5
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], s[2:3], v[0:1]
; VI-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; VI-SDAG-NEXT:    v_mov_b32_e32 v5, s3
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, s1
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, s2
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, s0
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[0:1], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[0:1], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v3, v[0:1]
; VI-SDAG-NEXT:    v_mul_f64 v[8:9], v[4:5], s[4:5]
; VI-SDAG-NEXT:    v_mul_f64 v[10:11], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[6:7], s[4:5], v[10:11]
; VI-SDAG-NEXT:    v_mov_b32_e32 v9, s7
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_mov_b32_e32 v8, s6
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], s[4:5], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], s[4:5], v[8:9]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[10:11], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[6:7], v[8:9], 1.0
; VI-SDAG-NEXT:    v_mov_b32_e32 v8, 0x7ff00000
; VI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[4:5], v2
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[6:7], v3
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; VI-SDAG-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[2:3], v[4:5]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[8:9], s[2:3], v[6:7]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[0:1], v[4:5]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[0:1], v[6:7]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v8, v1, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[8:9], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, v8, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[8:9]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[6:7], s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[6:7]
; VI-SDAG-NEXT:    v_readfirstlane_b32 s3, v1
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v2, vcc
; VI-SDAG-NEXT:    v_readfirstlane_b32 s1, v3
; VI-SDAG-NEXT:    v_readfirstlane_b32 s0, v1
; VI-SDAG-NEXT:    v_readfirstlane_b32 s2, v0
; VI-SDAG-NEXT:    ; return to shader part epilog
;
; VI-GISEL-LABEL: s_exp10_v2f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], s[0:1], v[0:1]
; VI-GISEL-NEXT:    v_mul_f64 v[0:1], s[2:3], v[0:1]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], -v[2:3], v[4:5], s[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[0:1], v[4:5], s[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], -v[2:3], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[0:1], v[8:9], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x40900000
; VI-GISEL-NEXT:    v_mul_f64 v[10:11], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mul_f64 v[8:9], v[4:5], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[12:13], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_mov_b32_e32 v10, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], v[6:7], v[12:13], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[6:7], v[10:11], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[0:1]
; VI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[6:7], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[2:3]
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[2:3], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; VI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v8
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[0:1], v[2:3]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], s[2:3], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v4, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, v6, v5, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v4, s[8:9]
; VI-GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v1, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v2, s[8:9]
; VI-GISEL-NEXT:    v_readfirstlane_b32 s2, v3
; VI-GISEL-NEXT:    v_readfirstlane_b32 s1, v0
; VI-GISEL-NEXT:    v_readfirstlane_b32 s3, v1
; VI-GISEL-NEXT:    ; return to shader part epilog
;
; GFX900-SDAG-LABEL: s_exp10_v2f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v0, s4
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, s5
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], s[2:3], v[0:1]
; GFX900-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v5, s3
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, s1
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, s2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, s0
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[0:1], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[0:1], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v3, v[0:1]
; GFX900-SDAG-NEXT:    v_mul_f64 v[8:9], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    v_mul_f64 v[10:11], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[6:7], s[4:5], v[10:11]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v9, s7
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v8, s6
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], s[4:5], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], s[4:5], v[8:9]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], v[10:11], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[10:11], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[6:7], v[8:9], 1.0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v8, 0x7ff00000
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[4:5], v2
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[6:7], v3
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[2:3], v[4:5]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[8:9], s[2:3], v[6:7]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[0:1], v[4:5]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[0:1], v[6:7]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, v8, v1, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[8:9], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, v8, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[8:9]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[6:7], s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[6:7]
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s3, v1
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v2, vcc
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s1, v3
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s0, v1
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s2, v0
; GFX900-SDAG-NEXT:    ; return to shader part epilog
;
; GFX900-GISEL-LABEL: s_exp10_v2f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], s[0:1], v[0:1]
; GFX900-GISEL-NEXT:    v_mul_f64 v[0:1], s[2:3], v[0:1]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], -v[2:3], v[4:5], s[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[0:1], v[4:5], s[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], -v[2:3], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[0:1], v[8:9], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x40900000
; GFX900-GISEL-NEXT:    v_mul_f64 v[10:11], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mul_f64 v[8:9], v[4:5], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[12:13], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v10, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], v[6:7], v[12:13], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[6:7], v[10:11], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[0:1]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[6:7], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v8
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], s[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v4, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, v6, v5, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v4, s[8:9]
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v1, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v2, s[8:9]
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s2, v3
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s1, v0
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s3, v1
; GFX900-GISEL-NEXT:    ; return to shader part epilog
  %result = call <2 x double> @llvm.exp10.v2f64(<2 x double> %in)
  %cast = bitcast <2 x double> %result to <4 x i32>
  ret <4 x i32> %cast
}

define amdgpu_ps <6 x i32> @s_exp10_v3f64(<3 x double> inreg %in) #0 {
; SI-SDAG-LABEL: s_exp10_v3f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_mov_b32 s6, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x400a934f
; SI-SDAG-NEXT:    v_mov_b32_e32 v0, s6
; SI-SDAG-NEXT:    v_mov_b32_e32 v1, s7
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_brev_b32 s33, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v17, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s33, v17, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s6, -1
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[5:6], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s8, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, s5
; SI-SDAG-NEXT:    s_mov_b32 s9, 0xbfd34413
; SI-SDAG-NEXT:    v_mov_b32_e32 v5, s4
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[2:3], s[8:9], v[5:6]
; SI-SDAG-NEXT:    s_mov_b32 s10, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s11, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[2:3], s[10:11], v[5:6]
; SI-SDAG-NEXT:    s_mov_b32 s12, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s13, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[7:8], v[5:6], s[12:13]
; SI-SDAG-NEXT:    s_mov_b32 s14, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s15, 0x40026bb1
; SI-SDAG-NEXT:    s_mov_b32 s18, 0xfca7ab0c
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[5:6], s[14:15], v[7:8]
; SI-SDAG-NEXT:    s_mov_b32 s19, 0x3e928af3
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, s18
; SI-SDAG-NEXT:    s_mov_b32 s16, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s17, 0x3e5ade15
; SI-SDAG-NEXT:    v_mov_b32_e32 v8, s19
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], s[16:17], v[7:8]
; SI-SDAG-NEXT:    s_mov_b32 s18, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s19, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], v[9:10], s[18:19]
; SI-SDAG-NEXT:    s_mov_b32 s20, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s21, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], v[9:10], s[20:21]
; SI-SDAG-NEXT:    s_mov_b32 s22, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s23, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], v[9:10], s[22:23]
; SI-SDAG-NEXT:    s_mov_b32 s24, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s25, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], v[9:10], s[24:25]
; SI-SDAG-NEXT:    s_mov_b32 s26, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s27, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], v[9:10], s[26:27]
; SI-SDAG-NEXT:    s_mov_b32 s28, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s29, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], v[9:10], s[28:29]
; SI-SDAG-NEXT:    s_mov_b32 s30, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s31, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], v[9:10], s[30:31]
; SI-SDAG-NEXT:    s_mov_b32 s34, 11
; SI-SDAG-NEXT:    s_mov_b32 s35, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], v[9:10], s[34:35]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v11, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[5:6], v[9:10], 1.0
; SI-SDAG-NEXT:    v_mov_b32_e32 v12, 0x40900000
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[5:6], v[9:10], 1.0
; SI-SDAG-NEXT:    v_mul_f64 v[9:10], s[2:3], v[0:1]
; SI-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; SI-SDAG-NEXT:    v_bfi_b32 v5, s33, v17, v10
; SI-SDAG-NEXT:    v_add_f64 v[13:14], v[9:10], v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[9:10]|, s[6:7]
; SI-SDAG-NEXT:    v_add_f64 v[5:6], v[13:14], -v[4:5]
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v11
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v10, v6, v10, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v9, v5, v9, vcc
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, s3
; SI-SDAG-NEXT:    v_mov_b32_e32 v5, s2
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[9:10], s[8:9], v[5:6]
; SI-SDAG-NEXT:    v_mov_b32_e32 v11, 0
; SI-SDAG-NEXT:    v_fma_f64 v[13:14], v[9:10], s[10:11], v[5:6]
; SI-SDAG-NEXT:    v_bfi_b32 v5, s33, v17, v1
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[11:12]
; SI-SDAG-NEXT:    v_add_f64 v[17:18], v[0:1], v[4:5]
; SI-SDAG-NEXT:    v_mov_b32_e32 v19, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v20, v19, v3, vcc
; SI-SDAG-NEXT:    v_add_f64 v[3:4], v[17:18], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 s[6:7], |v[0:1]|, s[6:7]
; SI-SDAG-NEXT:    v_mul_f64 v[15:16], v[13:14], s[12:13]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v4, v1, s[6:7]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v3, v0, s[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, s1
; SI-SDAG-NEXT:    v_mov_b32_e32 v3, s0
; SI-SDAG-NEXT:    v_fma_f64 v[13:14], v[13:14], s[14:15], v[15:16]
; SI-SDAG-NEXT:    v_fma_f64 v[3:4], v[0:1], s[8:9], v[3:4]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], s[16:17], v[7:8]
; SI-SDAG-NEXT:    v_fma_f64 v[3:4], v[0:1], s[10:11], v[3:4]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], s[18:19]
; SI-SDAG-NEXT:    v_mul_f64 v[15:16], v[3:4], s[12:13]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], s[20:21]
; SI-SDAG-NEXT:    v_fma_f64 v[3:4], v[3:4], s[14:15], v[15:16]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], s[22:23]
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[3:4], s[16:17], v[7:8]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[3:4], v[7:8], s[18:19]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[3:4], v[7:8], s[20:21]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], s[28:29]
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[3:4], v[7:8], s[22:23]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], s[30:31]
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[3:4], v[7:8], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], s[34:35]
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[3:4], v[7:8], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], 1.0
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v9, v[9:10]
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[3:4], v[7:8], s[28:29]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[13:14], v[5:6], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[3:4], v[7:8], s[30:31]
; SI-SDAG-NEXT:    v_ldexp_f64 v[5:6], v[5:6], v9
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[3:4], v[7:8], s[34:35]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[6:7], s[2:3], v[11:12]
; SI-SDAG-NEXT:    v_mov_b32_e32 v15, 0
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v9, v19, v6, s[6:7]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[3:4], v[7:8], 1.0
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[0:1]
; SI-SDAG-NEXT:    v_mov_b32_e32 v16, 0xc090cc00
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[15:16]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[3:4], v[6:7], 1.0
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[15:16]
; SI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v8
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[0:1], v[11:12]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[15:16]
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[2:3], s[6:7]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v19, v1, s[8:9]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v4, 0, v5, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[0:1], s[8:9]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v17, 0, v20, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v9, s[2:3]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[0:1]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; SI-SDAG-NEXT:    v_readfirstlane_b32 s2, v4
; SI-SDAG-NEXT:    v_readfirstlane_b32 s4, v2
; SI-SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; SI-SDAG-NEXT:    v_readfirstlane_b32 s3, v3
; SI-SDAG-NEXT:    v_readfirstlane_b32 s5, v17
; SI-SDAG-NEXT:    ; return to shader part epilog
;
; SI-GISEL-LABEL: s_exp10_v3f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], s[0:1], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[5:6], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], s[2:3], v[0:1]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v7
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[14:15], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mul_f64 v[0:1], s[4:5], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fd34413
; SI-GISEL-NEXT:    v_add_f64 v[14:15], v[14:15], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[6:7]|, v[8:9]
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v1
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], -v[2:3], v[10:11], s[0:1]
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_mov_b32_e32 v16, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v17, 0xbc49dc1d
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v6, v14, v6, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v7, v15, v7, vcc
; SI-GISEL-NEXT:    v_add_f64 v[14:15], v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], -v[2:3], v[16:17], v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v18, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v19, 0xbcaf48ad
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[14:15], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[0:1]|, v[8:9]
; SI-GISEL-NEXT:    v_mul_f64 v[14:15], v[12:13], v[18:19]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[12:13], v[4:5], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v20, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], v[12:13], v[14:15], v[20:21]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[6:7], v[10:11], s[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v24, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v25, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[0:1], v[10:11], s[4:5]
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], v[12:13], v[22:23], v[24:25]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[6:7], v[16:17], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v28, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v29, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[0:1], v[16:17], v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[22:23], v[28:29]
; SI-GISEL-NEXT:    v_mul_f64 v[26:27], v[8:9], v[18:19]
; SI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[22:23]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[4:5], v[26:27]
; SI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3f56c16c
; SI-GISEL-NEXT:    v_mul_f64 v[18:19], v[10:11], v[18:19]
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[12:13], v[16:17], v[26:27]
; SI-GISEL-NEXT:    v_mov_b32_e32 v30, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v31, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[10:11], v[4:5], v[18:19]
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[12:13], v[16:17], v[30:31]
; SI-GISEL-NEXT:    v_mov_b32_e32 v16, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[12:13], v[10:11], v[16:17]
; SI-GISEL-NEXT:    v_mov_b32_e32 v18, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v19, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[12:13], v[10:11], v[18:19]
; SI-GISEL-NEXT:    v_mov_b32_e32 v32, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v33, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[12:13], v[10:11], v[32:33]
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[12:13], v[10:11], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[10:11], v[12:13], v[10:11], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[14:15], v[20:21]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[4:5], v[14:15], v[20:21]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[24:25]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[4:5], v[14:15], v[24:25]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[28:29]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[4:5], v[14:15], v[28:29]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[4:5], v[14:15], v[22:23]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[26:27]
; SI-GISEL-NEXT:    v_fma_f64 v[14:15], v[4:5], v[14:15], v[26:27]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[30:31]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v20, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[16:17]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[18:19]
; SI-GISEL-NEXT:    v_ldexp_f64 v[10:11], v[10:11], v20
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[32:33]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[8:9], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[14:15], v[30:31]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x40900000
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v15, v[6:7]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[8:9], v[16:17]
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v10, 0, v10, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v11, v14, v11, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[0:1], v[8:9]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[18:19]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v10, 0, v10, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v11, 0, v11, vcc
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v15
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[2:3], v[12:13]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[32:33]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v15, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v16, v14, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[0:1]
; SI-GISEL-NEXT:    v_fma_f64 v[0:1], v[4:5], v[2:3], 1.0
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[2:3], v[8:9]
; SI-GISEL-NEXT:    v_readfirstlane_b32 s0, v10
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v15, vcc
; SI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v6
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, 0, v16, vcc
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[12:13]
; SI-GISEL-NEXT:    v_readfirstlane_b32 s1, v11
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v14, v1, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[8:9]
; SI-GISEL-NEXT:    v_readfirstlane_b32 s2, v2
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
; SI-GISEL-NEXT:    v_readfirstlane_b32 s3, v3
; SI-GISEL-NEXT:    v_readfirstlane_b32 s4, v0
; SI-GISEL-NEXT:    v_readfirstlane_b32 s5, v1
; SI-GISEL-NEXT:    ; return to shader part epilog
;
; VI-SDAG-LABEL: s_exp10_v3f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x400a934f
; VI-SDAG-NEXT:    v_mov_b32_e32 v0, s6
; VI-SDAG-NEXT:    v_mov_b32_e32 v1, s7
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_mul_f64 v[4:5], s[2:3], v[0:1]
; VI-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, s5
; VI-SDAG-NEXT:    v_mov_b32_e32 v9, s3
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xbfd34413
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, s4
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; VI-SDAG-NEXT:    v_mov_b32_e32 v8, s2
; VI-SDAG-NEXT:    v_mov_b32_e32 v11, s1
; VI-SDAG-NEXT:    v_mov_b32_e32 v10, s0
; VI-SDAG-NEXT:    s_mov_b32 s9, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s8, 0xfca7ab0c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[2:3], s[6:7], v[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], s[6:7], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[0:1], s[6:7], v[10:11]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[2:3], s[6:7], v[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], s[6:7], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[0:1], s[6:7], v[10:11]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v4, v[4:5]
; VI-SDAG-NEXT:    v_mul_f64 v[12:13], v[6:7], s[6:7]
; VI-SDAG-NEXT:    v_mul_f64 v[14:15], v[8:9], s[6:7]
; VI-SDAG-NEXT:    v_mul_f64 v[16:17], v[10:11], s[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[6:7], s[6:7], v[12:13]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], s[6:7], v[14:15]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], s[6:7], v[16:17]
; VI-SDAG-NEXT:    v_mov_b32_e32 v13, s9
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3e5ade15
; VI-SDAG-NEXT:    v_mov_b32_e32 v12, s8
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], s[6:7], v[12:13]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], s[6:7], v[12:13]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], s[6:7], v[12:13]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s6, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s6, 11
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[6:7], v[14:15], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], v[16:17], 1.0
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v14, v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[12:13], 1.0
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v10, v[0:1]
; VI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[6:7], v14
; VI-SDAG-NEXT:    v_ldexp_f64 v[4:5], v[8:9], v4
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x40900000
; VI-SDAG-NEXT:    v_mov_b32_e32 v8, 0
; VI-SDAG-NEXT:    v_mov_b32_e32 v9, 0xc090cc00
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[14:15], s[4:5], v[8:9]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[6:7], s[2:3], v[6:7]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[12:13], s[2:3], v[8:9]
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v10
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[0:1], v[6:7]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[10:11], s[0:1], v[8:9]
; VI-SDAG-NEXT:    v_mov_b32_e32 v10, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v10, v1, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[14:15], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[14:15]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[12:13], s[6:7]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v5, v10, v5, s[6:7]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, v10, v3, s[8:9]
; VI-SDAG-NEXT:    v_readfirstlane_b32 s5, v1
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v4, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[10:11], s[8:9]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v5, s[12:13]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[10:11]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-SDAG-NEXT:    v_readfirstlane_b32 s1, v3
; VI-SDAG-NEXT:    v_readfirstlane_b32 s3, v5
; VI-SDAG-NEXT:    v_readfirstlane_b32 s0, v2
; VI-SDAG-NEXT:    v_readfirstlane_b32 s2, v1
; VI-SDAG-NEXT:    v_readfirstlane_b32 s4, v0
; VI-SDAG-NEXT:    ; return to shader part epilog
;
; VI-GISEL-LABEL: s_exp10_v3f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], s[0:1], v[0:1]
; VI-GISEL-NEXT:    v_mul_f64 v[4:5], s[2:3], v[0:1]
; VI-GISEL-NEXT:    v_mul_f64 v[0:1], s[4:5], v[0:1]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v18, 0xbbb55516
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; VI-GISEL-NEXT:    v_mov_b32_e32 v19, 0x40026bb1
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[2:3], v[6:7], s[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[4:5], v[6:7], s[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], -v[0:1], v[6:7], s[4:5]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[2:3], v[12:13], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[4:5], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], -v[0:1], v[12:13], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbcaf48ad
; VI-GISEL-NEXT:    v_mul_f64 v[14:15], v[8:9], v[12:13]
; VI-GISEL-NEXT:    v_mul_f64 v[16:17], v[10:11], v[12:13]
; VI-GISEL-NEXT:    v_mul_f64 v[12:13], v[6:7], v[12:13]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[18:19], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[18:19], v[16:17]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[6:7], v[18:19], v[12:13]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[14:15], v[12:13]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[14:15], v[12:13]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[14:15], v[12:13]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], v[8:9], v[16:17], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[18:19], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[14:15], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[16:17], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v16, v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[2:3], v[6:7], v[12:13], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v14, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v15, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[6:7], s[2:3], v[14:15]
; VI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[8:9], v16
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[0:1]
; VI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[10:11], v6
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[14:15]
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[14:15]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; VI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x7ff00000
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, v17, v1, s[6:7]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[2:3], v[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, v17, v3, s[8:9]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], s[4:5], v[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v4, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v5, v17, v5, vcc
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[0:1], v[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[6:7]
; VI-GISEL-NEXT:    v_readfirstlane_b32 s2, v0
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[6:7]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[8:9]
; VI-GISEL-NEXT:    v_readfirstlane_b32 s4, v2
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v3, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v4, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v5, vcc
; VI-GISEL-NEXT:    v_readfirstlane_b32 s0, v4
; VI-GISEL-NEXT:    v_readfirstlane_b32 s1, v0
; VI-GISEL-NEXT:    v_readfirstlane_b32 s3, v1
; VI-GISEL-NEXT:    v_readfirstlane_b32 s5, v2
; VI-GISEL-NEXT:    ; return to shader part epilog
;
; GFX900-SDAG-LABEL: s_exp10_v3f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x400a934f
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v0, s6
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, s7
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_mul_f64 v[4:5], s[2:3], v[0:1]
; GFX900-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, s5
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v9, s3
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xbfd34413
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, s4
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v8, s2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v11, s1
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v10, s0
; GFX900-SDAG-NEXT:    s_mov_b32 s9, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s8, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[2:3], s[6:7], v[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], s[6:7], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[0:1], s[6:7], v[10:11]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[2:3], s[6:7], v[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], s[6:7], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[0:1], s[6:7], v[10:11]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v4, v[4:5]
; GFX900-SDAG-NEXT:    v_mul_f64 v[12:13], v[6:7], s[6:7]
; GFX900-SDAG-NEXT:    v_mul_f64 v[14:15], v[8:9], s[6:7]
; GFX900-SDAG-NEXT:    v_mul_f64 v[16:17], v[10:11], s[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[6:7], s[6:7], v[12:13]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], s[6:7], v[14:15]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], s[6:7], v[16:17]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v13, s9
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v12, s8
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], s[6:7], v[12:13]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], s[6:7], v[12:13]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], s[6:7], v[12:13]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[10:11], v[12:13], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[6:7], v[14:15], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], v[16:17], 1.0
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v14, v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[12:13], 1.0
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v10, v[0:1]
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[6:7], v14
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[4:5], v[8:9], v4
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x40900000
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v8, 0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v9, 0xc090cc00
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[14:15], s[4:5], v[8:9]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[6:7], s[2:3], v[6:7]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[12:13], s[2:3], v[8:9]
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v10
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[0:1], v[6:7]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[10:11], s[0:1], v[8:9]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v10, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, v10, v1, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[14:15], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[14:15]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[12:13], s[6:7]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v5, v10, v5, s[6:7]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, v10, v3, s[8:9]
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s5, v1
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v4, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[10:11], s[8:9]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v5, s[12:13]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[10:11]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s1, v3
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s3, v5
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s0, v2
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s2, v1
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s4, v0
; GFX900-SDAG-NEXT:    ; return to shader part epilog
;
; GFX900-GISEL-LABEL: s_exp10_v3f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], s[0:1], v[0:1]
; GFX900-GISEL-NEXT:    v_mul_f64 v[4:5], s[2:3], v[0:1]
; GFX900-GISEL-NEXT:    v_mul_f64 v[0:1], s[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v18, 0xbbb55516
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v19, 0x40026bb1
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], -v[2:3], v[6:7], s[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], -v[4:5], v[6:7], s[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], -v[0:1], v[6:7], s[4:5]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], -v[2:3], v[12:13], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], -v[4:5], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], -v[0:1], v[12:13], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_mul_f64 v[14:15], v[8:9], v[12:13]
; GFX900-GISEL-NEXT:    v_mul_f64 v[16:17], v[10:11], v[12:13]
; GFX900-GISEL-NEXT:    v_mul_f64 v[12:13], v[6:7], v[12:13]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[18:19], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[18:19], v[16:17]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[6:7], v[18:19], v[12:13]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[14:15], v[12:13]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[14:15], v[12:13]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[14:15], v[12:13]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[8:9], v[16:17], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], v[8:9], v[16:17], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[10:11], v[18:19], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[14:15], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[16:17], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v16, v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[2:3], v[6:7], v[12:13], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v14, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v15, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[6:7], s[2:3], v[14:15]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[8:9], v16
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[0:1]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[10:11], v6
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[14:15]
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[14:15]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v17, 0x7ff00000
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, v17, v1, s[6:7]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[2:3], v[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v3, v17, v3, s[8:9]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], s[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v4, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v5, v17, v5, vcc
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[0:1], v[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v0, s[6:7]
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s2, v0
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[6:7]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[8:9]
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s4, v2
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v3, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v4, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v5, vcc
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s0, v4
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s1, v0
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s3, v1
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s5, v2
; GFX900-GISEL-NEXT:    ; return to shader part epilog
  %result = call <3 x double> @llvm.exp10.v3f64(<3 x double> %in)
  %cast = bitcast <3 x double> %result to <6 x i32>
  ret <6 x i32> %cast
}

define amdgpu_ps <8 x i32> @s_exp10_v4f64(<4 x double> inreg %in) #0 {
; SI-SDAG-LABEL: s_exp10_v4f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_mov_b32 s8, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s9, 0x400a934f
; SI-SDAG-NEXT:    v_mov_b32_e32 v0, s8
; SI-SDAG-NEXT:    v_mov_b32_e32 v1, s9
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], s[6:7], v[0:1]
; SI-SDAG-NEXT:    s_brev_b32 s33, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v18, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s33, v18, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s8, -1
; SI-SDAG-NEXT:    s_mov_b32 s9, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[5:6], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[8:9]
; SI-SDAG-NEXT:    s_mov_b32 s10, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
; SI-SDAG-NEXT:    v_mov_b32_e32 v5, s6
; SI-SDAG-NEXT:    s_mov_b32 s11, 0xbfd34413
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, s7
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[2:3], s[10:11], v[5:6]
; SI-SDAG-NEXT:    s_mov_b32 s12, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s13, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[2:3], s[12:13], v[5:6]
; SI-SDAG-NEXT:    s_mov_b32 s14, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s15, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[7:8], v[5:6], s[14:15]
; SI-SDAG-NEXT:    s_mov_b32 s16, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s17, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[5:6], s[16:17], v[7:8]
; SI-SDAG-NEXT:    v_mul_f64 v[8:9], s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_mul_f64 v[12:13], s[2:3], v[0:1]
; SI-SDAG-NEXT:    v_bfi_b32 v5, s33, v18, v9
; SI-SDAG-NEXT:    v_add_f64 v[10:11], v[8:9], v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[8:9]|, s[8:9]
; SI-SDAG-NEXT:    v_add_f64 v[10:11], v[10:11], -v[4:5]
; SI-SDAG-NEXT:    v_bfi_b32 v5, s33, v18, v13
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v9, v11, v9, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v8, v10, v8, vcc
; SI-SDAG-NEXT:    v_mov_b32_e32 v11, s5
; SI-SDAG-NEXT:    v_mov_b32_e32 v10, s4
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[8:9], s[10:11], v[10:11]
; SI-SDAG-NEXT:    v_add_f64 v[14:15], v[12:13], v[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[8:9], s[12:13], v[10:11]
; SI-SDAG-NEXT:    v_add_f64 v[14:15], v[14:15], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[12:13]|, s[8:9]
; SI-SDAG-NEXT:    s_mov_b32 s20, 0xfca7ab0c
; SI-SDAG-NEXT:    s_mov_b32 s21, 0x3e928af3
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v13, v15, v13, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v12, v14, v12, vcc
; SI-SDAG-NEXT:    v_mul_f64 v[14:15], v[10:11], s[14:15]
; SI-SDAG-NEXT:    v_mov_b32_e32 v16, s20
; SI-SDAG-NEXT:    s_mov_b32 s18, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s19, 0x3e5ade15
; SI-SDAG-NEXT:    v_mov_b32_e32 v17, s21
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], s[16:17], v[14:15]
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], s[18:19], v[16:17]
; SI-SDAG-NEXT:    s_mov_b32 s20, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s21, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[20:21]
; SI-SDAG-NEXT:    s_mov_b32 s22, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s23, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[22:23]
; SI-SDAG-NEXT:    s_mov_b32 s24, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s25, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[24:25]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v19, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], s[18:19], v[16:17]
; SI-SDAG-NEXT:    s_mov_b32 s26, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s27, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], s[20:21]
; SI-SDAG-NEXT:    s_mov_b32 s28, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s29, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[28:29]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], s[22:23]
; SI-SDAG-NEXT:    s_mov_b32 s30, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s31, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[30:31]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], s[24:25]
; SI-SDAG-NEXT:    s_mov_b32 s34, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s35, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[34:35]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], s[26:27]
; SI-SDAG-NEXT:    s_mov_b32 s36, 11
; SI-SDAG-NEXT:    s_mov_b32 s37, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], s[36:37]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], s[28:29]
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[6:7], v[14:15], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], s[30:31]
; SI-SDAG-NEXT:    v_fma_f64 v[5:6], v[6:7], v[14:15], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], s[34:35]
; SI-SDAG-NEXT:    v_mov_b32_e32 v15, s3
; SI-SDAG-NEXT:    v_mov_b32_e32 v14, s2
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], s[36:37]
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], s[10:11], v[14:15]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[12:13], s[12:13], v[14:15]
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[10:11], v[2:3], 1.0
; SI-SDAG-NEXT:    v_mul_f64 v[10:11], v[14:15], s[14:15]
; SI-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; SI-SDAG-NEXT:    v_fma_f64 v[10:11], v[14:15], s[16:17], v[10:11]
; SI-SDAG-NEXT:    v_ldexp_f64 v[6:7], v[5:6], v19
; SI-SDAG-NEXT:    v_bfi_b32 v5, s33, v18, v1
; SI-SDAG-NEXT:    v_add_f64 v[14:15], v[0:1], v[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], s[18:19], v[16:17]
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[14:15], -v[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[10:11], v[18:19], s[20:21]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[8:9]
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[10:11], v[14:15], s[22:23]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
; SI-SDAG-NEXT:    v_mov_b32_e32 v5, s1
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, s0
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[10:11], v[14:15], s[24:25]
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[0:1], s[10:11], v[4:5]
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[10:11], v[14:15], s[26:27]
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[0:1], s[12:13], v[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v20, v[8:9]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[10:11], v[14:15], s[28:29]
; SI-SDAG-NEXT:    v_mul_f64 v[18:19], v[4:5], s[14:15]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[10:11], v[8:9], s[30:31]
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[16:17], v[18:19]
; SI-SDAG-NEXT:    v_mov_b32_e32 v18, 0
; SI-SDAG-NEXT:    v_mov_b32_e32 v19, 0x40900000
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[10:11], v[8:9], s[34:35]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[6:7], v[18:19]
; SI-SDAG-NEXT:    v_mov_b32_e32 v21, 0x7ff00000
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v20
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v20, v21, v7, vcc
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[10:11], v[8:9], s[36:37]
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[4:5], s[18:19], v[16:17]
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[10:11], v[7:8], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[14:15], v[4:5], v[14:15], s[20:21]
; SI-SDAG-NEXT:    v_fma_f64 v[7:8], v[10:11], v[7:8], 1.0
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[4:5], v[14:15], s[22:23]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v12, v[12:13]
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[4:5], v[9:10], s[24:25]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[18:19]
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[4:5], v[9:10], s[26:27]
; SI-SDAG-NEXT:    v_ldexp_f64 v[7:8], v[7:8], v12
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[4:5], v[9:10], s[28:29]
; SI-SDAG-NEXT:    v_mov_b32_e32 v14, 0
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[4:5], v[9:10], s[30:31]
; SI-SDAG-NEXT:    v_mov_b32_e32 v15, 0xc090cc00
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[4:5], v[9:10], s[34:35]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v12, v21, v8, s[10:11]
; SI-SDAG-NEXT:    v_fma_f64 v[9:10], v[4:5], v[9:10], s[36:37]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[6:7], s[6:7], v[14:15]
; SI-SDAG-NEXT:    v_fma_f64 v[8:9], v[4:5], v[9:10], 1.0
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v10, v[0:1]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[18:19]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], s[4:5], v[14:15]
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[4:5], v[8:9], 1.0
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[2:3], s[2:3], v[14:15]
; SI-SDAG-NEXT:    s_and_b64 vcc, s[6:7], vcc
; SI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v10
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[0:1], v[18:19]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[0:1], s[0:1], v[14:15]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v5, 0, v6, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], s[8:9]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[2:3], s[10:11]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v3, v21, v3, s[8:9]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v21, v1, s[12:13]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v6, 0, v7, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[0:1], s[12:13]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v11, 0, v20, s[6:7]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v4, 0, v12, s[2:3]
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[0:1]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; SI-SDAG-NEXT:    v_readfirstlane_b32 s2, v6
; SI-SDAG-NEXT:    v_readfirstlane_b32 s4, v2
; SI-SDAG-NEXT:    v_readfirstlane_b32 s6, v5
; SI-SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; SI-SDAG-NEXT:    v_readfirstlane_b32 s3, v4
; SI-SDAG-NEXT:    v_readfirstlane_b32 s5, v3
; SI-SDAG-NEXT:    v_readfirstlane_b32 s7, v11
; SI-SDAG-NEXT:    ; return to shader part epilog
;
; SI-GISEL-LABEL: s_exp10_v4f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], s[0:1], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[5:6], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mul_f64 v[10:11], s[2:3], v[0:1]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v11
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[10:11], v[4:5]
; SI-GISEL-NEXT:    v_mul_f64 v[14:15], s[4:5], v[0:1]
; SI-GISEL-NEXT:    v_add_f64 v[5:6], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[10:11]|, v[8:9]
; SI-GISEL-NEXT:    v_mul_f64 v[0:1], s[6:7], v[0:1]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v10, v5, v10, vcc
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v15
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[16:17], v[14:15], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v11, v6, v11, vcc
; SI-GISEL-NEXT:    v_add_f64 v[5:6], v[16:17], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[14:15]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v14, v5, v14, vcc
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v1
; SI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3fd34413
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], -v[2:3], v[12:13], s[0:1]
; SI-GISEL-NEXT:    v_add_f64 v[18:19], v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v15, v6, v15, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], -v[2:3], v[6:7], v[16:17]
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[18:19], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[0:1]|, v[8:9]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[10:11], v[12:13], s[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v18, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v19, 0xbcaf48ad
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
; SI-GISEL-NEXT:    v_mul_f64 v[4:5], v[16:17], v[18:19]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[10:11], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v20, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[16:17], v[20:21], v[4:5]
; SI-GISEL-NEXT:    v_mul_f64 v[16:17], v[8:9], v[18:19]
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], -v[14:15], v[12:13], s[4:5]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[20:21], v[16:17]
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], -v[14:15], v[6:7], v[22:23]
; SI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v24, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v25, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[26:27], v[4:5], v[22:23], v[24:25]
; SI-GISEL-NEXT:    v_mov_b32_e32 v28, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v29, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], -v[0:1], v[12:13], s[6:7]
; SI-GISEL-NEXT:    v_fma_f64 v[26:27], v[4:5], v[26:27], v[28:29]
; SI-GISEL-NEXT:    v_mov_b32_e32 v32, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v33, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], -v[0:1], v[6:7], v[12:13]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[4:5], v[26:27], v[32:33]
; SI-GISEL-NEXT:    v_mul_f64 v[30:31], v[16:17], v[18:19]
; SI-GISEL-NEXT:    v_mov_b32_e32 v26, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v27, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[4:5], v[12:13], v[26:27]
; SI-GISEL-NEXT:    v_fma_f64 v[16:17], v[16:17], v[20:21], v[30:31]
; SI-GISEL-NEXT:    v_mov_b32_e32 v30, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v31, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[4:5], v[12:13], v[30:31]
; SI-GISEL-NEXT:    v_mul_f64 v[18:19], v[6:7], v[18:19]
; SI-GISEL-NEXT:    v_mov_b32_e32 v34, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v35, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[4:5], v[12:13], v[34:35]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[6:7], v[20:21], v[18:19]
; SI-GISEL-NEXT:    v_mov_b32_e32 v18, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v19, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[4:5], v[12:13], v[18:19]
; SI-GISEL-NEXT:    v_mov_b32_e32 v20, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v21, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[4:5], v[12:13], v[20:21]
; SI-GISEL-NEXT:    v_mov_b32_e32 v36, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v37, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[4:5], v[12:13], v[36:37]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v10, v[10:11]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[4:5], v[12:13], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x7ff00000
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[22:23], v[24:25]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v14, v[14:15]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[28:29]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[32:33]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[26:27]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[30:31]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[34:35]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[18:19]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[20:21]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[36:37]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[22:23], v[24:25]
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], v[6:7], v[22:23], v[24:25]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[28:29]
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], v[6:7], v[22:23], v[28:29]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[32:33]
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], v[6:7], v[22:23], v[32:33]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[26:27]
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], v[6:7], v[22:23], v[26:27]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[30:31]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v24, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[34:35]
; SI-GISEL-NEXT:    v_fma_f64 v[22:23], v[6:7], v[22:23], v[30:31]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[18:19]
; SI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v24
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[20:21]
; SI-GISEL-NEXT:    v_ldexp_f64 v[8:9], v[8:9], v10
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[16:17], v[12:13], v[36:37]
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[16:17], v[12:13], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[22:23], v[34:35]
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[16:17], v[2:3], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v16, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v17, 0x40900000
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[16:17]
; SI-GISEL-NEXT:    v_fma_f64 v[12:13], v[6:7], v[12:13], v[18:19]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v18, 0, v4, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v10, v11, v5, vcc
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[2:3], v[16:17]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v19, 0, v8, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v22, v11, v9, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[0:1], v[4:5]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[6:7], v[12:13], v[20:21]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v12, 0, v18, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v10, 0, v10, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[2:3], v[4:5]
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v14
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v13, 0, v19, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v14, 0, v22, vcc
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[16:17]
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[6:7], v[8:9], v[36:37]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v15, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v18, v11, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[6:7], v[8:9], 1.0
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[0:1]
; SI-GISEL-NEXT:    v_fma_f64 v[0:1], v[6:7], v[2:3], 1.0
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[4:5]
; SI-GISEL-NEXT:    v_readfirstlane_b32 s0, v12
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v15, vcc
; SI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v8
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, 0, v18, vcc
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[6:7], v[16:17]
; SI-GISEL-NEXT:    v_readfirstlane_b32 s1, v10
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v11, v1, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[6:7], v[4:5]
; SI-GISEL-NEXT:    v_readfirstlane_b32 s2, v13
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
; SI-GISEL-NEXT:    v_readfirstlane_b32 s3, v14
; SI-GISEL-NEXT:    v_readfirstlane_b32 s4, v2
; SI-GISEL-NEXT:    v_readfirstlane_b32 s5, v3
; SI-GISEL-NEXT:    v_readfirstlane_b32 s6, v0
; SI-GISEL-NEXT:    v_readfirstlane_b32 s7, v1
; SI-GISEL-NEXT:    ; return to shader part epilog
;
; VI-SDAG-LABEL: s_exp10_v4f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_mov_b32 s8, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s9, 0x400a934f
; VI-SDAG-NEXT:    v_mov_b32_e32 v0, s8
; VI-SDAG-NEXT:    v_mov_b32_e32 v1, s9
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_mul_f64 v[4:5], s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], s[2:3], v[0:1]
; VI-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; VI-SDAG-NEXT:    v_mov_b32_e32 v9, s7
; VI-SDAG-NEXT:    s_mov_b32 s8, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s9, 0xbfd34413
; VI-SDAG-NEXT:    v_mov_b32_e32 v8, s6
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; VI-SDAG-NEXT:    v_mov_b32_e32 v11, s5
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v10, s4
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; VI-SDAG-NEXT:    v_mov_b32_e32 v13, s3
; VI-SDAG-NEXT:    s_mov_b32 s10, 0xa994fd21
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[2:3], s[8:9], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], s[8:9], v[10:11]
; VI-SDAG-NEXT:    s_mov_b32 s11, 0x3c49dc1d
; VI-SDAG-NEXT:    v_mov_b32_e32 v12, s2
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[6:7], s[8:9], v[12:13]
; VI-SDAG-NEXT:    v_mov_b32_e32 v15, s1
; VI-SDAG-NEXT:    v_mov_b32_e32 v14, s0
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[0:1], s[8:9], v[14:15]
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[2:3], s[10:11], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], s[10:11], v[10:11]
; VI-SDAG-NEXT:    s_mov_b32 s8, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s9, 0xbcaf48ad
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[6:7], s[10:11], v[12:13]
; VI-SDAG-NEXT:    s_mov_b32 s12, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s13, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[0:1], s[10:11], v[14:15]
; VI-SDAG-NEXT:    v_mul_f64 v[16:17], v[8:9], s[8:9]
; VI-SDAG-NEXT:    v_mul_f64 v[18:19], v[10:11], s[8:9]
; VI-SDAG-NEXT:    s_mov_b32 s10, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s11, 0x40026bb1
; VI-SDAG-NEXT:    s_mov_b32 s14, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s15, 0x3f2a01a0
; VI-SDAG-NEXT:    s_mov_b32 s16, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s17, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], s[10:11], v[16:17]
; VI-SDAG-NEXT:    v_mul_f64 v[16:17], v[12:13], s[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], s[10:11], v[18:19]
; VI-SDAG-NEXT:    v_mul_f64 v[18:19], v[14:15], s[8:9]
; VI-SDAG-NEXT:    s_mov_b32 s9, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s8, 0xfca7ab0c
; VI-SDAG-NEXT:    s_mov_b32 s18, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s19, 0x3f811111
; VI-SDAG-NEXT:    s_mov_b32 s20, 0x555502a1
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[12:13], s[10:11], v[16:17]
; VI-SDAG-NEXT:    v_mov_b32_e32 v17, s9
; VI-SDAG-NEXT:    v_mov_b32_e32 v16, s8
; VI-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], s[10:11], v[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], s[12:13], v[16:17]
; VI-SDAG-NEXT:    s_mov_b32 s8, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s9, 0x3ec71dee
; VI-SDAG-NEXT:    s_mov_b32 s10, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s11, 0x3efa0199
; VI-SDAG-NEXT:    s_mov_b32 s21, 0x3fa55555
; VI-SDAG-NEXT:    s_mov_b32 s22, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s23, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[8:9]
; VI-SDAG-NEXT:    s_mov_b32 s24, 11
; VI-SDAG-NEXT:    s_mov_b32 s25, 0x3fe00000
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v20, v[2:3]
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v21, v[4:5]
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v6, v[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[10:11]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[14:15]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[22:23]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[24:25]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], v[18:19], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], s[12:13], v[16:17]
; VI-SDAG-NEXT:    v_ldexp_f64 v[4:5], v[8:9], v20
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[8:9]
; VI-SDAG-NEXT:    v_mov_b32_e32 v8, 0
; VI-SDAG-NEXT:    v_mov_b32_e32 v9, 0xc090cc00
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[10:11]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[14:15]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[22:23]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[24:25]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], v[18:19], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], s[12:13], v[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], s[12:13], v[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[10:11]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[10:11]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[14:15]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[14:15]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[14:15], s[0:1], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[16:17]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[16:17]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[16:17], s[2:3], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[18:19]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[18:19]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[18:19], s[4:5], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[20:21]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[20:21]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[20:21], s[6:7], v[8:9]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[22:23]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[22:23]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[24:25]
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[24:25]
; VI-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[12:13], v[12:13], v[18:19], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[2:3], v[14:15], v[16:17], 1.0
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v14, v[0:1]
; VI-SDAG-NEXT:    v_mov_b32_e32 v18, 0
; VI-SDAG-NEXT:    v_mov_b32_e32 v19, 0x40900000
; VI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[10:11], v21
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[18:19]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[6:7], v[18:19]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[0:1], v[18:19]
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v14
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[18:19]
; VI-SDAG-NEXT:    v_ldexp_f64 v[6:7], v[12:13], v6
; VI-SDAG-NEXT:    v_mov_b32_e32 v10, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v10, v1, s[8:9]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v5, v10, v5, vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[18:19]
; VI-SDAG-NEXT:    s_and_b64 vcc, s[20:21], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, v10, v3, s[12:13]
; VI-SDAG-NEXT:    v_readfirstlane_b32 s5, v1
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v4, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[18:19], s[8:9]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[14:15]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[16:17], s[10:11]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v7, v10, v7, s[10:11]
; VI-SDAG-NEXT:    v_readfirstlane_b32 s1, v3
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v6, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[14:15], s[12:13]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v5, s[20:21]
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v7, 0, v7, s[16:17]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-SDAG-NEXT:    v_readfirstlane_b32 s3, v7
; VI-SDAG-NEXT:    v_readfirstlane_b32 s7, v5
; VI-SDAG-NEXT:    v_readfirstlane_b32 s0, v2
; VI-SDAG-NEXT:    v_readfirstlane_b32 s2, v3
; VI-SDAG-NEXT:    v_readfirstlane_b32 s4, v0
; VI-SDAG-NEXT:    v_readfirstlane_b32 s6, v1
; VI-SDAG-NEXT:    ; return to shader part epilog
;
; VI-GISEL-LABEL: s_exp10_v4f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], s[0:1], v[0:1]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], s[4:5], v[0:1]
; VI-GISEL-NEXT:    v_mul_f64 v[4:5], s[2:3], v[0:1]
; VI-GISEL-NEXT:    v_mul_f64 v[0:1], s[6:7], v[0:1]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbc49dc1d
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; VI-GISEL-NEXT:    v_mov_b32_e32 v18, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v19, 0xbcaf48ad
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[2:3], v[8:9], s[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], -v[6:7], v[8:9], s[4:5]
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], -v[4:5], v[8:9], s[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[0:1], v[8:9], s[6:7]
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v26, v[4:5]
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], -v[2:3], v[12:13], v[10:11]
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], -v[6:7], v[12:13], v[16:17]
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], -v[4:5], v[12:13], v[14:15]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], -v[0:1], v[12:13], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x40026bb1
; VI-GISEL-NEXT:    v_mul_f64 v[20:21], v[10:11], v[18:19]
; VI-GISEL-NEXT:    v_mul_f64 v[22:23], v[14:15], v[18:19]
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[12:13], v[20:21]
; VI-GISEL-NEXT:    v_mul_f64 v[20:21], v[16:17], v[18:19]
; VI-GISEL-NEXT:    v_mul_f64 v[18:19], v[8:9], v[18:19]
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], v[14:15], v[12:13], v[22:23]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3e5ade15
; VI-GISEL-NEXT:    v_fma_f64 v[16:17], v[16:17], v[12:13], v[20:21]
; VI-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[12:13], v[18:19]
; VI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[22:23], v[12:13]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[22:23], v[12:13]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[22:23], v[12:13]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[22:23], v[12:13]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; VI-GISEL-NEXT:    v_mov_b32_e32 v22, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; VI-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[22:23], v[16:17], v[24:25], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v24, v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v25, 0x7ff00000
; VI-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[18:19], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[14:15], v[14:15], v[20:21], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v18, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v19, 0x40900000
; VI-GISEL-NEXT:    v_fma_f64 v[2:3], v[16:17], v[22:23], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[8:9], v[12:13], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v16, v[6:7]
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[0:1]
; VI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[10:11], v24
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[18:19]
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[10:11], s[4:5], v[18:19]
; VI-GISEL-NEXT:    v_ldexp_f64 v[6:7], v[14:15], v26
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v16
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[2:3], v[18:19]
; VI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v8
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[6:7], v[18:19]
; VI-GISEL-NEXT:    v_mov_b32_e32 v20, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v21, 0xc090cc00
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v25, v1, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[10:11]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, v25, v3, s[10:11]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[0:1], v[20:21]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[10:11], s[4:5], v[20:21]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, v6, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v7, v25, v7, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v4, s[12:13]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v5, v25, v5, s[12:13]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], s[2:3], v[20:21]
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[12:13], s[6:7], v[20:21]
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[10:11]
; VI-GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; VI-GISEL-NEXT:    v_readfirstlane_b32 s4, v2
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v1, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v3, s[10:11]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, v6, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v4, s[12:13]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v7, s[8:9]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v5, s[12:13]
; VI-GISEL-NEXT:    v_readfirstlane_b32 s2, v6
; VI-GISEL-NEXT:    v_readfirstlane_b32 s6, v4
; VI-GISEL-NEXT:    v_readfirstlane_b32 s1, v0
; VI-GISEL-NEXT:    v_readfirstlane_b32 s3, v1
; VI-GISEL-NEXT:    v_readfirstlane_b32 s5, v2
; VI-GISEL-NEXT:    v_readfirstlane_b32 s7, v3
; VI-GISEL-NEXT:    ; return to shader part epilog
;
; GFX900-SDAG-LABEL: s_exp10_v4f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_mov_b32 s8, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s9, 0x400a934f
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v0, s8
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, s9
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_mul_f64 v[4:5], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], s[2:3], v[0:1]
; GFX900-SDAG-NEXT:    v_mul_f64 v[0:1], s[0:1], v[0:1]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v9, s7
; GFX900-SDAG-NEXT:    s_mov_b32 s8, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s9, 0xbfd34413
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v8, s6
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v11, s5
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v10, s4
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v13, s3
; GFX900-SDAG-NEXT:    s_mov_b32 s10, 0xa994fd21
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[2:3], s[8:9], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], s[8:9], v[10:11]
; GFX900-SDAG-NEXT:    s_mov_b32 s11, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v12, s2
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[6:7], s[8:9], v[12:13]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v15, s1
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v14, s0
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[0:1], s[8:9], v[14:15]
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[2:3], s[10:11], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[4:5], s[10:11], v[10:11]
; GFX900-SDAG-NEXT:    s_mov_b32 s8, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s9, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[6:7], s[10:11], v[12:13]
; GFX900-SDAG-NEXT:    s_mov_b32 s12, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s13, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[0:1], s[10:11], v[14:15]
; GFX900-SDAG-NEXT:    v_mul_f64 v[16:17], v[8:9], s[8:9]
; GFX900-SDAG-NEXT:    v_mul_f64 v[18:19], v[10:11], s[8:9]
; GFX900-SDAG-NEXT:    s_mov_b32 s10, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s11, 0x40026bb1
; GFX900-SDAG-NEXT:    s_mov_b32 s14, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s15, 0x3f2a01a0
; GFX900-SDAG-NEXT:    s_mov_b32 s16, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s17, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], s[10:11], v[16:17]
; GFX900-SDAG-NEXT:    v_mul_f64 v[16:17], v[12:13], s[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], s[10:11], v[18:19]
; GFX900-SDAG-NEXT:    v_mul_f64 v[18:19], v[14:15], s[8:9]
; GFX900-SDAG-NEXT:    s_mov_b32 s9, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s8, 0xfca7ab0c
; GFX900-SDAG-NEXT:    s_mov_b32 s18, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s19, 0x3f811111
; GFX900-SDAG-NEXT:    s_mov_b32 s20, 0x555502a1
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[12:13], s[10:11], v[16:17]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v17, s9
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v16, s8
; GFX900-SDAG-NEXT:    v_fma_f64 v[14:15], v[14:15], s[10:11], v[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], s[12:13], v[16:17]
; GFX900-SDAG-NEXT:    s_mov_b32 s8, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s9, 0x3ec71dee
; GFX900-SDAG-NEXT:    s_mov_b32 s10, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s11, 0x3efa0199
; GFX900-SDAG-NEXT:    s_mov_b32 s21, 0x3fa55555
; GFX900-SDAG-NEXT:    s_mov_b32 s22, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s23, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[8:9]
; GFX900-SDAG-NEXT:    s_mov_b32 s24, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s25, 0x3fe00000
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v20, v[2:3]
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v21, v[4:5]
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v6, v[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[10:11]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[14:15]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[22:23]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], s[24:25]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[8:9], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[8:9], v[8:9], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], s[12:13], v[16:17]
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[4:5], v[8:9], v20
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[8:9]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v8, 0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v9, 0xc090cc00
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[10:11]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[14:15]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[22:23]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], s[24:25]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[10:11], v[10:11], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], s[12:13], v[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], s[12:13], v[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[10:11]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[10:11]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[14:15]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[14:15]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[14:15], s[0:1], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[16:17]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[16:17]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[16:17], s[2:3], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[18:19]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[18:19]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[18:19], s[4:5], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[20:21]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[20:21]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[20:21], s[6:7], v[8:9]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[22:23]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[22:23]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], s[24:25]
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], s[24:25]
; GFX900-SDAG-NEXT:    v_fma_f64 v[18:19], v[12:13], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[16:17], v[14:15], v[16:17], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[12:13], v[12:13], v[18:19], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[2:3], v[14:15], v[16:17], 1.0
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v14, v[0:1]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v18, 0
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v19, 0x40900000
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[10:11], v21
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[4:5], v[18:19]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[6:7], v[18:19]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[0:1], v[18:19]
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v14
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[18:19]
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[6:7], v[12:13], v6
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v10, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, v10, v1, s[8:9]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v5, v10, v5, vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[18:19]
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[20:21], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, v10, v3, s[12:13]
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s5, v1
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v4, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[18:19], s[8:9]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[14:15]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[16:17], s[10:11]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v7, v10, v7, s[10:11]
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s1, v3
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v6, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[14:15], s[12:13]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v5, s[20:21]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v7, 0, v7, s[16:17]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s3, v7
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s7, v5
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s0, v2
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s2, v3
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s4, v0
; GFX900-SDAG-NEXT:    v_readfirstlane_b32 s6, v1
; GFX900-SDAG-NEXT:    ; return to shader part epilog
;
; GFX900-GISEL-LABEL: s_exp10_v4f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], s[0:1], v[0:1]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], s[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_mul_f64 v[4:5], s[2:3], v[0:1]
; GFX900-GISEL-NEXT:    v_mul_f64 v[0:1], s[6:7], v[0:1]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[6:7], v[6:7]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[4:5], v[4:5]
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[0:1], v[0:1]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v18, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v19, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], -v[2:3], v[8:9], s[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], -v[6:7], v[8:9], s[4:5]
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], -v[4:5], v[8:9], s[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], -v[0:1], v[8:9], s[6:7]
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v26, v[4:5]
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], -v[2:3], v[12:13], v[10:11]
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], -v[6:7], v[12:13], v[16:17]
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], -v[4:5], v[12:13], v[14:15]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], -v[0:1], v[12:13], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0x40026bb1
; GFX900-GISEL-NEXT:    v_mul_f64 v[20:21], v[10:11], v[18:19]
; GFX900-GISEL-NEXT:    v_mul_f64 v[22:23], v[14:15], v[18:19]
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[12:13], v[20:21]
; GFX900-GISEL-NEXT:    v_mul_f64 v[20:21], v[16:17], v[18:19]
; GFX900-GISEL-NEXT:    v_mul_f64 v[18:19], v[8:9], v[18:19]
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], v[14:15], v[12:13], v[22:23]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_fma_f64 v[16:17], v[16:17], v[12:13], v[20:21]
; GFX900-GISEL-NEXT:    v_fma_f64 v[8:9], v[8:9], v[12:13], v[18:19]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v12, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[22:23], v[12:13]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[22:23], v[12:13]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[22:23], v[12:13]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[22:23], v[12:13]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v22, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v23, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[24:25], v[16:17], v[24:25], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], v[22:23]
; GFX900-GISEL-NEXT:    v_fma_f64 v[18:19], v[10:11], v[18:19], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[20:21], v[14:15], v[20:21], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[22:23], v[16:17], v[24:25], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[12:13], v[8:9], v[12:13], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v24, v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v25, 0x7ff00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[10:11], v[10:11], v[18:19], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[14:15], v[14:15], v[20:21], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v18, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v19, 0x40900000
; GFX900-GISEL-NEXT:    v_fma_f64 v[2:3], v[16:17], v[22:23], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[8:9], v[12:13], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v16, v[6:7]
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[0:1]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[10:11], v24
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, s[0:1], v[18:19]
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[10:11], s[4:5], v[18:19]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[6:7], v[14:15], v26
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v16
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[8:9], s[2:3], v[18:19]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v8
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 s[12:13], s[6:7], v[18:19]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v20, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v21, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v25, v1, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[10:11]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v3, v25, v3, s[10:11]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, s[0:1], v[20:21]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[10:11], s[4:5], v[20:21]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, v6, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v7, v25, v7, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v4, s[12:13]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v5, v25, v5, s[12:13]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[8:9], s[2:3], v[20:21]
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[12:13], s[6:7], v[20:21]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[10:11]
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s4, v2
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v1, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v3, s[10:11]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, v6, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v4, s[12:13]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v7, s[8:9]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v5, s[12:13]
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s2, v6
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s6, v4
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s1, v0
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s3, v1
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s5, v2
; GFX900-GISEL-NEXT:    v_readfirstlane_b32 s7, v3
; GFX900-GISEL-NEXT:    ; return to shader part epilog
  %result = call <4 x double> @llvm.exp10.v4f64(<4 x double> %in)
  %cast = bitcast <4 x double> %result to <8 x i32>
  ret <8 x i32> %cast
}

define double @v_exp10_fabs_f64(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_fabs_f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], |v[0:1]|
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, s[4:5]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, s[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_fabs_f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], |v[0:1]|
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e64 vcc, |v[0:1]|, v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_fabs_f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], |v[0:1]|
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, s[4:5]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_fabs_f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], |v[0:1]|
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_fabs_f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], |v[0:1]|
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, s[4:5]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_fabs_f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], |v[0:1]|
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %fabs = call double @llvm.fabs.f64(double %in)
  %result = call double @llvm.exp10.f64(double %fabs)
  ret double %result
}

define double @v_exp10_fneg_fabs_f64(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_fneg_fabs_f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xc00a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], -|v[0:1]|
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xc0900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x4090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 vcc, |v[0:1]|, s[4:5]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], |v[0:1]|, s[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_fneg_fabs_f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], -|v[0:1]|, v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], -|v[0:1]|
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, -|v[0:1]|, v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e64 vcc, -|v[0:1]|, v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_fneg_fabs_f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xc00a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x4090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], -|v[0:1]|
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xc0900000
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 vcc, |v[0:1]|, s[4:5]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], |v[0:1]|, s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_fneg_fabs_f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], -|v[0:1]|, v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], -|v[0:1]|
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], -|v[0:1]|, v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, -|v[0:1]|, v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_fneg_fabs_f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xc00a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x4090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], -|v[0:1]|
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xc0900000
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 vcc, |v[0:1]|, s[4:5]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], |v[0:1]|, s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_fneg_fabs_f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], -|v[0:1]|, v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], -|v[0:1]|
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], -|v[0:1]|, v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, -|v[0:1]|, v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %fabs = call double @llvm.fabs.f64(double %in)
  %fneg.fabs = fneg double %fabs
  %result = call double @llvm.exp10.f64(double %fneg.fabs)
  ret double %result
}

define double @v_exp10_fneg_f64(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_fneg_f64:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xc00a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], -v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xc0900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x4090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], s[6:7], v[0:1]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_fneg_f64:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], -v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], -v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, -v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e64 vcc, -v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_fneg_f64:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xc00a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0x4090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], -v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xc0900000
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_fneg_f64:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], -v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], -v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], -v[0:1], v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, -v[0:1], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_fneg_f64:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xc00a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0x4090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], -v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xc0900000
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_fneg_f64:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], -v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], -v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], -v[0:1], v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, -v[0:1], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %fneg = fneg double %in
  %result = call double @llvm.exp10.f64(double %fneg)
  ret double %result
}

define double @v_exp10_f64_fast(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_f64_fast:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_fast:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_fast:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_fast:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v6
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_fast:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_fast:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v6
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call fast double @llvm.exp10.f64(double %in)
  ret double %result
}

define double @v_exp10_f64_afn(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_f64_afn:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_afn:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_afn:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_afn:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_afn:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_afn:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call afn double @llvm.exp10.f64(double %in)
  ret double %result
}

define double @v_exp10_f64_ninf(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_f64_ninf:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_ninf:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_ninf:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_ninf:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v6
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_ninf:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_ninf:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v6
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call ninf double @llvm.exp10.f64(double %in)
  ret double %result
}

define double @v_exp10_f64_nnan(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_f64_nnan:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_nnan:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_nnan:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_nnan:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_nnan:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_nnan:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call nnan double @llvm.exp10.f64(double %in)
  ret double %result
}

define double @v_fabs_exp10_f64_afn(double %in) #0 {
; SI-SDAG-LABEL: v_fabs_exp10_f64_afn:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], |v[0:1]|
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, s[4:5]
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, s[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_fabs_exp10_f64_afn:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], |v[0:1]|
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e64 vcc, |v[0:1]|, v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_fabs_exp10_f64_afn:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], |v[0:1]|
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, s[4:5]
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, s[6:7]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_fabs_exp10_f64_afn:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], |v[0:1]|
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_fabs_exp10_f64_afn:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], |v[0:1]|
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, s[4:5]
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, s[6:7]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_fabs_exp10_f64_afn:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], |v[0:1]|
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], |v[0:1]|, v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e64 vcc, |v[0:1]|, v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %fabs = call double @llvm.fabs.f64(double %in)
  %result = call afn double @llvm.exp10.f64(double %fabs)
  ret double %result
}

define double @v_exp10_f64_nnan_ninf(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_f64_nnan_ninf:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_nnan_ninf:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_nnan_ninf:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_nnan_ninf:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v6
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_nnan_ninf:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_nnan_ninf:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v6
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call nnan ninf double @llvm.exp10.f64(double %in)
  ret double %result
}

define double @v_exp10_f64_undef() #0 {
; GCN-SDAG-LABEL: v_exp10_f64_undef:
; GCN-SDAG:       ; %bb.0:
; GCN-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-SDAG-NEXT:    v_mov_b32_e32 v1, 0
; GCN-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GCN-GISEL-LABEL: v_exp10_f64_undef:
; GCN-GISEL:       ; %bb.0:
; GCN-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call double @llvm.exp10.f64(double poison)
  ret double %result
}

define double @v_exp10_f64_0() #0 {
; GCN-LABEL: v_exp10_f64_0:
; GCN:       ; %bb.0:
; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT:    v_mov_b32_e32 v0, 0
; GCN-NEXT:    v_mov_b32_e32 v1, 0x3ff00000
; GCN-NEXT:    s_setpc_b64 s[30:31]
  %result = call double @llvm.exp10.f64(double 0.0)
  ret double %result
}

define double @v_exp10_f64_from_fpext_f16(half %src) #0 {
; SI-SDAG-LABEL: v_exp10_f64_from_fpext_f16:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    s_brev_b32 s8, -2
; SI-SDAG-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; SI-SDAG-NEXT:    v_mov_b32_e32 v5, 0x43300000
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    s_mov_b32 s6, -1
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x432fffff
; SI-SDAG-NEXT:    v_bfi_b32 v5, s8, v5, v3
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[6:7]
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_from_fpext_f16:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v0
; SI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_cvt_f64_f32_e32 v[2:3], v2
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x432fffff
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x509f79ff
; SI-GISEL-NEXT:    v_mul_f64 v[0:1], v[2:3], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fd34413
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v1
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[12:13], v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[0:1]|, v[6:7]
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[12:13], -v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0xa994fd21
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[0:1], v[8:9], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[0:1], v[10:11], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[10:11], v[4:5], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v10, v[0:1]
; SI-GISEL-NEXT:    v_fma_f64 v[0:1], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0
; SI-GISEL-NEXT:    v_fma_f64 v[0:1], v[4:5], v[0:1], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v10
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[2:3], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_from_fpext_f16:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_from_fpext_f16:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_from_fpext_f16:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_from_fpext_f16:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %fpext = fpext half %src to double
  %result = call double @llvm.exp10.f64(double %fpext)
  ret double %result
}

define double @v_exp10_f64_from_fpext_f32(float %src) #0 {
; SI-SDAG-LABEL: v_exp10_f64_from_fpext_f32:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s6, -1
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_from_fpext_f32:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, -1
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[8:9], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[8:9], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x509f79ff
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], -v[2:3], v[10:11], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[2:3], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_from_fpext_f32:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_from_fpext_f32:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_from_fpext_f32:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_from_fpext_f32:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %fpext = fpext float %src to double
  %result = call double @llvm.exp10.f64(double %fpext)
  ret double %result
}

define double @v_exp10_f64_from_fpext_math_f16(half %src0, half %src1) #0 {
; SI-SDAG-LABEL: v_exp10_f64_from_fpext_math_f16:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    s_brev_b32 s10, -2
; SI-SDAG-NEXT:    v_add_f32_e32 v0, v0, v1
; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0x43300000
; SI-SDAG-NEXT:    s_mov_b32 s6, -1
; SI-SDAG-NEXT:    s_mov_b32 s7, 0x432fffff
; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v0
; SI-SDAG-NEXT:    v_mov_b32_e32 v0, 0
; SI-SDAG-NEXT:    s_mov_b32 s8, 0x509f79ff
; SI-SDAG-NEXT:    s_mov_b32 s9, 0xbfd34413
; SI-SDAG-NEXT:    v_cvt_f64_f32_e32 v[2:3], v1
; SI-SDAG-NEXT:    v_mul_f64 v[4:5], v[2:3], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    v_bfi_b32 v1, s10, v6, v5
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[4:5]|, s[6:7]
; SI-SDAG-NEXT:    v_add_f64 v[0:1], v[6:7], -v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v1, v5, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[0:1], s[8:9], v[2:3]
; SI-SDAG-NEXT:    s_mov_b32 s6, 0x494ea3e9
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[0:1], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[0:1]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[0:1], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v8
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[2:3]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[2:3]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, v4, v1, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_from_fpext_math_f16:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x432fffff
; SI-GISEL-NEXT:    v_add_f32_e32 v0, v0, v1
; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x400a934f
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x509f79ff
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fd34413
; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v0
; SI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0xbc49dc1d
; SI-GISEL-NEXT:    v_cvt_f64_f32_e32 v[2:3], v2
; SI-GISEL-NEXT:    v_mov_b32_e32 v14, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v15, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[0:1], v[2:3], v[0:1]
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v1
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[12:13], v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[0:1]|, v[6:7]
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[12:13], -v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xbbb55516
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[0:1], v[8:9], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[0:1], v[10:11], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mul_f64 v[10:11], v[4:5], v[14:15]
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e5ade15
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v12, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v13, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[8:9], v[4:5], v[8:9], v[12:13]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v10, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v11, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[10:11]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v10, v[0:1]
; SI-GISEL-NEXT:    v_fma_f64 v[0:1], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0
; SI-GISEL-NEXT:    v_fma_f64 v[0:1], v[4:5], v[0:1], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[0:1], v[0:1], v10
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[2:3], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_from_fpext_math_f16:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    v_add_f16_e32 v0, v0, v1
; VI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_from_fpext_math_f16:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_add_f16_e32 v0, v0, v1
; VI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_from_fpext_math_f16:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    v_add_f16_e32 v0, v0, v1
; GFX900-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_from_fpext_math_f16:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_add_f16_e32 v0, v0, v1
; GFX900-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_cvt_f64_f32_e32 v[0:1], v0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %fadd = fadd half %src0, %src1
  %fpext = fpext half %fadd to double
  %result = call double @llvm.exp10.f64(double %fpext)
  ret double %result
}

define double @v_exp10_f64_contract(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_f64_contract:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; SI-SDAG-NEXT:    s_mov_b32 s6, 0
; SI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; SI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_contract:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7ff00000
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_contract:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    s_mov_b32 s6, 0
; VI-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; VI-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; VI-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_contract:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; VI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; VI-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_contract:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s7, 0xc090cc00
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40900000
; GFX900-SDAG-NEXT:    v_cmp_nlt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e64 s[4:5], s[6:7], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0x7ff00000
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
; GFX900-SDAG-NEXT:    s_and_b64 vcc, s[4:5], vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, v3, s[4:5]
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_contract:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e64 s[4:5], v[0:1], v[6:7]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x40900000
; GFX900-GISEL-NEXT:    v_cmp_ngt_f64_e32 vcc, v[0:1], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x7ff00000
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v0, v3, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, v2, s[4:5]
; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, v1, s[4:5]
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call contract double @llvm.exp10.f64(double %in)
  ret double %result
}

define double @v_exp10_f64_contract_nnan_ninf(double %in) #0 {
; SI-SDAG-LABEL: v_exp10_f64_contract_nnan_ninf:
; SI-SDAG:       ; %bb.0:
; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; SI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; SI-SDAG-NEXT:    s_brev_b32 s4, -2
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x43300000
; SI-SDAG-NEXT:    v_bfi_b32 v5, s4, v4, v3
; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0
; SI-SDAG-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, -1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x432fffff
; SI-SDAG-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-SDAG-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; SI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; SI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; SI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    s_mov_b32 s4, 11
; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; SI-SDAG-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s4, 0
; SI-SDAG-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; SI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; SI-GISEL-LABEL: v_exp10_f64_contract_nnan_ninf:
; SI-GISEL:       ; %bb.0:
; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; SI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_and_b32_e32 v5, 0x80000000, v3
; SI-GISEL-NEXT:    v_or_b32_e32 v5, 0x43300000, v5
; SI-GISEL-NEXT:    v_add_f64 v[6:7], v[2:3], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, -1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x432fffff
; SI-GISEL-NEXT:    v_add_f64 v[4:5], v[6:7], -v[4:5]
; SI-GISEL-NEXT:    v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x509f79ff
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3fd34413
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[0:1]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; SI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; SI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; SI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; SI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; SI-GISEL-NEXT:    v_cvt_i32_f64_e32 v8, v[2:3]
; SI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0
; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0xc090cc00
; SI-GISEL-NEXT:    v_ldexp_f64 v[2:3], v[2:3], v8
; SI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[4:5]
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: v_exp10_f64_contract_nnan_ninf:
; VI-SDAG:       ; %bb.0:
; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; VI-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; VI-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; VI-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; VI-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; VI-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 11
; VI-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; VI-SDAG-NEXT:    s_mov_b32 s4, 0
; VI-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; VI-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; VI-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: v_exp10_f64_contract_nnan_ninf:
; VI-GISEL:       ; %bb.0:
; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; VI-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; VI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; VI-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; VI-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; VI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; VI-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; VI-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; VI-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; VI-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[2:3]
; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; VI-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
; VI-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v6
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-SDAG-LABEL: v_exp10_f64_contract_nnan_ninf:
; GFX900-SDAG:       ; %bb.0:
; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x979a371
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x400a934f
; GFX900-SDAG-NEXT:    v_mul_f64 v[2:3], v[0:1], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x509f79ff
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbfd34413
; GFX900-SDAG-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xa994fd21
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3c49dc1d
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[2:3], s[4:5], v[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x494ea3e9
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xbcaf48ad
; GFX900-SDAG-NEXT:    v_cvt_i32_f64_e32 v2, v[2:3]
; GFX900-SDAG-NEXT:    v_mul_f64 v[6:7], v[4:5], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0xbbb55516
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x40026bb1
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v6, 0xfca7ab0c
; GFX900-SDAG-NEXT:    v_mov_b32_e32 v7, 0x3e928af3
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x6a5dcb37
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3e5ade15
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x623fde64
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3ec71dee
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7c89e6b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3efa0199
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x14761f6e
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f2a01a0
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x1852b7b0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f56c16c
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x11122322
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3f811111
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x555502a1
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fa55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x55555511
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fc55555
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 11
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3fe00000
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], s[4:5]
; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0
; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0xc090cc00
; GFX900-SDAG-NEXT:    v_cmp_ngt_f64_e32 vcc, s[4:5], v[0:1]
; GFX900-SDAG-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-SDAG-NEXT:    v_ldexp_f64 v[2:3], v[4:5], v2
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, 0, v2, vcc
; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX900-GISEL-LABEL: v_exp10_f64_contract_nnan_ninf:
; GFX900-GISEL:       ; %bb.0:
; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x979a371
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x400a934f
; GFX900-GISEL-NEXT:    v_mul_f64 v[2:3], v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x509f79ff
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3fd34413
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0xa994fd21
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbc49dc1d
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xbbb55516
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x40026bb1
; GFX900-GISEL-NEXT:    v_rndne_f64_e32 v[2:3], v[2:3]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[4:5], v[0:1]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], -v[2:3], v[6:7], v[4:5]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x494ea3e9
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0xbcaf48ad
; GFX900-GISEL-NEXT:    v_mul_f64 v[6:7], v[4:5], v[6:7]
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[8:9], v[6:7]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x6a5dcb37
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x3e5ade15
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0xfca7ab0c
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3e928af3
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x623fde64
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3ec71dee
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x7c89e6b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3efa0199
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x14761f6e
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f2a01a0
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x1852b7b0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f56c16c
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x11122322
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3f811111
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x555502a1
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fa55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 0x55555511
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fc55555
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v8, 11
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v9, 0x3fe00000
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], v[8:9]
; GFX900-GISEL-NEXT:    v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_fma_f64 v[4:5], v[4:5], v[6:7], 1.0
; GFX900-GISEL-NEXT:    v_cvt_i32_f64_e32 v6, v[2:3]
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0
; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc090cc00
; GFX900-GISEL-NEXT:    v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
; GFX900-GISEL-NEXT:    v_ldexp_f64 v[4:5], v[4:5], v6
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
  %result = call contract nnan ninf double @llvm.exp10.f64(double %in)
  ret double %result
}

attributes #0 = { nounwind }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFX900: {{.*}}
; SI: {{.*}}
; VI: {{.*}}