[AMDGPU] Allow hazard checks for WMMA co-exec (#168805) Now we are just inserting V_NOP instrtuctions, try to schedule something into the shadow. It is still somewhat imprecise, for example AdvanceCycle() will use TII.getNumWaitStates() anyway, but in a scheduling mode we are not required to be precise. We must be finally precise in the hazard recognizer mode. Then EmittedInstrs buffer is also limited to MaxLookAhead even though VALU only hazards may actually never expire and require an endless buffer. But that's OK, we can at least mitigate what the buffer can hold. The buffer is also currently much bigger than any of VALU hazards may need. That said the rest of the 'fix*' functions here can be changed the same way, these which are using V_NOPs. This one is just the worst because it may require up to 9 nops.
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