; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+e2 -mattr=+2e3 < %s -mtriple=csky | FileCheck %s
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC

define i32 @addRR(i32 %x, i32 %y) {
; CHECK-LABEL: addRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addu16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: addRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i32 %y, %x
  ret i32 %add
}

define i32 @addRI(i32 %x) {
; CHECK-LABEL: addRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addi16 a0, 10
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: addRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 a0, 10
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i32 %x, 10
  ret i32 %add
}

define i32 @addRI_256(i32 %x) {
; CHECK-LABEL: addRI_256:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addi16 a0, 256
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: addRI_256:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 a0, 256
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i32 %x, 256
  ret i32 %add
}

define i32 @addRI_4096(i32 %x) {
; CHECK-LABEL: addRI_4096:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addi32 a0, a0, 4096
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: addRI_4096:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a3, a1, 16
; GENERIC-NEXT:    or16 a3, a2
; GENERIC-NEXT:    movi16 a2, 16
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a3
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    addu16 a0, a0, a2
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i32 %x, 4096
  ret i32 %add
}

define i32 @addRI_X(i32 %x) {
; CHECK-LABEL: addRI_X:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movi32 a1, 4097
; CHECK-NEXT:    addu16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: addRI_X:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 16
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    addu16 a0, a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i32 %x, 4097
  ret i32 %add
}

define i64 @ADD_LONG(i64 %x, i64 %y) {
; CHECK-LABEL: ADD_LONG:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    clrc32
; CHECK-NEXT:    addc32 a0, a2, a0
; CHECK-NEXT:    addc32 a1, a3, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ADD_LONG:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    clrc16
; GENERIC-NEXT:    addc16 a0, a2
; GENERIC-NEXT:    addc16 a1, a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i64 %y, %x
  ret i64 %add
}

define i64 @ADD_LONG_I(i64 %x) {
; CHECK-LABEL: ADD_LONG_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    clrc32
; CHECK-NEXT:    movi16 a2, 1
; CHECK-NEXT:    addc16 a0, a2
; CHECK-NEXT:    movi16 a2, 0
; CHECK-NEXT:    addc16 a1, a2
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ADD_LONG_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    clrc16
; GENERIC-NEXT:    movi16 a2, 1
; GENERIC-NEXT:    addc16 a0, a2
; GENERIC-NEXT:    movi16 a2, 0
; GENERIC-NEXT:    addc16 a1, a2
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i64 %x, 1
  ret i64 %add
}

define i16 @ADD_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: ADD_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addu16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ADD_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i16 %y, %x
  ret i16 %add
}

define i16 @ADD_SHORT_I(i16 %x) {
; CHECK-LABEL: ADD_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addi16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ADD_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 a0, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i16 %x, 1
  ret i16 %add
}

define i8 @ADD_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: ADD_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addu16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ADD_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i8 %y, %x
  ret i8 %add
}

define i8 @ADD_CHAR_I(i8 %x) {
; CHECK-LABEL: ADD_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addi16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ADD_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 a0, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %add = add nsw i8 %x, 1
  ret i8 %add
}


define i32 @subRR(i32 %x, i32 %y) {
; CHECK-LABEL: subRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    subu16 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: subRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    subu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i32 %y, %x
  ret i32 %sub
}

define i32 @subRI(i32 %x) {
; CHECK-LABEL: subRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    subi16 a0, 10
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: subRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    subi16 a0, 10
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i32 %x, 10
  ret i32 %sub
}

define i32 @subRI_256(i32 %x) {
; CHECK-LABEL: subRI_256:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    subi16 a0, 256
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: subRI_256:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    subi16 a0, 256
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i32 %x, 256
  ret i32 %sub
}

define i32 @subRI_4096(i32 %x) {
; CHECK-LABEL: subRI_4096:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    subi32 a0, a0, 4096
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: subRI_4096:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 255
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 240
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    addu16 a0, a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i32 %x, 4096
  ret i32 %sub
}

define i32 @subRI_X(i32 %x) {
; CHECK-LABEL: subRI_X:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movih32 a1, 65535
; CHECK-NEXT:    ori32 a1, a1, 61439
; CHECK-NEXT:    addu16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: subRI_X:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 255
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a3, a1, 16
; GENERIC-NEXT:    or16 a3, a2
; GENERIC-NEXT:    movi16 a2, 239
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a3
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    addu16 a0, a0, a2
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i32 %x, 4097
  ret i32 %sub
}

define i64 @SUB_LONG(i64 %x, i64 %y) {
; CHECK-LABEL: SUB_LONG:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    setc32
; CHECK-NEXT:    subc32 a0, a2, a0
; CHECK-NEXT:    mvcv16 a2
; CHECK-NEXT:    btsti16 a2, 0
; CHECK-NEXT:    mvcv16 a2
; CHECK-NEXT:    btsti16 a2, 0
; CHECK-NEXT:    subc32 a1, a3, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SUB_LONG:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    setc16
; GENERIC-NEXT:    subc16 a2, a0
; GENERIC-NEXT:    mvcv16 a0
; GENERIC-NEXT:    btsti16 a0, 0
; GENERIC-NEXT:    mvcv16 a0
; GENERIC-NEXT:    btsti16 a0, 0
; GENERIC-NEXT:    subc16 a3, a1
; GENERIC-NEXT:    mov16 a0, a2
; GENERIC-NEXT:    mov16 a1, a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i64 %y, %x
  ret i64 %sub
}

define i64 @SUB_LONG_I(i64 %x) {
; CHECK-LABEL: SUB_LONG_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    clrc32
; CHECK-NEXT:    movih32 a2, 65535
; CHECK-NEXT:    ori32 a2, a2, 65535
; CHECK-NEXT:    addc16 a0, a2
; CHECK-NEXT:    addc16 a1, a2
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SUB_LONG_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset l0, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    clrc16
; GENERIC-NEXT:    movi16 a2, 255
; GENERIC-NEXT:    lsli16 a3, a2, 24
; GENERIC-NEXT:    lsli16 l0, a2, 16
; GENERIC-NEXT:    or16 l0, a3
; GENERIC-NEXT:    lsli16 a3, a2, 8
; GENERIC-NEXT:    or16 a3, l0
; GENERIC-NEXT:    or16 a3, a2
; GENERIC-NEXT:    addc16 a0, a3
; GENERIC-NEXT:    addc16 a1, a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i64 %x, 1
  ret i64 %sub
}

define i16 @SUB_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: SUB_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    subu16 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SUB_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    subu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i16 %y, %x
  ret i16 %sub
}

define i16 @SUB_SHORT_I(i16 %x) {
; CHECK-LABEL: SUB_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    subi16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SUB_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    subi16 a0, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i16 %x, 1
  ret i16 %sub
}

define i8 @SUB_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: SUB_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    subu16 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SUB_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    subu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i8 %y, %x
  ret i8 %sub
}

define i8 @SUB_CHAR_I(i8 %x) {
; CHECK-LABEL: SUB_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    subi16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SUB_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    subi16 a0, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sub = sub nsw i8 %x, 1
  ret i8 %sub
}

define i32 @mulRR(i32 %x, i32 %y) {
; CHECK-LABEL: mulRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    mult16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: mulRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    mult16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %mul = mul nsw i32 %y, %x
  ret i32 %mul
}

define i32 @mulRI(i32 %x) {
; CHECK-LABEL: mulRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movi16 a1, 10
; CHECK-NEXT:    mult16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: mulRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 10
; GENERIC-NEXT:    mult16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %mul = mul nsw i32 %x, 10
  ret i32 %mul
}

define i32 @mulRI_X(i32 %x) {
; CHECK-LABEL: mulRI_X:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsli16 a1, a0, 12
; CHECK-NEXT:    addu16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: mulRI_X:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsli16 a1, a0, 12
; GENERIC-NEXT:    addu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %mul = mul nsw i32 %x, 4097
  ret i32 %mul
}

define i16 @MUL_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: MUL_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    mult16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: MUL_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    mult16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %mul = mul nsw i16 %y, %x
  ret i16 %mul
}

define i16 @MUL_SHORT_I(i16 %x) {
; CHECK-LABEL: MUL_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ixh32 a0, a0, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: MUL_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsli16 a1, a0, 1
; GENERIC-NEXT:    addu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %mul = mul nsw i16 %x, 3
  ret i16 %mul
}

define i8 @MUL_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: MUL_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    mult16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: MUL_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    mult16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %mul = mul nsw i8 %y, %x
  ret i8 %mul
}

define i8 @MUL_CHAR_I(i8 %x) {
; CHECK-LABEL: MUL_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ixh32 a0, a0, a0
; CHECK-NEXT:    movi16 a1, 0
; CHECK-NEXT:    subu16 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: MUL_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsli16 a1, a0, 1
; GENERIC-NEXT:    addu16 a0, a1, a0
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    subu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %mul = mul nsw i8 %x, -3
  ret i8 %mul
}

define i32 @udivRR(i32 %x, i32 %y) {
; CHECK-LABEL: udivRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    divu32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: udivRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset lr, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    mov16 a2, a0
; GENERIC-NEXT:    lrw32 a3, [.LCPI29_0]
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    mov16 a1, a2
; GENERIC-NEXT:    jsr16 a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI29_0:
; GENERIC-NEXT:    .long __udivsi3
entry:
  %udiv = udiv  i32 %y, %x
  ret i32 %udiv
}

define i32 @udivRI(i32 %x) {
; CHECK-LABEL: udivRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movi16 a1, 10
; CHECK-NEXT:    divu32 a0, a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: udivRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset lr, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    lrw32 a2, [.LCPI30_0]
; GENERIC-NEXT:    movi16 a1, 10
; GENERIC-NEXT:    jsr16 a2
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI30_0:
; GENERIC-NEXT:    .long __udivsi3
entry:
  %udiv = udiv  i32 %x, 10
  ret i32 %udiv
}

define i32 @udivRI_X(i32 %x) {
; CHECK-LABEL: udivRI_X:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movi32 a1, 4097
; CHECK-NEXT:    divu32 a0, a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: udivRI_X:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset lr, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 16
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    lrw32 a2, [.LCPI31_0]
; GENERIC-NEXT:    jsr16 a2
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI31_0:
; GENERIC-NEXT:    .long __udivsi3
entry:
  %udiv = udiv  i32 %x, 4097
  ret i32 %udiv
}

define i16 @UDIV_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: UDIV_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    zexth16 a0, a0
; CHECK-NEXT:    zexth16 a1, a1
; CHECK-NEXT:    divu32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: UDIV_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 8
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    st16.w l0, (sp, 4) # 4-byte Folded Spill
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset l0, -4
; GENERIC-NEXT:    .cfi_offset lr, -8
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 12
; GENERIC-NEXT:    mov16 a2, a1
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a3, a1, 24
; GENERIC-NEXT:    lsli16 l0, a1, 16
; GENERIC-NEXT:    or16 l0, a3
; GENERIC-NEXT:    movi16 a3, 255
; GENERIC-NEXT:    lsli16 a1, a3, 8
; GENERIC-NEXT:    or16 a1, l0
; GENERIC-NEXT:    or16 a1, a3
; GENERIC-NEXT:    and16 a2, a1
; GENERIC-NEXT:    and16 a1, a0
; GENERIC-NEXT:    lrw32 a3, [.LCPI32_0]
; GENERIC-NEXT:    mov16 a0, a2
; GENERIC-NEXT:    jsr16 a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    ld16.w l0, (sp, 4) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 8
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI32_0:
; GENERIC-NEXT:    .long __udivsi3
entry:
  %udiv = udiv  i16 %y, %x
  ret i16 %udiv
}

define i16 @UDIV_SHORT_I(i16 %x) {
; CHECK-LABEL: UDIV_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    zexth16 a0, a0
; CHECK-NEXT:    movi32 a1, 43691
; CHECK-NEXT:    mult16 a0, a1
; CHECK-NEXT:    lsri16 a0, a0, 17
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: UDIV_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 255
; GENERIC-NEXT:    lsli16 a3, a2, 8
; GENERIC-NEXT:    or16 a3, a1
; GENERIC-NEXT:    or16 a3, a2
; GENERIC-NEXT:    and16 a3, a0
; GENERIC-NEXT:    movi16 a0, 170
; GENERIC-NEXT:    lsli16 a0, a0, 8
; GENERIC-NEXT:    or16 a0, a1
; GENERIC-NEXT:    movi16 a1, 171
; GENERIC-NEXT:    or16 a1, a0
; GENERIC-NEXT:    mult16 a1, a3
; GENERIC-NEXT:    lsri16 a0, a1, 17
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %udiv = udiv  i16 %x, 3
  ret i16 %udiv
}

define i8 @UDIV_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: UDIV_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    zextb16 a0, a0
; CHECK-NEXT:    zextb16 a1, a1
; CHECK-NEXT:    divu32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: UDIV_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset lr, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    mov16 a2, a1
; GENERIC-NEXT:    movi16 a1, 255
; GENERIC-NEXT:    and16 a2, a1
; GENERIC-NEXT:    and16 a1, a0
; GENERIC-NEXT:    lrw32 a3, [.LCPI34_0]
; GENERIC-NEXT:    mov16 a0, a2
; GENERIC-NEXT:    jsr16 a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI34_0:
; GENERIC-NEXT:    .long __udivsi3
entry:
  %udiv = udiv  i8 %y, %x
  ret i8 %udiv
}

define i8 @UDIV_CHAR_I(i8 %x) {
; CHECK-LABEL: UDIV_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    zextb16 a0, a0
; CHECK-NEXT:    movi16 a1, 171
; CHECK-NEXT:    mult16 a0, a1
; CHECK-NEXT:    lsri16 a0, a0, 9
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: UDIV_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 255
; GENERIC-NEXT:    and16 a1, a0
; GENERIC-NEXT:    movi16 a0, 171
; GENERIC-NEXT:    mult16 a0, a1
; GENERIC-NEXT:    lsri16 a0, a0, 9
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %udiv = udiv  i8 %x, 3
  ret i8 %udiv
}

define i32 @sdivRR(i32 %x, i32 %y) {
; CHECK-LABEL: sdivRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    divs32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: sdivRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset lr, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    mov16 a2, a0
; GENERIC-NEXT:    lrw32 a3, [.LCPI36_0]
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    mov16 a1, a2
; GENERIC-NEXT:    jsr16 a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI36_0:
; GENERIC-NEXT:    .long __divsi3
entry:
  %sdiv = sdiv  i32 %y, %x
  ret i32 %sdiv
}

define i32 @sdivRI(i32 %x) {
; CHECK-LABEL: sdivRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movi16 a1, 10
; CHECK-NEXT:    divs32 a0, a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: sdivRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset lr, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    lrw32 a2, [.LCPI37_0]
; GENERIC-NEXT:    movi16 a1, 10
; GENERIC-NEXT:    jsr16 a2
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI37_0:
; GENERIC-NEXT:    .long __divsi3
entry:
  %sdiv = sdiv  i32 %x, 10
  ret i32 %sdiv
}

define i32 @sdivRI_X(i32 %x) {
; CHECK-LABEL: sdivRI_X:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movi32 a1, 4097
; CHECK-NEXT:    divs32 a0, a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: sdivRI_X:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset lr, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 16
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    lrw32 a2, [.LCPI38_0]
; GENERIC-NEXT:    jsr16 a2
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI38_0:
; GENERIC-NEXT:    .long __divsi3
entry:
  %sdiv = sdiv  i32 %x, 4097
  ret i32 %sdiv
}

define i16 @SDIV_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: SDIV_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sexth16 a0, a0
; CHECK-NEXT:    sexth16 a1, a1
; CHECK-NEXT:    divs32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SDIV_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset lr, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    sexth16 a2, a1
; GENERIC-NEXT:    sexth16 a1, a0
; GENERIC-NEXT:    lrw32 a3, [.LCPI39_0]
; GENERIC-NEXT:    mov16 a0, a2
; GENERIC-NEXT:    jsr16 a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI39_0:
; GENERIC-NEXT:    .long __divsi3
entry:
  %sdiv = sdiv  i16 %y, %x
  ret i16 %sdiv
}

define i16 @SDIV_SHORT_I(i16 %x) {
; CHECK-LABEL: SDIV_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sexth16 a0, a0
; CHECK-NEXT:    movi32 a1, 21846
; CHECK-NEXT:    mult16 a0, a1
; CHECK-NEXT:    lsri16 a1, a0, 31
; CHECK-NEXT:    lsri16 a0, a0, 16
; CHECK-NEXT:    addu16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SDIV_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    sexth16 a0, a0
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 85
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    movi16 a1, 86
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    mult16 a1, a0
; GENERIC-NEXT:    lsri16 a0, a1, 31
; GENERIC-NEXT:    lsri16 a1, a1, 16
; GENERIC-NEXT:    addu16 a0, a1, a0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sdiv = sdiv  i16 %x, 3
  ret i16 %sdiv
}

define i8 @SDIV_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: SDIV_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sextb16 a0, a0
; CHECK-NEXT:    sextb16 a1, a1
; CHECK-NEXT:    divs32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SDIV_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset lr, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    sextb16 a2, a1
; GENERIC-NEXT:    sextb16 a1, a0
; GENERIC-NEXT:    lrw32 a3, [.LCPI41_0]
; GENERIC-NEXT:    mov16 a0, a2
; GENERIC-NEXT:    jsr16 a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
; GENERIC-NEXT:    .p2align 1
; GENERIC-NEXT:  # %bb.1:
; GENERIC-NEXT:    .p2align 2, 0x0
; GENERIC-NEXT:  .LCPI41_0:
; GENERIC-NEXT:    .long __divsi3
entry:
  %sdiv = sdiv  i8 %y, %x
  ret i8 %sdiv
}

define i8 @SDIV_CHAR_I(i8 %x) {
; CHECK-LABEL: SDIV_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sextb16 a1, a0
; CHECK-NEXT:    movi16 a2, 85
; CHECK-NEXT:    mult16 a1, a2
; CHECK-NEXT:    lsri16 a1, a1, 8
; CHECK-NEXT:    subu16 a0, a1, a0
; CHECK-NEXT:    andi32 a1, a0, 128
; CHECK-NEXT:    lsri16 a1, a1, 7
; CHECK-NEXT:    sextb16 a0, a0
; CHECK-NEXT:    asri16 a0, a0, 1
; CHECK-NEXT:    addu16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SDIV_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    sextb16 a1, a0
; GENERIC-NEXT:    movi16 a2, 85
; GENERIC-NEXT:    mult16 a2, a1
; GENERIC-NEXT:    lsri16 a1, a2, 8
; GENERIC-NEXT:    subu16 a0, a1, a0
; GENERIC-NEXT:    movi16 a1, 128
; GENERIC-NEXT:    and16 a1, a0
; GENERIC-NEXT:    lsri16 a1, a1, 7
; GENERIC-NEXT:    sextb16 a0, a0
; GENERIC-NEXT:    asri16 a0, a0, 1
; GENERIC-NEXT:    addu16 a0, a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %sdiv = sdiv  i8 %x, -3
  ret i8 %sdiv
}

define i32 @shlRR(i32 %x, i32 %y) {
; CHECK-LABEL: shlRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsl32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: shlRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsl16 a1, a0
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %shl = shl nsw i32 %y, %x
  ret i32 %shl
}

define i32 @shlRI(i32 %x) {
; CHECK-LABEL: shlRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsli16 a0, a0, 10
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: shlRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsli16 a0, a0, 10
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %shl = shl nsw i32 %x, 10
  ret i32 %shl
}


define i64 @SHL_LONG_I(i64 %x) {
; CHECK-LABEL: SHL_LONG_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsri16 a2, a0, 25
; CHECK-NEXT:    lsli16 a1, a1, 7
; CHECK-NEXT:    or16 a1, a2
; CHECK-NEXT:    lsli16 a0, a0, 7
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SHL_LONG_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsri16 a2, a0, 25
; GENERIC-NEXT:    lsli16 a1, a1, 7
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    lsli16 a0, a0, 7
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %shl = shl nsw i64 %x, 7
  ret i64 %shl
}

define i16 @SHL_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: SHL_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    zexth16 a0, a0
; CHECK-NEXT:    lsl32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SHL_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset l0, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    movi16 a2, 0
; GENERIC-NEXT:    lsli16 a3, a2, 24
; GENERIC-NEXT:    lsli16 a2, a2, 16
; GENERIC-NEXT:    or16 a2, a3
; GENERIC-NEXT:    movi16 a3, 255
; GENERIC-NEXT:    lsli16 l0, a3, 8
; GENERIC-NEXT:    or16 l0, a2
; GENERIC-NEXT:    or16 l0, a3
; GENERIC-NEXT:    and16 l0, a0
; GENERIC-NEXT:    lsl16 a1, l0
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %shl = shl nsw i16 %y, %x
  ret i16 %shl
}

define i16 @SHL_SHORT_I(i16 %x) {
; CHECK-LABEL: SHL_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsli16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SHL_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsli16 a0, a0, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %shl = shl nsw i16 %x, 1
  ret i16 %shl
}

define i8 @SHL_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: SHL_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    zextb16 a0, a0
; CHECK-NEXT:    lsl32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SHL_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a2, 255
; GENERIC-NEXT:    and16 a2, a0
; GENERIC-NEXT:    lsl16 a1, a2
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %shl = shl nsw i8 %y, %x
  ret i8 %shl
}

define i8 @SHL_CHAR_I(i8 %x) {
; CHECK-LABEL: SHL_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsli16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: SHL_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsli16 a0, a0, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %shl = shl nsw i8 %x, 1
  ret i8 %shl
}

define i32 @andRR(i32 %x, i32 %y) {
; CHECK-LABEL: andRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    and16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: andRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    and16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %and = and  i32 %y, %x
  ret i32 %and
}

define i32 @andRI(i32 %x) {
; CHECK-LABEL: andRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    andi32 a0, a0, 10
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: andRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 10
; GENERIC-NEXT:    and16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %and = and  i32 %x, 10
  ret i32 %and
}

define i32 @andRI_X(i32 %x) {
; CHECK-LABEL: andRI_X:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movi32 a1, 4097
; CHECK-NEXT:    and16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: andRI_X:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 16
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    and16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %and = and  i32 %x, 4097
  ret i32 %and
}

define i64 @AND_LONG(i64 %x, i64 %y) {
; CHECK-LABEL: AND_LONG:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    and16 a0, a2
; CHECK-NEXT:    and16 a1, a3
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: AND_LONG:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    and16 a0, a2
; GENERIC-NEXT:    and16 a1, a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %and = and  i64 %y, %x
  ret i64 %and
}

define i64 @AND_LONG_I(i64 %x) {
; CHECK-LABEL: AND_LONG_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    andi32 a0, a0, 1
; CHECK-NEXT:    movi16 a1, 0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: AND_LONG_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    and16 a0, a1
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %and = and  i64 %x, 1
  ret i64 %and
}

define i16 @AND_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: AND_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    and16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: AND_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    and16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %and = and  i16 %y, %x
  ret i16 %and
}

define i16 @AND_SHORT_I(i16 %x) {
; CHECK-LABEL: AND_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    andi32 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: AND_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    and16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %and = and  i16 %x, 1
  ret i16 %and
}

define i8 @AND_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: AND_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    and16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: AND_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    and16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %and = and  i8 %y, %x
  ret i8 %and
}

define i8 @AND_CHAR_I(i8 %x) {
; CHECK-LABEL: AND_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    andi32 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: AND_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    and16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %and = and  i8 %x, 1
  ret i8 %and
}

define i32 @ashrRR(i32 %x, i32 %y) {
; CHECK-LABEL: ashrRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    asr32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ashrRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    asr16 a1, a0
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %ashr = ashr  i32 %y, %x
  ret i32 %ashr
}

define i32 @ashrRI(i32 %x) {
; CHECK-LABEL: ashrRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    asri16 a0, a0, 10
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ashrRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    asri16 a0, a0, 10
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %ashr = ashr  i32 %x, 10
  ret i32 %ashr
}


define i64 @ASHR_LONG_I(i64 %x) {
; CHECK-LABEL: ASHR_LONG_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsli16 a2, a1, 25
; CHECK-NEXT:    lsri16 a0, a0, 7
; CHECK-NEXT:    or16 a0, a2
; CHECK-NEXT:    asri16 a1, a1, 7
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ASHR_LONG_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsli16 a2, a1, 25
; GENERIC-NEXT:    lsri16 a0, a0, 7
; GENERIC-NEXT:    or16 a0, a2
; GENERIC-NEXT:    asri16 a1, a1, 7
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %ashr = ashr  i64 %x, 7
  ret i64 %ashr
}

define i16 @ASHR_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: ASHR_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sexth16 a1, a1
; CHECK-NEXT:    zexth16 a0, a0
; CHECK-NEXT:    asr32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ASHR_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset l0, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    sexth16 a1, a1
; GENERIC-NEXT:    movi16 a2, 0
; GENERIC-NEXT:    lsli16 a3, a2, 24
; GENERIC-NEXT:    lsli16 a2, a2, 16
; GENERIC-NEXT:    or16 a2, a3
; GENERIC-NEXT:    movi16 a3, 255
; GENERIC-NEXT:    lsli16 l0, a3, 8
; GENERIC-NEXT:    or16 l0, a2
; GENERIC-NEXT:    or16 l0, a3
; GENERIC-NEXT:    and16 l0, a0
; GENERIC-NEXT:    asr16 a1, l0
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %ashr = ashr  i16 %y, %x
  ret i16 %ashr
}

define i16 @ASHR_SHORT_I(i16 %x) {
; CHECK-LABEL: ASHR_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sexth16 a0, a0
; CHECK-NEXT:    asri16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ASHR_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    sexth16 a0, a0
; GENERIC-NEXT:    asri16 a0, a0, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %ashr = ashr  i16 %x, 1
  ret i16 %ashr
}

define i8 @ASHR_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: ASHR_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sextb16 a1, a1
; CHECK-NEXT:    zextb16 a0, a0
; CHECK-NEXT:    asr32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ASHR_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    sextb16 a1, a1
; GENERIC-NEXT:    movi16 a2, 255
; GENERIC-NEXT:    and16 a2, a0
; GENERIC-NEXT:    asr16 a1, a2
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %ashr = ashr  i8 %y, %x
  ret i8 %ashr
}

define i8 @ASHR_CHAR_I(i8 %x) {
; CHECK-LABEL: ASHR_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    sextb16 a0, a0
; CHECK-NEXT:    asri16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: ASHR_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    sextb16 a0, a0
; GENERIC-NEXT:    asri16 a0, a0, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %ashr = ashr  i8 %x, 1
  ret i8 %ashr
}


define i32 @lshrRR(i32 %x, i32 %y) {
; CHECK-LABEL: lshrRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsr32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: lshrRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsr16 a1, a0
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %lshr = lshr  i32 %y, %x
  ret i32 %lshr
}

define i32 @lshrRI(i32 %x) {
; CHECK-LABEL: lshrRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsri16 a0, a0, 10
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: lshrRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsri16 a0, a0, 10
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %lshr = lshr  i32 %x, 10
  ret i32 %lshr
}

define i64 @LSHR_LONG_I(i64 %x) {
; CHECK-LABEL: LSHR_LONG_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lsli16 a2, a1, 25
; CHECK-NEXT:    lsri16 a0, a0, 7
; CHECK-NEXT:    or16 a0, a2
; CHECK-NEXT:    lsri16 a1, a1, 7
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: LSHR_LONG_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    lsli16 a2, a1, 25
; GENERIC-NEXT:    lsri16 a0, a0, 7
; GENERIC-NEXT:    or16 a0, a2
; GENERIC-NEXT:    lsri16 a1, a1, 7
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %lshr = lshr  i64 %x, 7
  ret i64 %lshr
}

define i16 @LSHR_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: LSHR_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    zexth16 a1, a1
; CHECK-NEXT:    zexth16 a0, a0
; CHECK-NEXT:    lsr32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: LSHR_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT:    .cfi_offset l0, -4
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 8
; GENERIC-NEXT:    movi16 a2, 0
; GENERIC-NEXT:    lsli16 a3, a2, 24
; GENERIC-NEXT:    lsli16 a2, a2, 16
; GENERIC-NEXT:    or16 a2, a3
; GENERIC-NEXT:    movi16 a3, 255
; GENERIC-NEXT:    lsli16 l0, a3, 8
; GENERIC-NEXT:    or16 l0, a2
; GENERIC-NEXT:    or16 l0, a3
; GENERIC-NEXT:    and16 a1, l0
; GENERIC-NEXT:    and16 l0, a0
; GENERIC-NEXT:    lsr16 a1, l0
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %lshr = lshr  i16 %y, %x
  ret i16 %lshr
}

define i16 @LSHR_SHORT_I(i16 %x) {
; CHECK-LABEL: LSHR_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movi32 a1, 65534
; CHECK-NEXT:    and16 a0, a1
; CHECK-NEXT:    lsri16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: LSHR_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 255
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    movi16 a1, 254
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    and16 a1, a0
; GENERIC-NEXT:    lsri16 a0, a1, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %lshr = lshr  i16 %x, 1
  ret i16 %lshr
}

define i8 @LSHR_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: LSHR_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    zextb16 a1, a1
; CHECK-NEXT:    zextb16 a0, a0
; CHECK-NEXT:    lsr32 a0, a1, a0
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: LSHR_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a2, 255
; GENERIC-NEXT:    and16 a1, a2
; GENERIC-NEXT:    and16 a0, a2
; GENERIC-NEXT:    lsr16 a1, a0
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %lshr = lshr  i8 %y, %x
  ret i8 %lshr
}

define i8 @LSHR_CHAR_I(i8 %x) {
; CHECK-LABEL: LSHR_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    andi32 a0, a0, 254
; CHECK-NEXT:    lsri16 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: LSHR_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 254
; GENERIC-NEXT:    and16 a1, a0
; GENERIC-NEXT:    lsri16 a0, a1, 1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %lshr = lshr  i8 %x, 1
  ret i8 %lshr
}

define i1 @LSHR_BIT(i1 %x, i1 %y) {
; CHECK-LABEL: LSHR_BIT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    mov16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: LSHR_BIT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    mov16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %lshr = lshr  i1 %y, %x
  ret i1 %lshr
}

define i1 @LSHR_BIT_I(i1 %x) {
; CHECK-LABEL: LSHR_BIT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: LSHR_BIT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %lshr = lshr  i1 %x, 1
  ret i1 %lshr
}

define i32 @orRR(i32 %x, i32 %y) {
; CHECK-LABEL: orRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    or16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: orRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    or16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %or = or  i32 %y, %x
  ret i32 %or
}

define i32 @orRI(i32 %x) {
; CHECK-LABEL: orRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori32 a0, a0, 10
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: orRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 10
; GENERIC-NEXT:    or16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %or = or  i32 %x, 10
  ret i32 %or
}

define i32 @orRI_X(i32 %x) {
; CHECK-LABEL: orRI_X:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori32 a0, a0, 4097
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: orRI_X:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 16
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    or16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %or = or  i32 %x, 4097
  ret i32 %or
}

define i64 @OR_LONG(i64 %x, i64 %y) {
; CHECK-LABEL: OR_LONG:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    or16 a0, a2
; CHECK-NEXT:    or16 a1, a3
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: OR_LONG:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    or16 a0, a2
; GENERIC-NEXT:    or16 a1, a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %or = or  i64 %y, %x
  ret i64 %or
}

define i64 @OR_LONG_I(i64 %x) {
; CHECK-LABEL: OR_LONG_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori32 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: OR_LONG_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a2, 1
; GENERIC-NEXT:    or16 a0, a2
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %or = or  i64 %x, 1
  ret i64 %or
}

define i16 @OR_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: OR_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    or16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: OR_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    or16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %or = or  i16 %y, %x
  ret i16 %or
}

define i16 @OR_SHORT_I(i16 %x) {
; CHECK-LABEL: OR_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori32 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: OR_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    or16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %or = or  i16 %x, 1
  ret i16 %or
}

define i8 @OR_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: OR_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    or16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: OR_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    or16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %or = or  i8 %y, %x
  ret i8 %or
}

define i8 @OR_CHAR_I(i8 %x) {
; CHECK-LABEL: OR_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori32 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: OR_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    or16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %or = or  i8 %x, 1
  ret i8 %or
}


define i32 @xorRR(i32 %x, i32 %y) {
; CHECK-LABEL: xorRR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xor16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: xorRR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    xor16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %xor = xor  i32 %y, %x
  ret i32 %xor
}

define i32 @xorRI(i32 %x) {
; CHECK-LABEL: xorRI:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xori32 a0, a0, 10
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: xorRI:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 10
; GENERIC-NEXT:    xor16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %xor = xor  i32 %x, 10
  ret i32 %xor
}

define i32 @xorRI_X(i32 %x) {
; CHECK-LABEL: xorRI_X:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movi32 a1, 4097
; CHECK-NEXT:    xor16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: xorRI_X:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 0
; GENERIC-NEXT:    lsli16 a2, a1, 24
; GENERIC-NEXT:    lsli16 a1, a1, 16
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    movi16 a2, 16
; GENERIC-NEXT:    lsli16 a2, a2, 8
; GENERIC-NEXT:    or16 a2, a1
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    or16 a1, a2
; GENERIC-NEXT:    xor16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %xor = xor  i32 %x, 4097
  ret i32 %xor
}

define i64 @XOR_LONG(i64 %x, i64 %y) {
; CHECK-LABEL: XOR_LONG:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xor16 a0, a2
; CHECK-NEXT:    xor16 a1, a3
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: XOR_LONG:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    xor16 a0, a2
; GENERIC-NEXT:    xor16 a1, a3
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %xor = xor  i64 %y, %x
  ret i64 %xor
}

define i64 @XOR_LONG_I(i64 %x) {
; CHECK-LABEL: XOR_LONG_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xori32 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: XOR_LONG_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a2, 1
; GENERIC-NEXT:    xor16 a0, a2
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %xor = xor  i64 %x, 1
  ret i64 %xor
}

define i16 @XOR_SHORT(i16 %x, i16 %y) {
; CHECK-LABEL: XOR_SHORT:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xor16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: XOR_SHORT:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    xor16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %xor = xor  i16 %y, %x
  ret i16 %xor
}

define i16 @XOR_SHORT_I(i16 %x) {
; CHECK-LABEL: XOR_SHORT_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xori32 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: XOR_SHORT_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    xor16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %xor = xor  i16 %x, 1
  ret i16 %xor
}

define i8 @XOR_CHAR(i8 %x, i8 %y) {
; CHECK-LABEL: XOR_CHAR:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xor16 a0, a1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: XOR_CHAR:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    xor16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %xor = xor  i8 %y, %x
  ret i8 %xor
}

define i8 @XOR_CHAR_I(i8 %x) {
; CHECK-LABEL: XOR_CHAR_I:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xori32 a0, a0, 1
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: XOR_CHAR_I:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    movi16 a1, 1
; GENERIC-NEXT:    xor16 a0, a1
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %xor = xor  i8 %x, 1
  ret i8 %xor
}

; i64 --> i32/i16/i8/i1
define i32 @truncR_i64_0(i64 %x) {
; CHECK-LABEL: truncR_i64_0:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i64_0:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i64 %x to i32
  ret i32 %trunc
}

define i16 @truncR_i64_1(i64 %x) {
; CHECK-LABEL: truncR_i64_1:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i64_1:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i64 %x to i16
  ret i16 %trunc
}

define i8 @truncR_i64_2(i64 %x) {
; CHECK-LABEL: truncR_i64_2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i64_2:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i64 %x to i8
  ret i8 %trunc
}

define i1 @truncR_i64_3(i64 %x) {
; CHECK-LABEL: truncR_i64_3:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i64_3:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i64 %x to i1
  ret i1 %trunc
}


; i32 --> i16/i8/i1
define i16 @truncR_i32_1(i32 %x) {
; CHECK-LABEL: truncR_i32_1:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i32_1:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i32 %x to i16
  ret i16 %trunc
}

define i8 @truncR_i32_2(i32 %x) {
; CHECK-LABEL: truncR_i32_2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i32_2:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i32 %x to i8
  ret i8 %trunc
}

define i1 @truncR_i32_3(i32 %x) {
; CHECK-LABEL: truncR_i32_3:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i32_3:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i32 %x to i1
  ret i1 %trunc
}

; i16 --> i8/i1
define i8 @truncR_i16_2(i16 %x) {
; CHECK-LABEL: truncR_i16_2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i16_2:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i16 %x to i8
  ret i8 %trunc
}

define i1 @truncR_i16_3(i16 %x) {
; CHECK-LABEL: truncR_i16_3:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i16_3:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i16 %x to i1
  ret i1 %trunc
}


;i8 --> i1
define i1 @truncR_i8_3(i8 %x) {
; CHECK-LABEL: truncR_i8_3:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    rts16
;
; GENERIC-LABEL: truncR_i8_3:
; GENERIC:       # %bb.0: # %entry
; GENERIC-NEXT:    .cfi_def_cfa_offset 0
; GENERIC-NEXT:    subi16 sp, sp, 4
; GENERIC-NEXT:    .cfi_def_cfa_offset 4
; GENERIC-NEXT:    addi16 sp, sp, 4
; GENERIC-NEXT:    rts16
entry:
  %trunc = trunc i8 %x to i1
  ret i1 %trunc
}