)]}'
{
  "commit": "fb9c9eb9d2d97cff5f19fbb0f9a7828afb4c4271",
  "tree": "1ae9e295a4e6a7d0145ea0ff3356ce4a564c1068",
  "parents": [
    "c0c56f419590bb4219f9f198c33cb6c7ee6555cf"
  ],
  "author": {
    "name": "Justin Lebar",
    "email": "justin.lebar@gmail.com",
    "time": "Sun May 24 09:22:52 2026 -0700"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Sun May 24 09:22:52 2026 -0700"
  },
  "message": "[X86][GISel] Fix carry-in for selectUAddSub. (#199261)\n\nWhen G_UADDE/G_USUBE was chained off a previous G_UADDE/G_UADDO/\nG_USUBE/G_USUBO, selectUAddSub re-materialized EFLAGS.CF from the\nprevious SETB byte using CMP r, 1. That computes (r - 1) and sets\nCF iff r \u003c 1 unsigned, i.e. CF \u003d (r \u003d\u003d 0) -- the inverse of the\ndesired carry. The following ADC/SBB then consumed the wrong CF and\nproduced an off-by-one upper word; e.g. `add i128 0xFF..FF, 1` under\n-global-isel returned hi\u003d0 lo\u003d0 instead of hi\u003d1 lo\u003d0.\n\nEmit NEG r instead: NEG sets CF iff its operand is non-zero, matching\nthe SETB byte. NEG is a two-address (tied) instruction, so emit it\ninto a fresh virtual register rather than redefining the carry-in\nvreg.\n\nC reproducer (compile on x86_64-linux-gnu and run):\n\n```\n  // clang -O2 -fglobal-isel repro.c -o repro \u0026\u0026 ./repro\n  #include \u003cstdio.h\u003e\n\n  __attribute__((noinline))\n  __int128 add128(__int128 a, __int128 b) { return a + b; }\n\n  int main(void) {\n      __int128 a \u003d (__int128)0xFFFFFFFFFFFFFFFFULL;\n      __int128 r \u003d add128(a, 1);\n      unsigned long long lo \u003d r, hi \u003d r \u003e\u003e 64;\n      printf(\"hi\u003d0x%llx lo\u003d0x%llx\\n\", hi, lo);\n      return (hi \u003d\u003d 1 \u0026\u0026 lo \u003d\u003d 0) ? 0 : 1;\n  }\n```\n\nWithout -fglobal-isel: prints \"hi\u003d0x1 lo\u003d0x0\", exits 0.\nWith    -fglobal-isel: prints \"hi\u003d0x0 lo\u003d0x0\", exits 1.\n\nThe buggy code-gen emits the inverted-carry sequence (clang trunk,\npre-fix):\n\n```\n  add128:\n      movq    %rdx, %rax\n      addq    %rdi, %rax\n      setb    %dl\n      cmpb    $1, %dl        # CF \u003d (dl \u003d\u003d 0), inverse of intended\n      adcq    %rsi, %rcx\n      movq    %rcx, %rdx\n      retq\n```\n\nThis bug was found by a large run of Opus 4.7 looking for bugs in\nLLVM.",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a77049fba133e8e3f17b2887496203624b4c060d",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp",
      "new_id": "3c94c33cdaaa64a66dbcad07beae1c2f3ec5170c",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp"
    },
    {
      "type": "modify",
      "old_id": "7cdfd519f04dcd729c3078c93bfcce226c9e0e83",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll",
      "new_id": "3a114222c0795f039f72e846c64548581cd44b82",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll"
    },
    {
      "type": "modify",
      "old_id": "b85180fb467eb7d09de08f03afe65f97056d45bd",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/X86/GlobalISel/select-add-x32.mir",
      "new_id": "c2a93fab79d0a6ae8a6f8af6a43f039feaa1d272",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/X86/GlobalISel/select-add-x32.mir"
    },
    {
      "type": "modify",
      "old_id": "825e7bb064519decfd4d7dba841af6c01435e423",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll",
      "new_id": "a791b53c2a76c1b4becf11bd90e5551b1de330ef",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll"
    }
  ]
}