MCFixup: Add isRelocation/isRelocRelocation helpers
Add two helper functions to simplify checks for relocation types,
replacing direct comparisons with FirstRelocationKind and
FirstLiteralRelocationKind. Note: Some targets haven't utilized
isRelocation yet.
Also, update RelaxFixupKind to use 0 as the sentinel value.
diff --git a/llvm/include/llvm/MC/MCAsmBackend.h b/llvm/include/llvm/MC/MCAsmBackend.h
index 10eabd4..61e3b2e 100644
--- a/llvm/include/llvm/MC/MCAsmBackend.h
+++ b/llvm/include/llvm/MC/MCAsmBackend.h
@@ -41,7 +41,7 @@
/// Generic interface to target specific assembler backends.
class MCAsmBackend {
protected: // Can only create subclasses.
- MCAsmBackend(llvm::endianness Endian, unsigned RelaxFixupKind = MaxFixupKind);
+ MCAsmBackend(llvm::endianness Endian, unsigned RelaxFixupKind = 0);
public:
MCAsmBackend(const MCAsmBackend &) = delete;
@@ -53,7 +53,7 @@
/// Fixup kind used for linker relaxation. Currently only used by RISC-V
/// and LoongArch.
const unsigned RelaxFixupKind;
- bool allowLinkerRelaxation() const { return RelaxFixupKind != MaxFixupKind; }
+ bool allowLinkerRelaxation() const { return RelaxFixupKind != 0; }
/// Return true if this target might automatically pad instructions and thus
/// need to emit padding enable/disable directives around sensative code.
diff --git a/llvm/include/llvm/MC/MCFixup.h b/llvm/include/llvm/MC/MCFixup.h
index 2f2717d..c23594d 100644
--- a/llvm/include/llvm/MC/MCFixup.h
+++ b/llvm/include/llvm/MC/MCFixup.h
@@ -122,6 +122,21 @@
SMLoc getLoc() const { return Loc; }
};
+namespace mc {
+// Check if the fixup kind is a relocation type. Return false if the fixup can
+// be resolved without a relocation.
+inline bool isRelocation(MCFixupKind FixupKind) {
+ return FixupKind >= FirstRelocationKind;
+}
+
+// Check if the fixup kind represents a relocation type from a .reloc directive.
+// In ELF, this skips STT_SECTION adjustment and STT_TLS symbol type setting for
+// TLS relocations.
+inline bool isRelocRelocation(MCFixupKind FixupKind) {
+ return FixupKind >= FirstLiteralRelocationKind;
+}
+} // namespace mc
+
} // End llvm namespace
#endif
diff --git a/llvm/lib/MC/ELFObjectWriter.cpp b/llvm/lib/MC/ELFObjectWriter.cpp
index 2ae9c21..5c39dae 100644
--- a/llvm/lib/MC/ELFObjectWriter.cpp
+++ b/llvm/lib/MC/ELFObjectWriter.cpp
@@ -1385,7 +1385,7 @@
auto EMachine = TargetObjectWriter->getEMachine();
unsigned Type;
- if (Fixup.getKind() >= FirstLiteralRelocationKind)
+ if (mc::isRelocRelocation(Fixup.getKind()))
Type = Fixup.getKind() - FirstLiteralRelocationKind;
else
Type = TargetObjectWriter->getRelocType(Ctx, Target, Fixup, IsPCRel);
@@ -1396,7 +1396,7 @@
UseSectionSym = useSectionSymbol(Asm, Target, SymA, C, Type);
// Disable STT_SECTION adjustment for .reloc directives.
- UseSectionSym &= Fixup.getKind() < FirstLiteralRelocationKind;
+ UseSectionSym &= !mc::isRelocRelocation(Fixup.getKind());
}
uint64_t Addend = UseSectionSym ? C + Asm.getSymbolOffset(*SymA) : C;
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index ff5f13c..b4beaaf 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -2403,7 +2403,7 @@
<< "offset: " << F.getOffset() << ", value: ";
F.getValue()->print(OS, MAI);
auto Kind = F.getKind();
- if (FirstRelocationKind <= Kind)
+ if (mc::isRelocation(Kind))
OS << ", relocation type: " << (Kind - FirstRelocationKind);
else
OS << ", kind: "
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index 9600ba5..8a042e7 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -69,7 +69,7 @@
// Fixup kinds from raw relocation types and .reloc directives force
// relocations and do not need these fields.
- if (Kind >= FirstRelocationKind)
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
index 248cd20..7873d35 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -135,7 +135,7 @@
MutableArrayRef<char> Data, uint64_t Value,
bool IsResolved,
const MCSubtargetInfo *STI) const {
- if (Fixup.getKind() >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Fixup.getKind()))
return;
Value = adjustFixupValue(Fixup, Value, &Asm.getContext());
@@ -179,7 +179,7 @@
{ "fixup_si_sopp_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
};
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 88bcf4c..5b1016e 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -193,7 +193,7 @@
// Fixup kinds from .reloc directive are like R_ARM_NONE. They do not require
// any extra processing.
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
@@ -1146,8 +1146,8 @@
MutableArrayRef<char> Data, uint64_t Value,
bool IsResolved,
const MCSubtargetInfo* STI) const {
- unsigned Kind = Fixup.getKind();
- if (Kind >= FirstLiteralRelocationKind)
+ auto Kind = Fixup.getKind();
+ if (mc::isRelocation(Kind))
return;
MCContext &Ctx = Asm.getContext();
Value = adjustFixupValue(Asm, Fixup, Target, Value, IsResolved, Ctx, STI);
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
index 9abe11b..6340e58 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
@@ -373,7 +373,7 @@
MutableArrayRef<char> Data, uint64_t Value,
bool IsResolved,
const MCSubtargetInfo *STI) const {
- if (Fixup.getKind() >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Fixup.getKind()))
return;
adjustFixupValue(Fixup, Target, Value, &Asm.getContext());
if (Value == 0)
@@ -475,7 +475,7 @@
// Fixup kinds from .reloc directive are like R_AVR_NONE. They do not require
// any extra processing.
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
index 792a555..9000d8d 100644
--- a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
+++ b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
@@ -201,7 +201,7 @@
bool IsResolved,
const MCSubtargetInfo *STI) const {
MCFixupKind Kind = Fixup.getKind();
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return;
MCContext &Ctx = Asm.getContext();
MCFixupKindInfo Info = getFixupKindInfo(Kind);
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index 0c29599..8bd2ad8 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -527,7 +527,7 @@
static_assert(std::size(BigEndianInfos) == Mips::NumTargetFixupKinds,
"Not all MIPS big endian fixup kinds added!");
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
return MCAsmBackend::getFixupKindInfo(Kind);
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
index 34a1424..61c2746 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
@@ -120,7 +120,7 @@
// Fixup kinds from .reloc directive are like R_PPC_NONE/R_PPC64_NONE. They
// do not require any extra processing.
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
@@ -138,7 +138,7 @@
uint64_t Value, bool IsResolved,
const MCSubtargetInfo *STI) const override {
MCFixupKind Kind = Fixup.getKind();
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return;
Value = adjustFixupValue(Kind, Value);
if (!Value) return; // Doesn't change encoding.
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index f9799a0..5ee39c3 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -94,9 +94,9 @@
static_assert((std::size(Infos)) == RISCV::NumTargetFixupKinds,
"Not all fixup kinds added to Infos array");
- // Fixup kinds from raw relocation types and .reloc directive are like
- // R_RISCV_NONE. They do not require any extra processing.
- if (Kind >= FirstRelocationKind)
+ // Fixup kinds from raw relocation types and .reloc directives force
+ // relocations and do not use these fields.
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
index 4b32130..427ea93 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
@@ -75,7 +75,7 @@
// Extract the relocation type from the fixup kind, after applying STT_TLS as
// needed.
- if (Kind >= FirstRelocationKind)
+ if (mc::isRelocation(Fixup.getKind()))
return Kind - FirstRelocationKind;
if (IsPCRel) {
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
index e689c53..d8d673b 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
@@ -255,7 +255,7 @@
// Fixup kinds from .reloc directive are like R_SPARC_NONE. They do
// not require any extra processing.
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
@@ -335,7 +335,7 @@
uint64_t Value, bool IsResolved,
const MCSubtargetInfo *STI) const override {
- if (Fixup.getKind() >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Fixup.getKind()))
return;
Value = adjustFixupValue(Fixup.getKind(), Value);
if (!Value) return; // Doesn't change encoding.
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
index 4f488d7..22ba533 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
@@ -142,7 +142,7 @@
SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
// Fixup kinds from .reloc directive are like R_390_NONE. They
// do not require any extra processing.
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
@@ -160,7 +160,7 @@
bool IsResolved,
const MCSubtargetInfo *STI) const {
MCFixupKind Kind = Fixup.getKind();
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return;
unsigned Offset = Fixup.getOffset();
unsigned BitSize = getFixupKindInfo(Kind).TargetSize;
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index cb23487..6e02c2e 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -639,7 +639,7 @@
// Fixup kinds from .reloc directive are like R_386_NONE/R_X86_64_NONE. They
// do not require any extra processing.
- if (Kind >= FirstLiteralRelocationKind)
+ if (mc::isRelocation(Kind))
return MCAsmBackend::getFixupKindInfo(FK_NONE);
if (Kind < FirstTargetFixupKind)
@@ -691,8 +691,8 @@
const MCValue &, MutableArrayRef<char> Data,
uint64_t Value, bool IsResolved,
const MCSubtargetInfo *STI) const {
- unsigned Kind = Fixup.getKind();
- if (Kind >= FirstLiteralRelocationKind)
+ auto Kind = Fixup.getKind();
+ if (mc::isRelocation(Kind))
return;
unsigned Size = getFixupKindSize(Kind);
