commit f57a1e973a5b7d84e4e42ad482130936519b99ef
author Jay Foad <jay.foad@amd.com> Fri Jun 06 15:40:37 2025 +0100
committer Jay Foad <jay.foad@amd.com> Fri Jun 06 15:42:37 2025 +0100
tree 6e74e24bb423f9410146f6d7ff11d1e8c969c176
parent 974ee967ad312f347d805558025a9fa727ac03f6

[TableGen] Fix variable name in CodeGenRegBank::computeComposites

llvm/utils/TableGen/Common/CodeGenRegisters.cpp

diff --git a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
index 0e46061..a23222a 100644
--- a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
@@ -1471,10 +1471,10 @@
     RegMap C;
     const RegMap &Img1 = SubRegAction.at(Sub1);
     const RegMap &Img2 = SubRegAction.at(Sub2);
-    for (auto [SRI, SubReg] : Img1) {
+    for (auto [R, SubReg] : Img1) {
       auto F = Img2.find(SubReg);
       if (F != Img2.end())
-        C.insert({SRI, F->second});
+        C.insert({R, F->second});
     }
     return C;
   };