tree ee20af3505cd4f354eba9df5a3ed47f9e2818c02
parent 31c9198ea0f9651b8d18548d4a4bff252680f804
author Craig Topper <craig.topper@sifive.com> 1756603638 -0700
committer GitHub <noreply@github.com> 1756603638 -0700
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[RISCV] Add computeKnownBitsForTargetNode for RISCVISD::SRAW. (#156191)

This node reads the lower 32 bits, shifts it right arithmetically
then sign extends to i64. If we know some of the lower 32 bits we
can propagate that information.
    
For the test case I had to find something that didn't get optimized
before type legalizaton and didn't get type legalized to a sign
extended value. The bswap gets type legalized to (lshr (bswap), 32).