)]}'
{
  "id": "68eeebb0c176009ddeadb76ba45fbd5c2eb3e7d1",
  "repo": "llvm-project",
  "revision": "f20e2829dfdd25bd2ea2cbef1617652878747cb5",
  "path": "llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir"
}