)]}'
{
  "commit": "f142f8afe21bceb00fb495468aa0b5043e98c419",
  "tree": "d71ba5c2f6b6aa1af4dc4395798ea274f373245e",
  "parents": [
    "c9b6339ad40cacb729cc714342d443e781fdfca3"
  ],
  "author": {
    "name": "Jay Foad",
    "email": "jay.foad@amd.com",
    "time": "Fri Aug 23 14:43:31 2024 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Fri Aug 23 14:43:31 2024 +0100"
  },
  "message": "[AMDGPU] Improve uniform argument handling in InstCombineIntrinsic (#105812)\n\nCommon up handling of intrinsics that are a no-op on uniform arguments.\r\nThis catches a couple of new cases:\r\n\r\nreadlane (readlane x, y), z -\u003e readlane x, y\r\n(for any z, does not have to equal y).\r\n\r\npermlane64 (readfirstlane x) -\u003e readfirstlane x\r\n(and likewise for any other uniform argument to permlane64).",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "9197404309663afc71b74ef377d00a75c73969b4",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp",
      "new_id": "4da3618357c420861d1b2a95779d930a3252a65d",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp"
    },
    {
      "type": "modify",
      "old_id": "9cb79b26448658307359eff23810404b24a21f0e",
      "old_mode": 33188,
      "old_path": "llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll",
      "new_id": "f3a3b8c1dc5d8aad2a38f18f479d50faefd1c1b6",
      "new_mode": 33188,
      "new_path": "llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll"
    }
  ]
}