commit | f024aab844ab89ab6455ddf1e2232a957c72328e | [log] [tgz] |
---|---|---|
author | Jim Lin <jim@andestech.com> | Mon Apr 21 11:02:04 2025 +0800 |
committer | Jim Lin <jim@andestech.com> | Mon Apr 21 11:02:04 2025 +0800 |
tree | 2b8e0040c1c45e62f8d64bee149189b7d29fbdfb | |
parent | 2ba20c52e43ae881dc54037fff94d7e2f217c99d [diff] |
[RISCV] Remove the TODO that lbu and lhu should be selected to avoid the unnecessary masking. NFC. RISCVTargetLowering::isZExtFree has been implemented in https://github.com/llvm/llvm-project/commit/15e894baeeb96612ae471fa83d1729a2d3388fc8.
diff --git a/llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll b/llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll index 771a72f..abd49d6 100644 --- a/llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll +++ b/llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll
@@ -2,8 +2,6 @@ ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ ; RUN: | FileCheck %s -check-prefix=RV32I -; TODO: lbu and lhu should be selected to avoid the unnecessary masking. - @bytes = dso_local global [5 x i8] zeroinitializer, align 1 define dso_local i32 @test_zext_i8() nounwind {