tree 8bde964aa4f3bdbf691107834836f3d7cd6a2781
parent d57ab276b659c960fda8c0bb349648c4d266796e
author Brox Chen <guochen2@amd.com> 1755187335 -0400
committer GitHub <noreply@github.com> 1755187335 -0400
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[AMDGPU][True16][CodeGen] insert proper register for 16bit data type in vop3p insts (#153143)

In true16 flow, we cannot simply replace v2f16 to its Lo16 when Lo == Hi
in a vop3p packed inst, since the register size is mismatched. This
trigger functional errors in the downstream branch and this is caused by
illegal `VGPR_32 = COPY VGPR_16` created by ISel and hit the rewrite
virtual reg and coalescer pass

Correctly insert reg_sequence/s_mov in true16 flow