[AArch64] Add patterns for scalar FMUL, FMULX Scalar FMUL, FMULX instructions perform better or the same compared to indexed FMUL, FMULX. For example, the Arm Cortex-A55 Software Optimization Guide lists the following instructions with a throughput of 2 IPC: - "FP multiply" FMUL - "ASIMD FP multiply" FMULX whereas it lists the following with a throughput of 1 IPC: - "ASIMD FP multiply, by element" FMUL, FMULX The Arm Cortex-A510 Software Optimization Guide, however, does not separately list "by element" variants of the "ASIMD FP multiply" instructions, which are listed with the same throughput as the non-ASIMD ones. Fixes #60817. Differential Revision: https://reviews.llvm.org/D153207
Welcome to the LLVM project!
This repository contains the source code for LLVM, a toolkit for the construction of highly optimized compilers, optimizers, and run-time environments.
The LLVM project has multiple components. The core of the project is itself called “LLVM”. This contains all of the tools, libraries, and header files needed to process intermediate representations and convert them into object files. Tools include an assembler, disassembler, bitcode analyzer, and bitcode optimizer.
C-like languages use the Clang frontend. This component compiles C, C++, Objective-C, and Objective-C++ code into LLVM bitcode -- and from there into object files, using LLVM.
Other components include: the libc++ C++ standard library, the LLD linker, and more.
Consult the Getting Started with LLVM page for information on building and running LLVM.
For information on how to contribute to the LLVM project, please take a look at the Contributing to LLVM guide.
Join the LLVM Discourse forums, Discord chat, or #llvm IRC channel on OFTC.
The LLVM project has adopted a code of conduct for participants to all modes of communication within the project.