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llvm / llvm-project / ea03bdee7081f25c652d581e274b10cb7c552357
commitea03bdee7081f25c652d581e274b10cb7c552357[log] [tgz]
authorZhuoran Yin <zhuoryin@amd.com>Fri Mar 21 08:42:04 2025 -0400
committerGitHub <noreply@github.com>Fri Mar 21 08:42:04 2025 -0400
tree2db8a13aa1be0e7cedf81645f29ada2f83e06d5e
parent09feaa9261448e72ce21394613e0a12f84c1b8d9 [diff]
[MLIR][AMDGPU] Adding Vector transfer_read to load rewrite pattern (#131803)

This PR adds the Vector transfer_read to load rewrite pattern. The
pattern creates a transfer read op lowering. A vector trasfer read op
will be lowered to a combination of `vector.load`, `arith.select` and
`vector.broadcast` if:
 - The transfer op is masked.
 - The memref is in buffer address space.
 - Other conditions introduced from `TransferReadToVectorLoadLowering`

The motivation of this PR is due to the lack of support of masked load
from amdgpu backend. `llvm.intr.masked.load` lower to a series of
conditional scalar loads refer to (`scalarize-masked-mem-intrin` pass).
This PR will make it possible for masked transfer_read to be lowered
towards buffer load with bounds check, allowing a more optimized global
load accessing pattern compared with existing implementation of
`llvm.intr.masked.load` on vectors.
5 files changed
tree: 2db8a13aa1be0e7cedf81645f29ada2f83e06d5e
  1. .ci/
  2. .github/
  3. bolt/
  4. clang/
  5. clang-tools-extra/
  6. cmake/
  7. compiler-rt/
  8. cross-project-tests/
  9. flang/
  10. flang-rt/
  11. libc/
  12. libclc/
  13. libcxx/
  14. libcxxabi/
  15. libunwind/
  16. lld/
  17. lldb/
  18. llvm/
  19. llvm-libgcc/
  20. mlir/
  21. offload/
  22. openmp/
  23. polly/
  24. pstl/
  25. runtimes/
  26. third-party/
  27. utils/
  28. .clang-format
  29. .clang-tidy
  30. .git-blame-ignore-revs
  31. .gitattributes
  32. .gitignore
  33. .mailmap
  34. CODE_OF_CONDUCT.md
  35. CONTRIBUTING.md
  36. LICENSE.TXT
  37. pyproject.toml
  38. README.md
  39. SECURITY.md
README.md

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