)]}'
{
  "commit": "e34412476cf11eefd141db578770e738843e04a9",
  "tree": "261b3dbd93d3a00d128769e068096947fac9f924",
  "parents": [
    "68c10f601b596385d2c8dd73c7b542be3b87a244"
  ],
  "author": {
    "name": "Luke Lau",
    "email": "luke@igalia.com",
    "time": "Mon Apr 13 17:41:37 2026 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon Apr 13 16:41:37 2026 +0000"
  },
  "message": "[RISCV] Remove codegen for vp_bitreverse, vp_bswap (#191643)\n\nPart of the work to remove trivial VP intrinsics from the RISC-V\nbackend, see\nhttps://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999\n\nThis splits off 2 intrinsics from #179622.",
  "tree_diff": [
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