tree 6fdd59079c01d0deed8afc357bcdf3954d1b74ab
parent 7772a45b1a25896853ad67ee9c58844e3d4d6ef4
author Craig Topper <craig.topper@sifive.com> 1771461760 -0800
committer GitHub <noreply@github.com> 1771461760 -0800
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[RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (#182124)

We need to be able to address emergency spill slots without requiring a
register scavenging. This requires the emergency spill slot to be near
the SP or the FP to keep the offset small enough. If there is a large
reserved call frame, we can't keep the emergency spill slot near SP. But
we might not have a frame pointer.

This patch forces the use of a frame pointer when the max reserved call
frame is large so we can keep the emergency spill slot near it. This
idea is borrowed from AArch64.

Multiple MIR tests had to be updated to set the max call frame size as
the reserved registers are frozen before mirFileLoaded is called. I
copied mirFileLoaded from AArch64, but it appears the register freezing
moved after the AArch64 code was written.

Fixes #180199.