; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=4 -S %s | FileCheck %s --check-prefix=IC4
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=8 -S %s | FileCheck %s --check-prefix=IC8

; A clamped (i % 2^N) load guarded by an if-condition is widened into a
; predicated (masked) consecutive load over a single clamp window.
; TODO: This is the desired codegen. Currently the load is fully scalarized
; into per-lane pred.load.if blocks with urem-indexed GEPs (a gather); no
; llvm.masked.load or wide consecutive load is emitted.
define i32 @clamped_load_predicated(ptr %A, i32 %n) {
; CHECK-LABEL: define i32 @clamped_load_predicated(
; CHECK-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[N]], -1
; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt i32 [[TMP2]], 127
; CHECK-NEXT:    br i1 [[TMP3]], label %[[SCALAR_PH]], label %[[VECTOR_PH1:.*]]
; CHECK:       [[VECTOR_PH1]]:
; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 4
; CHECK-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6:.*]] ]
; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH1]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6]] ]
; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP4:%.*]], %[[PRED_LOAD_CONTINUE6]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = and <4 x i32> [[VEC_IND]], splat (i32 1)
; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <4 x i32> [[TMP0]], zeroinitializer
; CHECK-NEXT:    [[TMP28:%.*]] = urem <4 x i32> [[VEC_IND]], splat (i32 128)
; CHECK-NEXT:    [[TMP29:%.*]] = extractelement <4 x i1> [[TMP1]], i64 0
; CHECK-NEXT:    br i1 [[TMP29]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
; CHECK:       [[PRED_LOAD_IF]]:
; CHECK-NEXT:    [[TMP30:%.*]] = extractelement <4 x i32> [[TMP28]], i64 0
; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP30]]
; CHECK-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
; CHECK-NEXT:    [[TMP9:%.*]] = insertelement <4 x i32> poison, i32 [[TMP8]], i64 0
; CHECK-NEXT:    br label %[[PRED_LOAD_CONTINUE]]
; CHECK:       [[PRED_LOAD_CONTINUE]]:
; CHECK-NEXT:    [[TMP10:%.*]] = phi <4 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP9]], %[[PRED_LOAD_IF]] ]
; CHECK-NEXT:    [[TMP11:%.*]] = extractelement <4 x i1> [[TMP1]], i64 1
; CHECK-NEXT:    br i1 [[TMP11]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2:.*]]
; CHECK:       [[PRED_LOAD_IF1]]:
; CHECK-NEXT:    [[TMP12:%.*]] = extractelement <4 x i32> [[TMP28]], i64 1
; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP12]]
; CHECK-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
; CHECK-NEXT:    [[TMP15:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP14]], i64 1
; CHECK-NEXT:    br label %[[PRED_LOAD_CONTINUE2]]
; CHECK:       [[PRED_LOAD_CONTINUE2]]:
; CHECK-NEXT:    [[TMP16:%.*]] = phi <4 x i32> [ [[TMP10]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP15]], %[[PRED_LOAD_IF1]] ]
; CHECK-NEXT:    [[TMP17:%.*]] = extractelement <4 x i1> [[TMP1]], i64 2
; CHECK-NEXT:    br i1 [[TMP17]], label %[[PRED_LOAD_IF3:.*]], label %[[PRED_LOAD_CONTINUE4:.*]]
; CHECK:       [[PRED_LOAD_IF3]]:
; CHECK-NEXT:    [[TMP18:%.*]] = extractelement <4 x i32> [[TMP28]], i64 2
; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP18]]
; CHECK-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
; CHECK-NEXT:    [[TMP21:%.*]] = insertelement <4 x i32> [[TMP16]], i32 [[TMP20]], i64 2
; CHECK-NEXT:    br label %[[PRED_LOAD_CONTINUE4]]
; CHECK:       [[PRED_LOAD_CONTINUE4]]:
; CHECK-NEXT:    [[TMP22:%.*]] = phi <4 x i32> [ [[TMP16]], %[[PRED_LOAD_CONTINUE2]] ], [ [[TMP21]], %[[PRED_LOAD_IF3]] ]
; CHECK-NEXT:    [[TMP23:%.*]] = extractelement <4 x i1> [[TMP1]], i64 3
; CHECK-NEXT:    br i1 [[TMP23]], label %[[PRED_LOAD_IF5:.*]], label %[[PRED_LOAD_CONTINUE6]]
; CHECK:       [[PRED_LOAD_IF5]]:
; CHECK-NEXT:    [[TMP24:%.*]] = extractelement <4 x i32> [[TMP28]], i64 3
; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP24]]
; CHECK-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
; CHECK-NEXT:    [[TMP27:%.*]] = insertelement <4 x i32> [[TMP22]], i32 [[TMP26]], i64 3
; CHECK-NEXT:    br label %[[PRED_LOAD_CONTINUE6]]
; CHECK:       [[PRED_LOAD_CONTINUE6]]:
; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = phi <4 x i32> [ [[TMP22]], %[[PRED_LOAD_CONTINUE4]] ], [ [[TMP27]], %[[PRED_LOAD_IF5]] ]
; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer
; CHECK-NEXT:    [[TMP4]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; CHECK-NEXT:    br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP4]])
; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; CHECK-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; CHECK:       [[SCALAR_PH]]:
; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; CHECK-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP6]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; CHECK-NEXT:    br label %[[LOOP:.*]]
; CHECK:       [[LOOP]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ]
; CHECK-NEXT:    [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SUM_NEXT:%.*]], %[[LATCH]] ]
; CHECK-NEXT:    [[AND_IV:%.*]] = and i32 [[IV]], 1
; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[AND_IV]], 0
; CHECK-NEXT:    br i1 [[C]], label %[[THEN:.*]], label %[[LATCH]]
; CHECK:       [[THEN]]:
; CHECK-NEXT:    [[CLAMPED:%.*]] = urem i32 [[IV]], 128
; CHECK-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED]]
; CHECK-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; CHECK-NEXT:    br label %[[LATCH]]
; CHECK:       [[LATCH]]:
; CHECK-NEXT:    [[V:%.*]] = phi i32 [ [[LV]], %[[THEN]] ], [ 0, %[[LOOP]] ]
; CHECK-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[V]]
; CHECK-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT:    [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; CHECK-NEXT:    br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LATCH]] ], [ [[TMP6]], %[[MIDDLE_BLOCK]] ]
; CHECK-NEXT:    ret i32 [[SUM_NEXT_LCSSA]]
;
; IC4-LABEL: define i32 @clamped_load_predicated(
; IC4-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; IC4-NEXT:  [[ENTRY:.*]]:
; IC4-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 16
; IC4-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; IC4:       [[VECTOR_PH]]:
; IC4-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -1
; IC4-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 127
; IC4-NEXT:    br i1 [[TMP1]], label %[[SCALAR_PH]], label %[[VECTOR_PH1:.*]]
; IC4:       [[VECTOR_PH1]]:
; IC4-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 16
; IC4-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; IC4-NEXT:    br label %[[VECTOR_BODY:.*]]
; IC4:       [[VECTOR_BODY]]:
; IC4-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE33:.*]] ]
; IC4-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH1]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP19:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP23:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[TMP20:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP21:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP25:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[STEP_ADD:%.*]] = add nuw <4 x i32> [[VEC_IND]], splat (i32 4)
; IC4-NEXT:    [[STEP_ADD_2:%.*]] = add nuw <4 x i32> [[STEP_ADD]], splat (i32 4)
; IC4-NEXT:    [[STEP_ADD_3:%.*]] = add nuw <4 x i32> [[STEP_ADD_2]], splat (i32 4)
; IC4-NEXT:    [[TMP3:%.*]] = and <4 x i32> [[VEC_IND]], splat (i32 1)
; IC4-NEXT:    [[TMP4:%.*]] = and <4 x i32> [[STEP_ADD]], splat (i32 1)
; IC4-NEXT:    [[TMP5:%.*]] = and <4 x i32> [[STEP_ADD_2]], splat (i32 1)
; IC4-NEXT:    [[TMP6:%.*]] = and <4 x i32> [[STEP_ADD_3]], splat (i32 1)
; IC4-NEXT:    [[TMP7:%.*]] = icmp eq <4 x i32> [[TMP3]], zeroinitializer
; IC4-NEXT:    [[TMP8:%.*]] = icmp eq <4 x i32> [[TMP4]], zeroinitializer
; IC4-NEXT:    [[TMP9:%.*]] = icmp eq <4 x i32> [[TMP5]], zeroinitializer
; IC4-NEXT:    [[TMP10:%.*]] = icmp eq <4 x i32> [[TMP6]], zeroinitializer
; IC4-NEXT:    [[TMP37:%.*]] = urem <4 x i32> [[VEC_IND]], splat (i32 128)
; IC4-NEXT:    [[TMP11:%.*]] = urem <4 x i32> [[STEP_ADD]], splat (i32 128)
; IC4-NEXT:    [[TMP12:%.*]] = urem <4 x i32> [[STEP_ADD_2]], splat (i32 128)
; IC4-NEXT:    [[TMP13:%.*]] = urem <4 x i32> [[STEP_ADD_3]], splat (i32 128)
; IC4-NEXT:    [[TMP14:%.*]] = extractelement <4 x i1> [[TMP7]], i64 0
; IC4-NEXT:    br i1 [[TMP14]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
; IC4:       [[PRED_LOAD_IF]]:
; IC4-NEXT:    [[TMP15:%.*]] = extractelement <4 x i32> [[TMP37]], i64 0
; IC4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP15]]
; IC4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
; IC4-NEXT:    [[TMP18:%.*]] = insertelement <4 x i32> poison, i32 [[TMP17]], i64 0
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE]]
; IC4:       [[PRED_LOAD_CONTINUE]]:
; IC4-NEXT:    [[TMP61:%.*]] = phi <4 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP18]], %[[PRED_LOAD_IF]] ]
; IC4-NEXT:    [[TMP85:%.*]] = extractelement <4 x i1> [[TMP7]], i64 1
; IC4-NEXT:    br i1 [[TMP85]], label %[[PRED_LOAD_IF4:.*]], label %[[PRED_LOAD_CONTINUE5:.*]]
; IC4:       [[PRED_LOAD_IF4]]:
; IC4-NEXT:    [[TMP109:%.*]] = extractelement <4 x i32> [[TMP37]], i64 1
; IC4-NEXT:    [[TMP110:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP109]]
; IC4-NEXT:    [[TMP111:%.*]] = load i32, ptr [[TMP110]], align 4
; IC4-NEXT:    [[TMP112:%.*]] = insertelement <4 x i32> [[TMP61]], i32 [[TMP111]], i64 1
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE5]]
; IC4:       [[PRED_LOAD_CONTINUE5]]:
; IC4-NEXT:    [[TMP113:%.*]] = phi <4 x i32> [ [[TMP61]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP112]], %[[PRED_LOAD_IF4]] ]
; IC4-NEXT:    [[TMP26:%.*]] = extractelement <4 x i1> [[TMP7]], i64 2
; IC4-NEXT:    br i1 [[TMP26]], label %[[PRED_LOAD_IF6:.*]], label %[[PRED_LOAD_CONTINUE7:.*]]
; IC4:       [[PRED_LOAD_IF6]]:
; IC4-NEXT:    [[TMP27:%.*]] = extractelement <4 x i32> [[TMP37]], i64 2
; IC4-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP27]]
; IC4-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
; IC4-NEXT:    [[TMP30:%.*]] = insertelement <4 x i32> [[TMP113]], i32 [[TMP29]], i64 2
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE7]]
; IC4:       [[PRED_LOAD_CONTINUE7]]:
; IC4-NEXT:    [[TMP31:%.*]] = phi <4 x i32> [ [[TMP113]], %[[PRED_LOAD_CONTINUE5]] ], [ [[TMP30]], %[[PRED_LOAD_IF6]] ]
; IC4-NEXT:    [[TMP32:%.*]] = extractelement <4 x i1> [[TMP7]], i64 3
; IC4-NEXT:    br i1 [[TMP32]], label %[[PRED_LOAD_IF8:.*]], label %[[PRED_LOAD_CONTINUE9:.*]]
; IC4:       [[PRED_LOAD_IF8]]:
; IC4-NEXT:    [[TMP33:%.*]] = extractelement <4 x i32> [[TMP37]], i64 3
; IC4-NEXT:    [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP33]]
; IC4-NEXT:    [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4
; IC4-NEXT:    [[TMP36:%.*]] = insertelement <4 x i32> [[TMP31]], i32 [[TMP35]], i64 3
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE9]]
; IC4:       [[PRED_LOAD_CONTINUE9]]:
; IC4-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = phi <4 x i32> [ [[TMP31]], %[[PRED_LOAD_CONTINUE7]] ], [ [[TMP36]], %[[PRED_LOAD_IF8]] ]
; IC4-NEXT:    [[TMP38:%.*]] = extractelement <4 x i1> [[TMP8]], i64 0
; IC4-NEXT:    br i1 [[TMP38]], label %[[PRED_LOAD_IF10:.*]], label %[[PRED_LOAD_CONTINUE11:.*]]
; IC4:       [[PRED_LOAD_IF10]]:
; IC4-NEXT:    [[TMP39:%.*]] = extractelement <4 x i32> [[TMP11]], i64 0
; IC4-NEXT:    [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP39]]
; IC4-NEXT:    [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4
; IC4-NEXT:    [[TMP42:%.*]] = insertelement <4 x i32> poison, i32 [[TMP41]], i64 0
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE11]]
; IC4:       [[PRED_LOAD_CONTINUE11]]:
; IC4-NEXT:    [[TMP43:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE9]] ], [ [[TMP42]], %[[PRED_LOAD_IF10]] ]
; IC4-NEXT:    [[TMP44:%.*]] = extractelement <4 x i1> [[TMP8]], i64 1
; IC4-NEXT:    br i1 [[TMP44]], label %[[PRED_LOAD_IF12:.*]], label %[[PRED_LOAD_CONTINUE13:.*]]
; IC4:       [[PRED_LOAD_IF12]]:
; IC4-NEXT:    [[TMP45:%.*]] = extractelement <4 x i32> [[TMP11]], i64 1
; IC4-NEXT:    [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP45]]
; IC4-NEXT:    [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4
; IC4-NEXT:    [[TMP48:%.*]] = insertelement <4 x i32> [[TMP43]], i32 [[TMP47]], i64 1
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE13]]
; IC4:       [[PRED_LOAD_CONTINUE13]]:
; IC4-NEXT:    [[TMP49:%.*]] = phi <4 x i32> [ [[TMP43]], %[[PRED_LOAD_CONTINUE11]] ], [ [[TMP48]], %[[PRED_LOAD_IF12]] ]
; IC4-NEXT:    [[TMP50:%.*]] = extractelement <4 x i1> [[TMP8]], i64 2
; IC4-NEXT:    br i1 [[TMP50]], label %[[PRED_LOAD_IF14:.*]], label %[[PRED_LOAD_CONTINUE15:.*]]
; IC4:       [[PRED_LOAD_IF14]]:
; IC4-NEXT:    [[TMP51:%.*]] = extractelement <4 x i32> [[TMP11]], i64 2
; IC4-NEXT:    [[TMP52:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP51]]
; IC4-NEXT:    [[TMP53:%.*]] = load i32, ptr [[TMP52]], align 4
; IC4-NEXT:    [[TMP54:%.*]] = insertelement <4 x i32> [[TMP49]], i32 [[TMP53]], i64 2
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE15]]
; IC4:       [[PRED_LOAD_CONTINUE15]]:
; IC4-NEXT:    [[TMP55:%.*]] = phi <4 x i32> [ [[TMP49]], %[[PRED_LOAD_CONTINUE13]] ], [ [[TMP54]], %[[PRED_LOAD_IF14]] ]
; IC4-NEXT:    [[TMP56:%.*]] = extractelement <4 x i1> [[TMP8]], i64 3
; IC4-NEXT:    br i1 [[TMP56]], label %[[PRED_LOAD_IF16:.*]], label %[[PRED_LOAD_CONTINUE17:.*]]
; IC4:       [[PRED_LOAD_IF16]]:
; IC4-NEXT:    [[TMP57:%.*]] = extractelement <4 x i32> [[TMP11]], i64 3
; IC4-NEXT:    [[TMP58:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP57]]
; IC4-NEXT:    [[TMP59:%.*]] = load i32, ptr [[TMP58]], align 4
; IC4-NEXT:    [[TMP60:%.*]] = insertelement <4 x i32> [[TMP55]], i32 [[TMP59]], i64 3
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE17]]
; IC4:       [[PRED_LOAD_CONTINUE17]]:
; IC4-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = phi <4 x i32> [ [[TMP55]], %[[PRED_LOAD_CONTINUE15]] ], [ [[TMP60]], %[[PRED_LOAD_IF16]] ]
; IC4-NEXT:    [[TMP62:%.*]] = extractelement <4 x i1> [[TMP9]], i64 0
; IC4-NEXT:    br i1 [[TMP62]], label %[[PRED_LOAD_IF18:.*]], label %[[PRED_LOAD_CONTINUE19:.*]]
; IC4:       [[PRED_LOAD_IF18]]:
; IC4-NEXT:    [[TMP63:%.*]] = extractelement <4 x i32> [[TMP12]], i64 0
; IC4-NEXT:    [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP63]]
; IC4-NEXT:    [[TMP65:%.*]] = load i32, ptr [[TMP64]], align 4
; IC4-NEXT:    [[TMP66:%.*]] = insertelement <4 x i32> poison, i32 [[TMP65]], i64 0
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE19]]
; IC4:       [[PRED_LOAD_CONTINUE19]]:
; IC4-NEXT:    [[TMP67:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE17]] ], [ [[TMP66]], %[[PRED_LOAD_IF18]] ]
; IC4-NEXT:    [[TMP68:%.*]] = extractelement <4 x i1> [[TMP9]], i64 1
; IC4-NEXT:    br i1 [[TMP68]], label %[[PRED_LOAD_IF20:.*]], label %[[PRED_LOAD_CONTINUE21:.*]]
; IC4:       [[PRED_LOAD_IF20]]:
; IC4-NEXT:    [[TMP69:%.*]] = extractelement <4 x i32> [[TMP12]], i64 1
; IC4-NEXT:    [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP69]]
; IC4-NEXT:    [[TMP71:%.*]] = load i32, ptr [[TMP70]], align 4
; IC4-NEXT:    [[TMP72:%.*]] = insertelement <4 x i32> [[TMP67]], i32 [[TMP71]], i64 1
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE21]]
; IC4:       [[PRED_LOAD_CONTINUE21]]:
; IC4-NEXT:    [[TMP73:%.*]] = phi <4 x i32> [ [[TMP67]], %[[PRED_LOAD_CONTINUE19]] ], [ [[TMP72]], %[[PRED_LOAD_IF20]] ]
; IC4-NEXT:    [[TMP74:%.*]] = extractelement <4 x i1> [[TMP9]], i64 2
; IC4-NEXT:    br i1 [[TMP74]], label %[[PRED_LOAD_IF22:.*]], label %[[PRED_LOAD_CONTINUE23:.*]]
; IC4:       [[PRED_LOAD_IF22]]:
; IC4-NEXT:    [[TMP75:%.*]] = extractelement <4 x i32> [[TMP12]], i64 2
; IC4-NEXT:    [[TMP76:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP75]]
; IC4-NEXT:    [[TMP77:%.*]] = load i32, ptr [[TMP76]], align 4
; IC4-NEXT:    [[TMP78:%.*]] = insertelement <4 x i32> [[TMP73]], i32 [[TMP77]], i64 2
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE23]]
; IC4:       [[PRED_LOAD_CONTINUE23]]:
; IC4-NEXT:    [[TMP79:%.*]] = phi <4 x i32> [ [[TMP73]], %[[PRED_LOAD_CONTINUE21]] ], [ [[TMP78]], %[[PRED_LOAD_IF22]] ]
; IC4-NEXT:    [[TMP80:%.*]] = extractelement <4 x i1> [[TMP9]], i64 3
; IC4-NEXT:    br i1 [[TMP80]], label %[[PRED_LOAD_IF24:.*]], label %[[PRED_LOAD_CONTINUE25:.*]]
; IC4:       [[PRED_LOAD_IF24]]:
; IC4-NEXT:    [[TMP81:%.*]] = extractelement <4 x i32> [[TMP12]], i64 3
; IC4-NEXT:    [[TMP82:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP81]]
; IC4-NEXT:    [[TMP83:%.*]] = load i32, ptr [[TMP82]], align 4
; IC4-NEXT:    [[TMP84:%.*]] = insertelement <4 x i32> [[TMP79]], i32 [[TMP83]], i64 3
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE25]]
; IC4:       [[PRED_LOAD_CONTINUE25]]:
; IC4-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = phi <4 x i32> [ [[TMP79]], %[[PRED_LOAD_CONTINUE23]] ], [ [[TMP84]], %[[PRED_LOAD_IF24]] ]
; IC4-NEXT:    [[TMP86:%.*]] = extractelement <4 x i1> [[TMP10]], i64 0
; IC4-NEXT:    br i1 [[TMP86]], label %[[PRED_LOAD_IF26:.*]], label %[[PRED_LOAD_CONTINUE27:.*]]
; IC4:       [[PRED_LOAD_IF26]]:
; IC4-NEXT:    [[TMP87:%.*]] = extractelement <4 x i32> [[TMP13]], i64 0
; IC4-NEXT:    [[TMP88:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP87]]
; IC4-NEXT:    [[TMP89:%.*]] = load i32, ptr [[TMP88]], align 4
; IC4-NEXT:    [[TMP90:%.*]] = insertelement <4 x i32> poison, i32 [[TMP89]], i64 0
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE27]]
; IC4:       [[PRED_LOAD_CONTINUE27]]:
; IC4-NEXT:    [[TMP91:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE25]] ], [ [[TMP90]], %[[PRED_LOAD_IF26]] ]
; IC4-NEXT:    [[TMP92:%.*]] = extractelement <4 x i1> [[TMP10]], i64 1
; IC4-NEXT:    br i1 [[TMP92]], label %[[PRED_LOAD_IF28:.*]], label %[[PRED_LOAD_CONTINUE29:.*]]
; IC4:       [[PRED_LOAD_IF28]]:
; IC4-NEXT:    [[TMP93:%.*]] = extractelement <4 x i32> [[TMP13]], i64 1
; IC4-NEXT:    [[TMP94:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP93]]
; IC4-NEXT:    [[TMP95:%.*]] = load i32, ptr [[TMP94]], align 4
; IC4-NEXT:    [[TMP96:%.*]] = insertelement <4 x i32> [[TMP91]], i32 [[TMP95]], i64 1
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE29]]
; IC4:       [[PRED_LOAD_CONTINUE29]]:
; IC4-NEXT:    [[TMP97:%.*]] = phi <4 x i32> [ [[TMP91]], %[[PRED_LOAD_CONTINUE27]] ], [ [[TMP96]], %[[PRED_LOAD_IF28]] ]
; IC4-NEXT:    [[TMP98:%.*]] = extractelement <4 x i1> [[TMP10]], i64 2
; IC4-NEXT:    br i1 [[TMP98]], label %[[PRED_LOAD_IF30:.*]], label %[[PRED_LOAD_CONTINUE31:.*]]
; IC4:       [[PRED_LOAD_IF30]]:
; IC4-NEXT:    [[TMP99:%.*]] = extractelement <4 x i32> [[TMP13]], i64 2
; IC4-NEXT:    [[TMP100:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP99]]
; IC4-NEXT:    [[TMP101:%.*]] = load i32, ptr [[TMP100]], align 4
; IC4-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> [[TMP97]], i32 [[TMP101]], i64 2
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE31]]
; IC4:       [[PRED_LOAD_CONTINUE31]]:
; IC4-NEXT:    [[TMP103:%.*]] = phi <4 x i32> [ [[TMP97]], %[[PRED_LOAD_CONTINUE29]] ], [ [[TMP102]], %[[PRED_LOAD_IF30]] ]
; IC4-NEXT:    [[TMP104:%.*]] = extractelement <4 x i1> [[TMP10]], i64 3
; IC4-NEXT:    br i1 [[TMP104]], label %[[PRED_LOAD_IF32:.*]], label %[[PRED_LOAD_CONTINUE33]]
; IC4:       [[PRED_LOAD_IF32]]:
; IC4-NEXT:    [[TMP105:%.*]] = extractelement <4 x i32> [[TMP13]], i64 3
; IC4-NEXT:    [[TMP106:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP105]]
; IC4-NEXT:    [[TMP107:%.*]] = load i32, ptr [[TMP106]], align 4
; IC4-NEXT:    [[TMP108:%.*]] = insertelement <4 x i32> [[TMP103]], i32 [[TMP107]], i64 3
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE33]]
; IC4:       [[PRED_LOAD_CONTINUE33]]:
; IC4-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = phi <4 x i32> [ [[TMP103]], %[[PRED_LOAD_CONTINUE31]] ], [ [[TMP108]], %[[PRED_LOAD_IF32]] ]
; IC4-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP7]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer
; IC4-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP8]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer
; IC4-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP9]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer
; IC4-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP10]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer
; IC4-NEXT:    [[TMP19]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]
; IC4-NEXT:    [[TMP23]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]
; IC4-NEXT:    [[TMP21]] = add <4 x i32> [[TMP20]], [[PREDPHI8]]
; IC4-NEXT:    [[TMP25]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]
; IC4-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 16
; IC4-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[STEP_ADD_3]], splat (i32 4)
; IC4-NEXT:    [[TMP22:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; IC4-NEXT:    br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; IC4:       [[MIDDLE_BLOCK]]:
; IC4-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP23]], [[TMP19]]
; IC4-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP21]], [[BIN_RDX]]
; IC4-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP25]], [[BIN_RDX10]]
; IC4-NEXT:    [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])
; IC4-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; IC4-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; IC4:       [[SCALAR_PH]]:
; IC4-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; IC4-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP24]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; IC4-NEXT:    br label %[[LOOP:.*]]
; IC4:       [[LOOP]]:
; IC4-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ]
; IC4-NEXT:    [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SUM_NEXT:%.*]], %[[LATCH]] ]
; IC4-NEXT:    [[AND_IV:%.*]] = and i32 [[IV]], 1
; IC4-NEXT:    [[C:%.*]] = icmp eq i32 [[AND_IV]], 0
; IC4-NEXT:    br i1 [[C]], label %[[THEN:.*]], label %[[LATCH]]
; IC4:       [[THEN]]:
; IC4-NEXT:    [[CLAMPED:%.*]] = urem i32 [[IV]], 128
; IC4-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED]]
; IC4-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; IC4-NEXT:    br label %[[LATCH]]
; IC4:       [[LATCH]]:
; IC4-NEXT:    [[V:%.*]] = phi i32 [ [[LV]], %[[THEN]] ], [ 0, %[[LOOP]] ]
; IC4-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[V]]
; IC4-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1
; IC4-NEXT:    [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; IC4-NEXT:    br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; IC4:       [[EXIT]]:
; IC4-NEXT:    [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LATCH]] ], [ [[TMP24]], %[[MIDDLE_BLOCK]] ]
; IC4-NEXT:    ret i32 [[SUM_NEXT_LCSSA]]
;
; IC8-LABEL: define i32 @clamped_load_predicated(
; IC8-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; IC8-NEXT:  [[ENTRY:.*]]:
; IC8-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 32
; IC8-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; IC8:       [[VECTOR_PH]]:
; IC8-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -1
; IC8-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 127
; IC8-NEXT:    br i1 [[TMP1]], label %[[SCALAR_PH]], label %[[VECTOR_PH1:.*]]
; IC8:       [[VECTOR_PH1]]:
; IC8-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 32
; IC8-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; IC8-NEXT:    br label %[[VECTOR_BODY:.*]]
; IC8:       [[VECTOR_BODY]]:
; IC8-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE69:.*]] ]
; IC8-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH1]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP39:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP40:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP41:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP42:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP43:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP44:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP45:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP46:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[STEP_ADD:%.*]] = add nuw <4 x i32> [[VEC_IND]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_2:%.*]] = add nuw <4 x i32> [[STEP_ADD]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_3:%.*]] = add nuw <4 x i32> [[STEP_ADD_2]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_4:%.*]] = add nuw <4 x i32> [[STEP_ADD_3]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_5:%.*]] = add nuw <4 x i32> [[STEP_ADD_4]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_6:%.*]] = add nuw <4 x i32> [[STEP_ADD_5]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_7:%.*]] = add nuw <4 x i32> [[STEP_ADD_6]], splat (i32 4)
; IC8-NEXT:    [[TMP7:%.*]] = and <4 x i32> [[VEC_IND]], splat (i32 1)
; IC8-NEXT:    [[TMP8:%.*]] = and <4 x i32> [[STEP_ADD]], splat (i32 1)
; IC8-NEXT:    [[TMP9:%.*]] = and <4 x i32> [[STEP_ADD_2]], splat (i32 1)
; IC8-NEXT:    [[TMP10:%.*]] = and <4 x i32> [[STEP_ADD_3]], splat (i32 1)
; IC8-NEXT:    [[TMP11:%.*]] = and <4 x i32> [[STEP_ADD_4]], splat (i32 1)
; IC8-NEXT:    [[TMP12:%.*]] = and <4 x i32> [[STEP_ADD_5]], splat (i32 1)
; IC8-NEXT:    [[TMP13:%.*]] = and <4 x i32> [[STEP_ADD_6]], splat (i32 1)
; IC8-NEXT:    [[TMP14:%.*]] = and <4 x i32> [[STEP_ADD_7]], splat (i32 1)
; IC8-NEXT:    [[TMP15:%.*]] = icmp eq <4 x i32> [[TMP7]], zeroinitializer
; IC8-NEXT:    [[TMP16:%.*]] = icmp eq <4 x i32> [[TMP8]], zeroinitializer
; IC8-NEXT:    [[TMP17:%.*]] = icmp eq <4 x i32> [[TMP9]], zeroinitializer
; IC8-NEXT:    [[TMP18:%.*]] = icmp eq <4 x i32> [[TMP10]], zeroinitializer
; IC8-NEXT:    [[TMP19:%.*]] = icmp eq <4 x i32> [[TMP11]], zeroinitializer
; IC8-NEXT:    [[TMP20:%.*]] = icmp eq <4 x i32> [[TMP12]], zeroinitializer
; IC8-NEXT:    [[TMP21:%.*]] = icmp eq <4 x i32> [[TMP13]], zeroinitializer
; IC8-NEXT:    [[TMP22:%.*]] = icmp eq <4 x i32> [[TMP14]], zeroinitializer
; IC8-NEXT:    [[TMP49:%.*]] = urem <4 x i32> [[VEC_IND]], splat (i32 128)
; IC8-NEXT:    [[TMP73:%.*]] = urem <4 x i32> [[STEP_ADD]], splat (i32 128)
; IC8-NEXT:    [[TMP97:%.*]] = urem <4 x i32> [[STEP_ADD_2]], splat (i32 128)
; IC8-NEXT:    [[TMP121:%.*]] = urem <4 x i32> [[STEP_ADD_3]], splat (i32 128)
; IC8-NEXT:    [[TMP145:%.*]] = urem <4 x i32> [[STEP_ADD_4]], splat (i32 128)
; IC8-NEXT:    [[TMP23:%.*]] = urem <4 x i32> [[STEP_ADD_5]], splat (i32 128)
; IC8-NEXT:    [[TMP24:%.*]] = urem <4 x i32> [[STEP_ADD_6]], splat (i32 128)
; IC8-NEXT:    [[TMP25:%.*]] = urem <4 x i32> [[STEP_ADD_7]], splat (i32 128)
; IC8-NEXT:    [[TMP26:%.*]] = extractelement <4 x i1> [[TMP15]], i64 0
; IC8-NEXT:    br i1 [[TMP26]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
; IC8:       [[PRED_LOAD_IF]]:
; IC8-NEXT:    [[TMP27:%.*]] = extractelement <4 x i32> [[TMP49]], i64 0
; IC8-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP27]]
; IC8-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
; IC8-NEXT:    [[TMP30:%.*]] = insertelement <4 x i32> poison, i32 [[TMP29]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE]]
; IC8:       [[PRED_LOAD_CONTINUE]]:
; IC8-NEXT:    [[TMP31:%.*]] = phi <4 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP30]], %[[PRED_LOAD_IF]] ]
; IC8-NEXT:    [[TMP32:%.*]] = extractelement <4 x i1> [[TMP15]], i64 1
; IC8-NEXT:    br i1 [[TMP32]], label %[[PRED_LOAD_IF8:.*]], label %[[PRED_LOAD_CONTINUE9:.*]]
; IC8:       [[PRED_LOAD_IF8]]:
; IC8-NEXT:    [[TMP33:%.*]] = extractelement <4 x i32> [[TMP49]], i64 1
; IC8-NEXT:    [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP33]]
; IC8-NEXT:    [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4
; IC8-NEXT:    [[TMP36:%.*]] = insertelement <4 x i32> [[TMP31]], i32 [[TMP35]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE9]]
; IC8:       [[PRED_LOAD_CONTINUE9]]:
; IC8-NEXT:    [[TMP37:%.*]] = phi <4 x i32> [ [[TMP31]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP36]], %[[PRED_LOAD_IF8]] ]
; IC8-NEXT:    [[TMP38:%.*]] = extractelement <4 x i1> [[TMP15]], i64 2
; IC8-NEXT:    br i1 [[TMP38]], label %[[PRED_LOAD_IF10:.*]], label %[[PRED_LOAD_CONTINUE11:.*]]
; IC8:       [[PRED_LOAD_IF10]]:
; IC8-NEXT:    [[TMP169:%.*]] = extractelement <4 x i32> [[TMP49]], i64 2
; IC8-NEXT:    [[TMP193:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP169]]
; IC8-NEXT:    [[TMP217:%.*]] = load i32, ptr [[TMP193]], align 4
; IC8-NEXT:    [[TMP218:%.*]] = insertelement <4 x i32> [[TMP37]], i32 [[TMP217]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE11]]
; IC8:       [[PRED_LOAD_CONTINUE11]]:
; IC8-NEXT:    [[TMP219:%.*]] = phi <4 x i32> [ [[TMP37]], %[[PRED_LOAD_CONTINUE9]] ], [ [[TMP218]], %[[PRED_LOAD_IF10]] ]
; IC8-NEXT:    [[TMP220:%.*]] = extractelement <4 x i1> [[TMP15]], i64 3
; IC8-NEXT:    br i1 [[TMP220]], label %[[PRED_LOAD_IF12:.*]], label %[[PRED_LOAD_CONTINUE13:.*]]
; IC8:       [[PRED_LOAD_IF12]]:
; IC8-NEXT:    [[TMP221:%.*]] = extractelement <4 x i32> [[TMP49]], i64 3
; IC8-NEXT:    [[TMP222:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP221]]
; IC8-NEXT:    [[TMP223:%.*]] = load i32, ptr [[TMP222]], align 4
; IC8-NEXT:    [[TMP224:%.*]] = insertelement <4 x i32> [[TMP219]], i32 [[TMP223]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE13]]
; IC8:       [[PRED_LOAD_CONTINUE13]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = phi <4 x i32> [ [[TMP219]], %[[PRED_LOAD_CONTINUE11]] ], [ [[TMP224]], %[[PRED_LOAD_IF12]] ]
; IC8-NEXT:    [[TMP50:%.*]] = extractelement <4 x i1> [[TMP16]], i64 0
; IC8-NEXT:    br i1 [[TMP50]], label %[[PRED_LOAD_IF14:.*]], label %[[PRED_LOAD_CONTINUE15:.*]]
; IC8:       [[PRED_LOAD_IF14]]:
; IC8-NEXT:    [[TMP51:%.*]] = extractelement <4 x i32> [[TMP73]], i64 0
; IC8-NEXT:    [[TMP52:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP51]]
; IC8-NEXT:    [[TMP53:%.*]] = load i32, ptr [[TMP52]], align 4
; IC8-NEXT:    [[TMP54:%.*]] = insertelement <4 x i32> poison, i32 [[TMP53]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE15]]
; IC8:       [[PRED_LOAD_CONTINUE15]]:
; IC8-NEXT:    [[TMP55:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE13]] ], [ [[TMP54]], %[[PRED_LOAD_IF14]] ]
; IC8-NEXT:    [[TMP56:%.*]] = extractelement <4 x i1> [[TMP16]], i64 1
; IC8-NEXT:    br i1 [[TMP56]], label %[[PRED_LOAD_IF16:.*]], label %[[PRED_LOAD_CONTINUE17:.*]]
; IC8:       [[PRED_LOAD_IF16]]:
; IC8-NEXT:    [[TMP57:%.*]] = extractelement <4 x i32> [[TMP73]], i64 1
; IC8-NEXT:    [[TMP58:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP57]]
; IC8-NEXT:    [[TMP59:%.*]] = load i32, ptr [[TMP58]], align 4
; IC8-NEXT:    [[TMP60:%.*]] = insertelement <4 x i32> [[TMP55]], i32 [[TMP59]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE17]]
; IC8:       [[PRED_LOAD_CONTINUE17]]:
; IC8-NEXT:    [[TMP61:%.*]] = phi <4 x i32> [ [[TMP55]], %[[PRED_LOAD_CONTINUE15]] ], [ [[TMP60]], %[[PRED_LOAD_IF16]] ]
; IC8-NEXT:    [[TMP62:%.*]] = extractelement <4 x i1> [[TMP16]], i64 2
; IC8-NEXT:    br i1 [[TMP62]], label %[[PRED_LOAD_IF18:.*]], label %[[PRED_LOAD_CONTINUE19:.*]]
; IC8:       [[PRED_LOAD_IF18]]:
; IC8-NEXT:    [[TMP63:%.*]] = extractelement <4 x i32> [[TMP73]], i64 2
; IC8-NEXT:    [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP63]]
; IC8-NEXT:    [[TMP65:%.*]] = load i32, ptr [[TMP64]], align 4
; IC8-NEXT:    [[TMP66:%.*]] = insertelement <4 x i32> [[TMP61]], i32 [[TMP65]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE19]]
; IC8:       [[PRED_LOAD_CONTINUE19]]:
; IC8-NEXT:    [[TMP67:%.*]] = phi <4 x i32> [ [[TMP61]], %[[PRED_LOAD_CONTINUE17]] ], [ [[TMP66]], %[[PRED_LOAD_IF18]] ]
; IC8-NEXT:    [[TMP68:%.*]] = extractelement <4 x i1> [[TMP16]], i64 3
; IC8-NEXT:    br i1 [[TMP68]], label %[[PRED_LOAD_IF20:.*]], label %[[PRED_LOAD_CONTINUE21:.*]]
; IC8:       [[PRED_LOAD_IF20]]:
; IC8-NEXT:    [[TMP69:%.*]] = extractelement <4 x i32> [[TMP73]], i64 3
; IC8-NEXT:    [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP69]]
; IC8-NEXT:    [[TMP71:%.*]] = load i32, ptr [[TMP70]], align 4
; IC8-NEXT:    [[TMP72:%.*]] = insertelement <4 x i32> [[TMP67]], i32 [[TMP71]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE21]]
; IC8:       [[PRED_LOAD_CONTINUE21]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD8:%.*]] = phi <4 x i32> [ [[TMP67]], %[[PRED_LOAD_CONTINUE19]] ], [ [[TMP72]], %[[PRED_LOAD_IF20]] ]
; IC8-NEXT:    [[TMP74:%.*]] = extractelement <4 x i1> [[TMP17]], i64 0
; IC8-NEXT:    br i1 [[TMP74]], label %[[PRED_LOAD_IF22:.*]], label %[[PRED_LOAD_CONTINUE23:.*]]
; IC8:       [[PRED_LOAD_IF22]]:
; IC8-NEXT:    [[TMP75:%.*]] = extractelement <4 x i32> [[TMP97]], i64 0
; IC8-NEXT:    [[TMP76:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP75]]
; IC8-NEXT:    [[TMP77:%.*]] = load i32, ptr [[TMP76]], align 4
; IC8-NEXT:    [[TMP78:%.*]] = insertelement <4 x i32> poison, i32 [[TMP77]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE23]]
; IC8:       [[PRED_LOAD_CONTINUE23]]:
; IC8-NEXT:    [[TMP79:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE21]] ], [ [[TMP78]], %[[PRED_LOAD_IF22]] ]
; IC8-NEXT:    [[TMP80:%.*]] = extractelement <4 x i1> [[TMP17]], i64 1
; IC8-NEXT:    br i1 [[TMP80]], label %[[PRED_LOAD_IF24:.*]], label %[[PRED_LOAD_CONTINUE25:.*]]
; IC8:       [[PRED_LOAD_IF24]]:
; IC8-NEXT:    [[TMP81:%.*]] = extractelement <4 x i32> [[TMP97]], i64 1
; IC8-NEXT:    [[TMP82:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP81]]
; IC8-NEXT:    [[TMP83:%.*]] = load i32, ptr [[TMP82]], align 4
; IC8-NEXT:    [[TMP84:%.*]] = insertelement <4 x i32> [[TMP79]], i32 [[TMP83]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE25]]
; IC8:       [[PRED_LOAD_CONTINUE25]]:
; IC8-NEXT:    [[TMP85:%.*]] = phi <4 x i32> [ [[TMP79]], %[[PRED_LOAD_CONTINUE23]] ], [ [[TMP84]], %[[PRED_LOAD_IF24]] ]
; IC8-NEXT:    [[TMP86:%.*]] = extractelement <4 x i1> [[TMP17]], i64 2
; IC8-NEXT:    br i1 [[TMP86]], label %[[PRED_LOAD_IF26:.*]], label %[[PRED_LOAD_CONTINUE27:.*]]
; IC8:       [[PRED_LOAD_IF26]]:
; IC8-NEXT:    [[TMP87:%.*]] = extractelement <4 x i32> [[TMP97]], i64 2
; IC8-NEXT:    [[TMP88:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP87]]
; IC8-NEXT:    [[TMP89:%.*]] = load i32, ptr [[TMP88]], align 4
; IC8-NEXT:    [[TMP90:%.*]] = insertelement <4 x i32> [[TMP85]], i32 [[TMP89]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE27]]
; IC8:       [[PRED_LOAD_CONTINUE27]]:
; IC8-NEXT:    [[TMP91:%.*]] = phi <4 x i32> [ [[TMP85]], %[[PRED_LOAD_CONTINUE25]] ], [ [[TMP90]], %[[PRED_LOAD_IF26]] ]
; IC8-NEXT:    [[TMP92:%.*]] = extractelement <4 x i1> [[TMP17]], i64 3
; IC8-NEXT:    br i1 [[TMP92]], label %[[PRED_LOAD_IF28:.*]], label %[[PRED_LOAD_CONTINUE29:.*]]
; IC8:       [[PRED_LOAD_IF28]]:
; IC8-NEXT:    [[TMP93:%.*]] = extractelement <4 x i32> [[TMP97]], i64 3
; IC8-NEXT:    [[TMP94:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP93]]
; IC8-NEXT:    [[TMP95:%.*]] = load i32, ptr [[TMP94]], align 4
; IC8-NEXT:    [[TMP96:%.*]] = insertelement <4 x i32> [[TMP91]], i32 [[TMP95]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE29]]
; IC8:       [[PRED_LOAD_CONTINUE29]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD9:%.*]] = phi <4 x i32> [ [[TMP91]], %[[PRED_LOAD_CONTINUE27]] ], [ [[TMP96]], %[[PRED_LOAD_IF28]] ]
; IC8-NEXT:    [[TMP98:%.*]] = extractelement <4 x i1> [[TMP18]], i64 0
; IC8-NEXT:    br i1 [[TMP98]], label %[[PRED_LOAD_IF30:.*]], label %[[PRED_LOAD_CONTINUE31:.*]]
; IC8:       [[PRED_LOAD_IF30]]:
; IC8-NEXT:    [[TMP99:%.*]] = extractelement <4 x i32> [[TMP121]], i64 0
; IC8-NEXT:    [[TMP100:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP99]]
; IC8-NEXT:    [[TMP101:%.*]] = load i32, ptr [[TMP100]], align 4
; IC8-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> poison, i32 [[TMP101]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE31]]
; IC8:       [[PRED_LOAD_CONTINUE31]]:
; IC8-NEXT:    [[TMP103:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE29]] ], [ [[TMP102]], %[[PRED_LOAD_IF30]] ]
; IC8-NEXT:    [[TMP104:%.*]] = extractelement <4 x i1> [[TMP18]], i64 1
; IC8-NEXT:    br i1 [[TMP104]], label %[[PRED_LOAD_IF32:.*]], label %[[PRED_LOAD_CONTINUE33:.*]]
; IC8:       [[PRED_LOAD_IF32]]:
; IC8-NEXT:    [[TMP105:%.*]] = extractelement <4 x i32> [[TMP121]], i64 1
; IC8-NEXT:    [[TMP106:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP105]]
; IC8-NEXT:    [[TMP107:%.*]] = load i32, ptr [[TMP106]], align 4
; IC8-NEXT:    [[TMP108:%.*]] = insertelement <4 x i32> [[TMP103]], i32 [[TMP107]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE33]]
; IC8:       [[PRED_LOAD_CONTINUE33]]:
; IC8-NEXT:    [[TMP109:%.*]] = phi <4 x i32> [ [[TMP103]], %[[PRED_LOAD_CONTINUE31]] ], [ [[TMP108]], %[[PRED_LOAD_IF32]] ]
; IC8-NEXT:    [[TMP110:%.*]] = extractelement <4 x i1> [[TMP18]], i64 2
; IC8-NEXT:    br i1 [[TMP110]], label %[[PRED_LOAD_IF34:.*]], label %[[PRED_LOAD_CONTINUE35:.*]]
; IC8:       [[PRED_LOAD_IF34]]:
; IC8-NEXT:    [[TMP111:%.*]] = extractelement <4 x i32> [[TMP121]], i64 2
; IC8-NEXT:    [[TMP112:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP111]]
; IC8-NEXT:    [[TMP113:%.*]] = load i32, ptr [[TMP112]], align 4
; IC8-NEXT:    [[TMP114:%.*]] = insertelement <4 x i32> [[TMP109]], i32 [[TMP113]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE35]]
; IC8:       [[PRED_LOAD_CONTINUE35]]:
; IC8-NEXT:    [[TMP115:%.*]] = phi <4 x i32> [ [[TMP109]], %[[PRED_LOAD_CONTINUE33]] ], [ [[TMP114]], %[[PRED_LOAD_IF34]] ]
; IC8-NEXT:    [[TMP116:%.*]] = extractelement <4 x i1> [[TMP18]], i64 3
; IC8-NEXT:    br i1 [[TMP116]], label %[[PRED_LOAD_IF36:.*]], label %[[PRED_LOAD_CONTINUE37:.*]]
; IC8:       [[PRED_LOAD_IF36]]:
; IC8-NEXT:    [[TMP117:%.*]] = extractelement <4 x i32> [[TMP121]], i64 3
; IC8-NEXT:    [[TMP118:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP117]]
; IC8-NEXT:    [[TMP119:%.*]] = load i32, ptr [[TMP118]], align 4
; IC8-NEXT:    [[TMP120:%.*]] = insertelement <4 x i32> [[TMP115]], i32 [[TMP119]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE37]]
; IC8:       [[PRED_LOAD_CONTINUE37]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD10:%.*]] = phi <4 x i32> [ [[TMP115]], %[[PRED_LOAD_CONTINUE35]] ], [ [[TMP120]], %[[PRED_LOAD_IF36]] ]
; IC8-NEXT:    [[TMP122:%.*]] = extractelement <4 x i1> [[TMP19]], i64 0
; IC8-NEXT:    br i1 [[TMP122]], label %[[PRED_LOAD_IF38:.*]], label %[[PRED_LOAD_CONTINUE39:.*]]
; IC8:       [[PRED_LOAD_IF38]]:
; IC8-NEXT:    [[TMP123:%.*]] = extractelement <4 x i32> [[TMP145]], i64 0
; IC8-NEXT:    [[TMP124:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP123]]
; IC8-NEXT:    [[TMP125:%.*]] = load i32, ptr [[TMP124]], align 4
; IC8-NEXT:    [[TMP126:%.*]] = insertelement <4 x i32> poison, i32 [[TMP125]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE39]]
; IC8:       [[PRED_LOAD_CONTINUE39]]:
; IC8-NEXT:    [[TMP127:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE37]] ], [ [[TMP126]], %[[PRED_LOAD_IF38]] ]
; IC8-NEXT:    [[TMP128:%.*]] = extractelement <4 x i1> [[TMP19]], i64 1
; IC8-NEXT:    br i1 [[TMP128]], label %[[PRED_LOAD_IF40:.*]], label %[[PRED_LOAD_CONTINUE41:.*]]
; IC8:       [[PRED_LOAD_IF40]]:
; IC8-NEXT:    [[TMP129:%.*]] = extractelement <4 x i32> [[TMP145]], i64 1
; IC8-NEXT:    [[TMP130:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP129]]
; IC8-NEXT:    [[TMP131:%.*]] = load i32, ptr [[TMP130]], align 4
; IC8-NEXT:    [[TMP132:%.*]] = insertelement <4 x i32> [[TMP127]], i32 [[TMP131]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE41]]
; IC8:       [[PRED_LOAD_CONTINUE41]]:
; IC8-NEXT:    [[TMP133:%.*]] = phi <4 x i32> [ [[TMP127]], %[[PRED_LOAD_CONTINUE39]] ], [ [[TMP132]], %[[PRED_LOAD_IF40]] ]
; IC8-NEXT:    [[TMP134:%.*]] = extractelement <4 x i1> [[TMP19]], i64 2
; IC8-NEXT:    br i1 [[TMP134]], label %[[PRED_LOAD_IF42:.*]], label %[[PRED_LOAD_CONTINUE43:.*]]
; IC8:       [[PRED_LOAD_IF42]]:
; IC8-NEXT:    [[TMP135:%.*]] = extractelement <4 x i32> [[TMP145]], i64 2
; IC8-NEXT:    [[TMP136:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP135]]
; IC8-NEXT:    [[TMP137:%.*]] = load i32, ptr [[TMP136]], align 4
; IC8-NEXT:    [[TMP138:%.*]] = insertelement <4 x i32> [[TMP133]], i32 [[TMP137]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE43]]
; IC8:       [[PRED_LOAD_CONTINUE43]]:
; IC8-NEXT:    [[TMP139:%.*]] = phi <4 x i32> [ [[TMP133]], %[[PRED_LOAD_CONTINUE41]] ], [ [[TMP138]], %[[PRED_LOAD_IF42]] ]
; IC8-NEXT:    [[TMP140:%.*]] = extractelement <4 x i1> [[TMP19]], i64 3
; IC8-NEXT:    br i1 [[TMP140]], label %[[PRED_LOAD_IF44:.*]], label %[[PRED_LOAD_CONTINUE45:.*]]
; IC8:       [[PRED_LOAD_IF44]]:
; IC8-NEXT:    [[TMP141:%.*]] = extractelement <4 x i32> [[TMP145]], i64 3
; IC8-NEXT:    [[TMP142:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP141]]
; IC8-NEXT:    [[TMP143:%.*]] = load i32, ptr [[TMP142]], align 4
; IC8-NEXT:    [[TMP144:%.*]] = insertelement <4 x i32> [[TMP139]], i32 [[TMP143]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE45]]
; IC8:       [[PRED_LOAD_CONTINUE45]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD11:%.*]] = phi <4 x i32> [ [[TMP139]], %[[PRED_LOAD_CONTINUE43]] ], [ [[TMP144]], %[[PRED_LOAD_IF44]] ]
; IC8-NEXT:    [[TMP146:%.*]] = extractelement <4 x i1> [[TMP20]], i64 0
; IC8-NEXT:    br i1 [[TMP146]], label %[[PRED_LOAD_IF46:.*]], label %[[PRED_LOAD_CONTINUE47:.*]]
; IC8:       [[PRED_LOAD_IF46]]:
; IC8-NEXT:    [[TMP147:%.*]] = extractelement <4 x i32> [[TMP23]], i64 0
; IC8-NEXT:    [[TMP148:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP147]]
; IC8-NEXT:    [[TMP149:%.*]] = load i32, ptr [[TMP148]], align 4
; IC8-NEXT:    [[TMP150:%.*]] = insertelement <4 x i32> poison, i32 [[TMP149]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE47]]
; IC8:       [[PRED_LOAD_CONTINUE47]]:
; IC8-NEXT:    [[TMP151:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE45]] ], [ [[TMP150]], %[[PRED_LOAD_IF46]] ]
; IC8-NEXT:    [[TMP152:%.*]] = extractelement <4 x i1> [[TMP20]], i64 1
; IC8-NEXT:    br i1 [[TMP152]], label %[[PRED_LOAD_IF48:.*]], label %[[PRED_LOAD_CONTINUE49:.*]]
; IC8:       [[PRED_LOAD_IF48]]:
; IC8-NEXT:    [[TMP153:%.*]] = extractelement <4 x i32> [[TMP23]], i64 1
; IC8-NEXT:    [[TMP154:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP153]]
; IC8-NEXT:    [[TMP155:%.*]] = load i32, ptr [[TMP154]], align 4
; IC8-NEXT:    [[TMP156:%.*]] = insertelement <4 x i32> [[TMP151]], i32 [[TMP155]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE49]]
; IC8:       [[PRED_LOAD_CONTINUE49]]:
; IC8-NEXT:    [[TMP157:%.*]] = phi <4 x i32> [ [[TMP151]], %[[PRED_LOAD_CONTINUE47]] ], [ [[TMP156]], %[[PRED_LOAD_IF48]] ]
; IC8-NEXT:    [[TMP158:%.*]] = extractelement <4 x i1> [[TMP20]], i64 2
; IC8-NEXT:    br i1 [[TMP158]], label %[[PRED_LOAD_IF50:.*]], label %[[PRED_LOAD_CONTINUE51:.*]]
; IC8:       [[PRED_LOAD_IF50]]:
; IC8-NEXT:    [[TMP159:%.*]] = extractelement <4 x i32> [[TMP23]], i64 2
; IC8-NEXT:    [[TMP160:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP159]]
; IC8-NEXT:    [[TMP161:%.*]] = load i32, ptr [[TMP160]], align 4
; IC8-NEXT:    [[TMP162:%.*]] = insertelement <4 x i32> [[TMP157]], i32 [[TMP161]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE51]]
; IC8:       [[PRED_LOAD_CONTINUE51]]:
; IC8-NEXT:    [[TMP163:%.*]] = phi <4 x i32> [ [[TMP157]], %[[PRED_LOAD_CONTINUE49]] ], [ [[TMP162]], %[[PRED_LOAD_IF50]] ]
; IC8-NEXT:    [[TMP164:%.*]] = extractelement <4 x i1> [[TMP20]], i64 3
; IC8-NEXT:    br i1 [[TMP164]], label %[[PRED_LOAD_IF52:.*]], label %[[PRED_LOAD_CONTINUE53:.*]]
; IC8:       [[PRED_LOAD_IF52]]:
; IC8-NEXT:    [[TMP165:%.*]] = extractelement <4 x i32> [[TMP23]], i64 3
; IC8-NEXT:    [[TMP166:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP165]]
; IC8-NEXT:    [[TMP167:%.*]] = load i32, ptr [[TMP166]], align 4
; IC8-NEXT:    [[TMP168:%.*]] = insertelement <4 x i32> [[TMP163]], i32 [[TMP167]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE53]]
; IC8:       [[PRED_LOAD_CONTINUE53]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD12:%.*]] = phi <4 x i32> [ [[TMP163]], %[[PRED_LOAD_CONTINUE51]] ], [ [[TMP168]], %[[PRED_LOAD_IF52]] ]
; IC8-NEXT:    [[TMP170:%.*]] = extractelement <4 x i1> [[TMP21]], i64 0
; IC8-NEXT:    br i1 [[TMP170]], label %[[PRED_LOAD_IF54:.*]], label %[[PRED_LOAD_CONTINUE55:.*]]
; IC8:       [[PRED_LOAD_IF54]]:
; IC8-NEXT:    [[TMP171:%.*]] = extractelement <4 x i32> [[TMP24]], i64 0
; IC8-NEXT:    [[TMP172:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP171]]
; IC8-NEXT:    [[TMP173:%.*]] = load i32, ptr [[TMP172]], align 4
; IC8-NEXT:    [[TMP174:%.*]] = insertelement <4 x i32> poison, i32 [[TMP173]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE55]]
; IC8:       [[PRED_LOAD_CONTINUE55]]:
; IC8-NEXT:    [[TMP175:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE53]] ], [ [[TMP174]], %[[PRED_LOAD_IF54]] ]
; IC8-NEXT:    [[TMP176:%.*]] = extractelement <4 x i1> [[TMP21]], i64 1
; IC8-NEXT:    br i1 [[TMP176]], label %[[PRED_LOAD_IF56:.*]], label %[[PRED_LOAD_CONTINUE57:.*]]
; IC8:       [[PRED_LOAD_IF56]]:
; IC8-NEXT:    [[TMP177:%.*]] = extractelement <4 x i32> [[TMP24]], i64 1
; IC8-NEXT:    [[TMP178:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP177]]
; IC8-NEXT:    [[TMP179:%.*]] = load i32, ptr [[TMP178]], align 4
; IC8-NEXT:    [[TMP180:%.*]] = insertelement <4 x i32> [[TMP175]], i32 [[TMP179]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE57]]
; IC8:       [[PRED_LOAD_CONTINUE57]]:
; IC8-NEXT:    [[TMP181:%.*]] = phi <4 x i32> [ [[TMP175]], %[[PRED_LOAD_CONTINUE55]] ], [ [[TMP180]], %[[PRED_LOAD_IF56]] ]
; IC8-NEXT:    [[TMP182:%.*]] = extractelement <4 x i1> [[TMP21]], i64 2
; IC8-NEXT:    br i1 [[TMP182]], label %[[PRED_LOAD_IF58:.*]], label %[[PRED_LOAD_CONTINUE59:.*]]
; IC8:       [[PRED_LOAD_IF58]]:
; IC8-NEXT:    [[TMP183:%.*]] = extractelement <4 x i32> [[TMP24]], i64 2
; IC8-NEXT:    [[TMP184:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP183]]
; IC8-NEXT:    [[TMP185:%.*]] = load i32, ptr [[TMP184]], align 4
; IC8-NEXT:    [[TMP186:%.*]] = insertelement <4 x i32> [[TMP181]], i32 [[TMP185]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE59]]
; IC8:       [[PRED_LOAD_CONTINUE59]]:
; IC8-NEXT:    [[TMP187:%.*]] = phi <4 x i32> [ [[TMP181]], %[[PRED_LOAD_CONTINUE57]] ], [ [[TMP186]], %[[PRED_LOAD_IF58]] ]
; IC8-NEXT:    [[TMP188:%.*]] = extractelement <4 x i1> [[TMP21]], i64 3
; IC8-NEXT:    br i1 [[TMP188]], label %[[PRED_LOAD_IF60:.*]], label %[[PRED_LOAD_CONTINUE61:.*]]
; IC8:       [[PRED_LOAD_IF60]]:
; IC8-NEXT:    [[TMP189:%.*]] = extractelement <4 x i32> [[TMP24]], i64 3
; IC8-NEXT:    [[TMP190:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP189]]
; IC8-NEXT:    [[TMP191:%.*]] = load i32, ptr [[TMP190]], align 4
; IC8-NEXT:    [[TMP192:%.*]] = insertelement <4 x i32> [[TMP187]], i32 [[TMP191]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE61]]
; IC8:       [[PRED_LOAD_CONTINUE61]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD13:%.*]] = phi <4 x i32> [ [[TMP187]], %[[PRED_LOAD_CONTINUE59]] ], [ [[TMP192]], %[[PRED_LOAD_IF60]] ]
; IC8-NEXT:    [[TMP194:%.*]] = extractelement <4 x i1> [[TMP22]], i64 0
; IC8-NEXT:    br i1 [[TMP194]], label %[[PRED_LOAD_IF62:.*]], label %[[PRED_LOAD_CONTINUE63:.*]]
; IC8:       [[PRED_LOAD_IF62]]:
; IC8-NEXT:    [[TMP195:%.*]] = extractelement <4 x i32> [[TMP25]], i64 0
; IC8-NEXT:    [[TMP196:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP195]]
; IC8-NEXT:    [[TMP197:%.*]] = load i32, ptr [[TMP196]], align 4
; IC8-NEXT:    [[TMP198:%.*]] = insertelement <4 x i32> poison, i32 [[TMP197]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE63]]
; IC8:       [[PRED_LOAD_CONTINUE63]]:
; IC8-NEXT:    [[TMP199:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE61]] ], [ [[TMP198]], %[[PRED_LOAD_IF62]] ]
; IC8-NEXT:    [[TMP200:%.*]] = extractelement <4 x i1> [[TMP22]], i64 1
; IC8-NEXT:    br i1 [[TMP200]], label %[[PRED_LOAD_IF64:.*]], label %[[PRED_LOAD_CONTINUE65:.*]]
; IC8:       [[PRED_LOAD_IF64]]:
; IC8-NEXT:    [[TMP201:%.*]] = extractelement <4 x i32> [[TMP25]], i64 1
; IC8-NEXT:    [[TMP202:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP201]]
; IC8-NEXT:    [[TMP203:%.*]] = load i32, ptr [[TMP202]], align 4
; IC8-NEXT:    [[TMP204:%.*]] = insertelement <4 x i32> [[TMP199]], i32 [[TMP203]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE65]]
; IC8:       [[PRED_LOAD_CONTINUE65]]:
; IC8-NEXT:    [[TMP205:%.*]] = phi <4 x i32> [ [[TMP199]], %[[PRED_LOAD_CONTINUE63]] ], [ [[TMP204]], %[[PRED_LOAD_IF64]] ]
; IC8-NEXT:    [[TMP206:%.*]] = extractelement <4 x i1> [[TMP22]], i64 2
; IC8-NEXT:    br i1 [[TMP206]], label %[[PRED_LOAD_IF66:.*]], label %[[PRED_LOAD_CONTINUE67:.*]]
; IC8:       [[PRED_LOAD_IF66]]:
; IC8-NEXT:    [[TMP207:%.*]] = extractelement <4 x i32> [[TMP25]], i64 2
; IC8-NEXT:    [[TMP208:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP207]]
; IC8-NEXT:    [[TMP209:%.*]] = load i32, ptr [[TMP208]], align 4
; IC8-NEXT:    [[TMP210:%.*]] = insertelement <4 x i32> [[TMP205]], i32 [[TMP209]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE67]]
; IC8:       [[PRED_LOAD_CONTINUE67]]:
; IC8-NEXT:    [[TMP211:%.*]] = phi <4 x i32> [ [[TMP205]], %[[PRED_LOAD_CONTINUE65]] ], [ [[TMP210]], %[[PRED_LOAD_IF66]] ]
; IC8-NEXT:    [[TMP212:%.*]] = extractelement <4 x i1> [[TMP22]], i64 3
; IC8-NEXT:    br i1 [[TMP212]], label %[[PRED_LOAD_IF68:.*]], label %[[PRED_LOAD_CONTINUE69]]
; IC8:       [[PRED_LOAD_IF68]]:
; IC8-NEXT:    [[TMP213:%.*]] = extractelement <4 x i32> [[TMP25]], i64 3
; IC8-NEXT:    [[TMP214:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP213]]
; IC8-NEXT:    [[TMP215:%.*]] = load i32, ptr [[TMP214]], align 4
; IC8-NEXT:    [[TMP216:%.*]] = insertelement <4 x i32> [[TMP211]], i32 [[TMP215]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE69]]
; IC8:       [[PRED_LOAD_CONTINUE69]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD14:%.*]] = phi <4 x i32> [ [[TMP211]], %[[PRED_LOAD_CONTINUE67]] ], [ [[TMP216]], %[[PRED_LOAD_IF68]] ]
; IC8-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP15]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI15:%.*]] = select <4 x i1> [[TMP16]], <4 x i32> [[WIDE_MASKED_LOAD8]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI16:%.*]] = select <4 x i1> [[TMP17]], <4 x i32> [[WIDE_MASKED_LOAD9]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI17:%.*]] = select <4 x i1> [[TMP18]], <4 x i32> [[WIDE_MASKED_LOAD10]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI18:%.*]] = select <4 x i1> [[TMP19]], <4 x i32> [[WIDE_MASKED_LOAD11]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI19:%.*]] = select <4 x i1> [[TMP20]], <4 x i32> [[WIDE_MASKED_LOAD12]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI20:%.*]] = select <4 x i1> [[TMP21]], <4 x i32> [[WIDE_MASKED_LOAD13]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI21:%.*]] = select <4 x i1> [[TMP22]], <4 x i32> [[WIDE_MASKED_LOAD14]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[TMP39]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]
; IC8-NEXT:    [[TMP40]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI15]]
; IC8-NEXT:    [[TMP41]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI16]]
; IC8-NEXT:    [[TMP42]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI17]]
; IC8-NEXT:    [[TMP43]] = add <4 x i32> [[VEC_PHI4]], [[PREDPHI18]]
; IC8-NEXT:    [[TMP44]] = add <4 x i32> [[VEC_PHI5]], [[PREDPHI19]]
; IC8-NEXT:    [[TMP45]] = add <4 x i32> [[VEC_PHI6]], [[PREDPHI20]]
; IC8-NEXT:    [[TMP46]] = add <4 x i32> [[VEC_PHI7]], [[PREDPHI21]]
; IC8-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 32
; IC8-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[STEP_ADD_7]], splat (i32 4)
; IC8-NEXT:    [[TMP47:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; IC8-NEXT:    br i1 [[TMP47]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; IC8:       [[MIDDLE_BLOCK]]:
; IC8-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP40]], [[TMP39]]
; IC8-NEXT:    [[BIN_RDX22:%.*]] = add <4 x i32> [[TMP41]], [[BIN_RDX]]
; IC8-NEXT:    [[BIN_RDX23:%.*]] = add <4 x i32> [[TMP42]], [[BIN_RDX22]]
; IC8-NEXT:    [[BIN_RDX24:%.*]] = add <4 x i32> [[TMP43]], [[BIN_RDX23]]
; IC8-NEXT:    [[BIN_RDX25:%.*]] = add <4 x i32> [[TMP44]], [[BIN_RDX24]]
; IC8-NEXT:    [[BIN_RDX26:%.*]] = add <4 x i32> [[TMP45]], [[BIN_RDX25]]
; IC8-NEXT:    [[BIN_RDX27:%.*]] = add <4 x i32> [[TMP46]], [[BIN_RDX26]]
; IC8-NEXT:    [[TMP48:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX27]])
; IC8-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; IC8-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; IC8:       [[SCALAR_PH]]:
; IC8-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; IC8-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP48]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; IC8-NEXT:    br label %[[LOOP:.*]]
; IC8:       [[LOOP]]:
; IC8-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ]
; IC8-NEXT:    [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SUM_NEXT:%.*]], %[[LATCH]] ]
; IC8-NEXT:    [[AND_IV:%.*]] = and i32 [[IV]], 1
; IC8-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND_IV]], 0
; IC8-NEXT:    br i1 [[CMP]], label %[[THEN:.*]], label %[[LATCH]]
; IC8:       [[THEN]]:
; IC8-NEXT:    [[CLAMPED:%.*]] = urem i32 [[IV]], 128
; IC8-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED]]
; IC8-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; IC8-NEXT:    br label %[[LATCH]]
; IC8:       [[LATCH]]:
; IC8-NEXT:    [[V:%.*]] = phi i32 [ [[LV]], %[[THEN]] ], [ 0, %[[LOOP]] ]
; IC8-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[V]]
; IC8-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1
; IC8-NEXT:    [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; IC8-NEXT:    br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; IC8:       [[EXIT]]:
; IC8-NEXT:    [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LATCH]] ], [ [[TMP48]], %[[MIDDLE_BLOCK]] ]
; IC8-NEXT:    ret i32 [[SUM_NEXT_LCSSA]]
;
entry:
  br label %loop

loop:
  %iv = phi i32 [ 0, %entry ], [ %iv.next, %latch ]
  %sum = phi i32 [ 0, %entry ], [ %sum.next, %latch ]
  %and.iv = and i32 %iv, 1
  %cmp = icmp eq i32 %and.iv, 0
  br i1 %cmp, label %then, label %latch

then:
  %clamped = urem i32 %iv, 128
  %gep.A = getelementptr inbounds i32, ptr %A, i32 %clamped
  %lv = load i32, ptr %gep.A
  br label %latch

latch:
  %v = phi i32 [ %lv, %then ], [ 0, %loop ]
  %sum.next = add i32 %sum, %v
  %iv.next = add i32 %iv, 1
  %ec = icmp eq i32 %iv.next, %n
  br i1 %ec, label %exit, label %loop

exit:
  ret i32 %sum.next
}

; A forced interleave count that would step past the clamp window must be capped
; down to a power-of-two divisor of Bound / VF. With VF=4 and Bound=16 the cap is
; 16 / 4 = 4.
; TODO: This is the desired behavior. Currently the interleave count is not
; capped: with -force-vector-interleave=8 the full 8-part body is emitted
; (step.add.7, index += 32, 32 pred.load.if blocks). It is only harmless
; because the contradictory min-iters (N >= 32) and SCEV wrap (N <= 16) checks
; make that body unreachable.
define i32 @clamped_load_predicated_ic_capped(ptr %A, i32 %n) {
; CHECK-LABEL: define i32 @clamped_load_predicated_ic_capped(
; CHECK-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[N]], -1
; CHECK-NEXT:    [[TMP3:%.*]] = icmp ugt i32 [[TMP2]], 15
; CHECK-NEXT:    br i1 [[TMP3]], label %[[SCALAR_PH]], label %[[VECTOR_PH1:.*]]
; CHECK:       [[VECTOR_PH1]]:
; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 4
; CHECK-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6:.*]] ]
; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH1]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE6]] ]
; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP4:%.*]], %[[PRED_LOAD_CONTINUE6]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = and <4 x i32> [[VEC_IND]], splat (i32 1)
; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <4 x i32> [[TMP0]], zeroinitializer
; CHECK-NEXT:    [[TMP28:%.*]] = urem <4 x i32> [[VEC_IND]], splat (i32 16)
; CHECK-NEXT:    [[TMP29:%.*]] = extractelement <4 x i1> [[TMP1]], i64 0
; CHECK-NEXT:    br i1 [[TMP29]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
; CHECK:       [[PRED_LOAD_IF]]:
; CHECK-NEXT:    [[TMP30:%.*]] = extractelement <4 x i32> [[TMP28]], i64 0
; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP30]]
; CHECK-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
; CHECK-NEXT:    [[TMP9:%.*]] = insertelement <4 x i32> poison, i32 [[TMP8]], i64 0
; CHECK-NEXT:    br label %[[PRED_LOAD_CONTINUE]]
; CHECK:       [[PRED_LOAD_CONTINUE]]:
; CHECK-NEXT:    [[TMP10:%.*]] = phi <4 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP9]], %[[PRED_LOAD_IF]] ]
; CHECK-NEXT:    [[TMP11:%.*]] = extractelement <4 x i1> [[TMP1]], i64 1
; CHECK-NEXT:    br i1 [[TMP11]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2:.*]]
; CHECK:       [[PRED_LOAD_IF1]]:
; CHECK-NEXT:    [[TMP12:%.*]] = extractelement <4 x i32> [[TMP28]], i64 1
; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP12]]
; CHECK-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
; CHECK-NEXT:    [[TMP15:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP14]], i64 1
; CHECK-NEXT:    br label %[[PRED_LOAD_CONTINUE2]]
; CHECK:       [[PRED_LOAD_CONTINUE2]]:
; CHECK-NEXT:    [[TMP16:%.*]] = phi <4 x i32> [ [[TMP10]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP15]], %[[PRED_LOAD_IF1]] ]
; CHECK-NEXT:    [[TMP17:%.*]] = extractelement <4 x i1> [[TMP1]], i64 2
; CHECK-NEXT:    br i1 [[TMP17]], label %[[PRED_LOAD_IF3:.*]], label %[[PRED_LOAD_CONTINUE4:.*]]
; CHECK:       [[PRED_LOAD_IF3]]:
; CHECK-NEXT:    [[TMP18:%.*]] = extractelement <4 x i32> [[TMP28]], i64 2
; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP18]]
; CHECK-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
; CHECK-NEXT:    [[TMP21:%.*]] = insertelement <4 x i32> [[TMP16]], i32 [[TMP20]], i64 2
; CHECK-NEXT:    br label %[[PRED_LOAD_CONTINUE4]]
; CHECK:       [[PRED_LOAD_CONTINUE4]]:
; CHECK-NEXT:    [[TMP22:%.*]] = phi <4 x i32> [ [[TMP16]], %[[PRED_LOAD_CONTINUE2]] ], [ [[TMP21]], %[[PRED_LOAD_IF3]] ]
; CHECK-NEXT:    [[TMP23:%.*]] = extractelement <4 x i1> [[TMP1]], i64 3
; CHECK-NEXT:    br i1 [[TMP23]], label %[[PRED_LOAD_IF5:.*]], label %[[PRED_LOAD_CONTINUE6]]
; CHECK:       [[PRED_LOAD_IF5]]:
; CHECK-NEXT:    [[TMP24:%.*]] = extractelement <4 x i32> [[TMP28]], i64 3
; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP24]]
; CHECK-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
; CHECK-NEXT:    [[TMP27:%.*]] = insertelement <4 x i32> [[TMP22]], i32 [[TMP26]], i64 3
; CHECK-NEXT:    br label %[[PRED_LOAD_CONTINUE6]]
; CHECK:       [[PRED_LOAD_CONTINUE6]]:
; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = phi <4 x i32> [ [[TMP22]], %[[PRED_LOAD_CONTINUE4]] ], [ [[TMP27]], %[[PRED_LOAD_IF5]] ]
; CHECK-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer
; CHECK-NEXT:    [[TMP4]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; CHECK-NEXT:    br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP4]])
; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; CHECK-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; CHECK:       [[SCALAR_PH]]:
; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; CHECK-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP6]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; CHECK-NEXT:    br label %[[LOOP:.*]]
; CHECK:       [[LOOP]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ]
; CHECK-NEXT:    [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SUM_NEXT:%.*]], %[[LATCH]] ]
; CHECK-NEXT:    [[AND_IV:%.*]] = and i32 [[IV]], 1
; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND_IV]], 0
; CHECK-NEXT:    br i1 [[CMP]], label %[[THEN:.*]], label %[[LATCH]]
; CHECK:       [[THEN]]:
; CHECK-NEXT:    [[CLAMPED:%.*]] = urem i32 [[IV]], 16
; CHECK-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED]]
; CHECK-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; CHECK-NEXT:    br label %[[LATCH]]
; CHECK:       [[LATCH]]:
; CHECK-NEXT:    [[V:%.*]] = phi i32 [ [[LV]], %[[THEN]] ], [ 0, %[[LOOP]] ]
; CHECK-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[V]]
; CHECK-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT:    [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; CHECK-NEXT:    br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LATCH]] ], [ [[TMP6]], %[[MIDDLE_BLOCK]] ]
; CHECK-NEXT:    ret i32 [[SUM_NEXT_LCSSA]]
;
; IC4-LABEL: define i32 @clamped_load_predicated_ic_capped(
; IC4-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; IC4-NEXT:  [[ENTRY:.*]]:
; IC4-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 16
; IC4-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; IC4:       [[VECTOR_PH]]:
; IC4-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -1
; IC4-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 15
; IC4-NEXT:    br i1 [[TMP1]], label %[[SCALAR_PH]], label %[[VECTOR_PH1:.*]]
; IC4:       [[VECTOR_PH1]]:
; IC4-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 16
; IC4-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; IC4-NEXT:    br label %[[VECTOR_BODY:.*]]
; IC4:       [[VECTOR_BODY]]:
; IC4-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE33:.*]] ]
; IC4-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH1]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP19:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP20:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP21:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP22:%.*]], %[[PRED_LOAD_CONTINUE33]] ]
; IC4-NEXT:    [[STEP_ADD:%.*]] = add nuw <4 x i32> [[VEC_IND]], splat (i32 4)
; IC4-NEXT:    [[STEP_ADD_2:%.*]] = add nuw <4 x i32> [[STEP_ADD]], splat (i32 4)
; IC4-NEXT:    [[STEP_ADD_3:%.*]] = add nuw <4 x i32> [[STEP_ADD_2]], splat (i32 4)
; IC4-NEXT:    [[TMP3:%.*]] = and <4 x i32> [[VEC_IND]], splat (i32 1)
; IC4-NEXT:    [[TMP4:%.*]] = and <4 x i32> [[STEP_ADD]], splat (i32 1)
; IC4-NEXT:    [[TMP5:%.*]] = and <4 x i32> [[STEP_ADD_2]], splat (i32 1)
; IC4-NEXT:    [[TMP6:%.*]] = and <4 x i32> [[STEP_ADD_3]], splat (i32 1)
; IC4-NEXT:    [[TMP7:%.*]] = icmp eq <4 x i32> [[TMP3]], zeroinitializer
; IC4-NEXT:    [[TMP8:%.*]] = icmp eq <4 x i32> [[TMP4]], zeroinitializer
; IC4-NEXT:    [[TMP9:%.*]] = icmp eq <4 x i32> [[TMP5]], zeroinitializer
; IC4-NEXT:    [[TMP10:%.*]] = icmp eq <4 x i32> [[TMP6]], zeroinitializer
; IC4-NEXT:    [[TMP37:%.*]] = urem <4 x i32> [[VEC_IND]], splat (i32 16)
; IC4-NEXT:    [[TMP11:%.*]] = urem <4 x i32> [[STEP_ADD]], splat (i32 16)
; IC4-NEXT:    [[TMP12:%.*]] = urem <4 x i32> [[STEP_ADD_2]], splat (i32 16)
; IC4-NEXT:    [[TMP13:%.*]] = urem <4 x i32> [[STEP_ADD_3]], splat (i32 16)
; IC4-NEXT:    [[TMP14:%.*]] = extractelement <4 x i1> [[TMP7]], i64 0
; IC4-NEXT:    br i1 [[TMP14]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
; IC4:       [[PRED_LOAD_IF]]:
; IC4-NEXT:    [[TMP15:%.*]] = extractelement <4 x i32> [[TMP37]], i64 0
; IC4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP15]]
; IC4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
; IC4-NEXT:    [[TMP18:%.*]] = insertelement <4 x i32> poison, i32 [[TMP17]], i64 0
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE]]
; IC4:       [[PRED_LOAD_CONTINUE]]:
; IC4-NEXT:    [[TMP61:%.*]] = phi <4 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP18]], %[[PRED_LOAD_IF]] ]
; IC4-NEXT:    [[TMP85:%.*]] = extractelement <4 x i1> [[TMP7]], i64 1
; IC4-NEXT:    br i1 [[TMP85]], label %[[PRED_LOAD_IF4:.*]], label %[[PRED_LOAD_CONTINUE5:.*]]
; IC4:       [[PRED_LOAD_IF4]]:
; IC4-NEXT:    [[TMP109:%.*]] = extractelement <4 x i32> [[TMP37]], i64 1
; IC4-NEXT:    [[TMP110:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP109]]
; IC4-NEXT:    [[TMP111:%.*]] = load i32, ptr [[TMP110]], align 4
; IC4-NEXT:    [[TMP112:%.*]] = insertelement <4 x i32> [[TMP61]], i32 [[TMP111]], i64 1
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE5]]
; IC4:       [[PRED_LOAD_CONTINUE5]]:
; IC4-NEXT:    [[TMP25:%.*]] = phi <4 x i32> [ [[TMP61]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP112]], %[[PRED_LOAD_IF4]] ]
; IC4-NEXT:    [[TMP26:%.*]] = extractelement <4 x i1> [[TMP7]], i64 2
; IC4-NEXT:    br i1 [[TMP26]], label %[[PRED_LOAD_IF6:.*]], label %[[PRED_LOAD_CONTINUE7:.*]]
; IC4:       [[PRED_LOAD_IF6]]:
; IC4-NEXT:    [[TMP27:%.*]] = extractelement <4 x i32> [[TMP37]], i64 2
; IC4-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP27]]
; IC4-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
; IC4-NEXT:    [[TMP30:%.*]] = insertelement <4 x i32> [[TMP25]], i32 [[TMP29]], i64 2
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE7]]
; IC4:       [[PRED_LOAD_CONTINUE7]]:
; IC4-NEXT:    [[TMP31:%.*]] = phi <4 x i32> [ [[TMP25]], %[[PRED_LOAD_CONTINUE5]] ], [ [[TMP30]], %[[PRED_LOAD_IF6]] ]
; IC4-NEXT:    [[TMP32:%.*]] = extractelement <4 x i1> [[TMP7]], i64 3
; IC4-NEXT:    br i1 [[TMP32]], label %[[PRED_LOAD_IF8:.*]], label %[[PRED_LOAD_CONTINUE9:.*]]
; IC4:       [[PRED_LOAD_IF8]]:
; IC4-NEXT:    [[TMP33:%.*]] = extractelement <4 x i32> [[TMP37]], i64 3
; IC4-NEXT:    [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP33]]
; IC4-NEXT:    [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4
; IC4-NEXT:    [[TMP36:%.*]] = insertelement <4 x i32> [[TMP31]], i32 [[TMP35]], i64 3
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE9]]
; IC4:       [[PRED_LOAD_CONTINUE9]]:
; IC4-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = phi <4 x i32> [ [[TMP31]], %[[PRED_LOAD_CONTINUE7]] ], [ [[TMP36]], %[[PRED_LOAD_IF8]] ]
; IC4-NEXT:    [[TMP38:%.*]] = extractelement <4 x i1> [[TMP8]], i64 0
; IC4-NEXT:    br i1 [[TMP38]], label %[[PRED_LOAD_IF10:.*]], label %[[PRED_LOAD_CONTINUE11:.*]]
; IC4:       [[PRED_LOAD_IF10]]:
; IC4-NEXT:    [[TMP39:%.*]] = extractelement <4 x i32> [[TMP11]], i64 0
; IC4-NEXT:    [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP39]]
; IC4-NEXT:    [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4
; IC4-NEXT:    [[TMP42:%.*]] = insertelement <4 x i32> poison, i32 [[TMP41]], i64 0
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE11]]
; IC4:       [[PRED_LOAD_CONTINUE11]]:
; IC4-NEXT:    [[TMP43:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE9]] ], [ [[TMP42]], %[[PRED_LOAD_IF10]] ]
; IC4-NEXT:    [[TMP44:%.*]] = extractelement <4 x i1> [[TMP8]], i64 1
; IC4-NEXT:    br i1 [[TMP44]], label %[[PRED_LOAD_IF12:.*]], label %[[PRED_LOAD_CONTINUE13:.*]]
; IC4:       [[PRED_LOAD_IF12]]:
; IC4-NEXT:    [[TMP45:%.*]] = extractelement <4 x i32> [[TMP11]], i64 1
; IC4-NEXT:    [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP45]]
; IC4-NEXT:    [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4
; IC4-NEXT:    [[TMP48:%.*]] = insertelement <4 x i32> [[TMP43]], i32 [[TMP47]], i64 1
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE13]]
; IC4:       [[PRED_LOAD_CONTINUE13]]:
; IC4-NEXT:    [[TMP49:%.*]] = phi <4 x i32> [ [[TMP43]], %[[PRED_LOAD_CONTINUE11]] ], [ [[TMP48]], %[[PRED_LOAD_IF12]] ]
; IC4-NEXT:    [[TMP50:%.*]] = extractelement <4 x i1> [[TMP8]], i64 2
; IC4-NEXT:    br i1 [[TMP50]], label %[[PRED_LOAD_IF14:.*]], label %[[PRED_LOAD_CONTINUE15:.*]]
; IC4:       [[PRED_LOAD_IF14]]:
; IC4-NEXT:    [[TMP51:%.*]] = extractelement <4 x i32> [[TMP11]], i64 2
; IC4-NEXT:    [[TMP52:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP51]]
; IC4-NEXT:    [[TMP53:%.*]] = load i32, ptr [[TMP52]], align 4
; IC4-NEXT:    [[TMP54:%.*]] = insertelement <4 x i32> [[TMP49]], i32 [[TMP53]], i64 2
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE15]]
; IC4:       [[PRED_LOAD_CONTINUE15]]:
; IC4-NEXT:    [[TMP55:%.*]] = phi <4 x i32> [ [[TMP49]], %[[PRED_LOAD_CONTINUE13]] ], [ [[TMP54]], %[[PRED_LOAD_IF14]] ]
; IC4-NEXT:    [[TMP56:%.*]] = extractelement <4 x i1> [[TMP8]], i64 3
; IC4-NEXT:    br i1 [[TMP56]], label %[[PRED_LOAD_IF16:.*]], label %[[PRED_LOAD_CONTINUE17:.*]]
; IC4:       [[PRED_LOAD_IF16]]:
; IC4-NEXT:    [[TMP57:%.*]] = extractelement <4 x i32> [[TMP11]], i64 3
; IC4-NEXT:    [[TMP58:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP57]]
; IC4-NEXT:    [[TMP59:%.*]] = load i32, ptr [[TMP58]], align 4
; IC4-NEXT:    [[TMP60:%.*]] = insertelement <4 x i32> [[TMP55]], i32 [[TMP59]], i64 3
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE17]]
; IC4:       [[PRED_LOAD_CONTINUE17]]:
; IC4-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = phi <4 x i32> [ [[TMP55]], %[[PRED_LOAD_CONTINUE15]] ], [ [[TMP60]], %[[PRED_LOAD_IF16]] ]
; IC4-NEXT:    [[TMP62:%.*]] = extractelement <4 x i1> [[TMP9]], i64 0
; IC4-NEXT:    br i1 [[TMP62]], label %[[PRED_LOAD_IF18:.*]], label %[[PRED_LOAD_CONTINUE19:.*]]
; IC4:       [[PRED_LOAD_IF18]]:
; IC4-NEXT:    [[TMP63:%.*]] = extractelement <4 x i32> [[TMP12]], i64 0
; IC4-NEXT:    [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP63]]
; IC4-NEXT:    [[TMP65:%.*]] = load i32, ptr [[TMP64]], align 4
; IC4-NEXT:    [[TMP66:%.*]] = insertelement <4 x i32> poison, i32 [[TMP65]], i64 0
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE19]]
; IC4:       [[PRED_LOAD_CONTINUE19]]:
; IC4-NEXT:    [[TMP67:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE17]] ], [ [[TMP66]], %[[PRED_LOAD_IF18]] ]
; IC4-NEXT:    [[TMP68:%.*]] = extractelement <4 x i1> [[TMP9]], i64 1
; IC4-NEXT:    br i1 [[TMP68]], label %[[PRED_LOAD_IF20:.*]], label %[[PRED_LOAD_CONTINUE21:.*]]
; IC4:       [[PRED_LOAD_IF20]]:
; IC4-NEXT:    [[TMP69:%.*]] = extractelement <4 x i32> [[TMP12]], i64 1
; IC4-NEXT:    [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP69]]
; IC4-NEXT:    [[TMP71:%.*]] = load i32, ptr [[TMP70]], align 4
; IC4-NEXT:    [[TMP72:%.*]] = insertelement <4 x i32> [[TMP67]], i32 [[TMP71]], i64 1
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE21]]
; IC4:       [[PRED_LOAD_CONTINUE21]]:
; IC4-NEXT:    [[TMP73:%.*]] = phi <4 x i32> [ [[TMP67]], %[[PRED_LOAD_CONTINUE19]] ], [ [[TMP72]], %[[PRED_LOAD_IF20]] ]
; IC4-NEXT:    [[TMP74:%.*]] = extractelement <4 x i1> [[TMP9]], i64 2
; IC4-NEXT:    br i1 [[TMP74]], label %[[PRED_LOAD_IF22:.*]], label %[[PRED_LOAD_CONTINUE23:.*]]
; IC4:       [[PRED_LOAD_IF22]]:
; IC4-NEXT:    [[TMP75:%.*]] = extractelement <4 x i32> [[TMP12]], i64 2
; IC4-NEXT:    [[TMP76:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP75]]
; IC4-NEXT:    [[TMP77:%.*]] = load i32, ptr [[TMP76]], align 4
; IC4-NEXT:    [[TMP78:%.*]] = insertelement <4 x i32> [[TMP73]], i32 [[TMP77]], i64 2
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE23]]
; IC4:       [[PRED_LOAD_CONTINUE23]]:
; IC4-NEXT:    [[TMP79:%.*]] = phi <4 x i32> [ [[TMP73]], %[[PRED_LOAD_CONTINUE21]] ], [ [[TMP78]], %[[PRED_LOAD_IF22]] ]
; IC4-NEXT:    [[TMP80:%.*]] = extractelement <4 x i1> [[TMP9]], i64 3
; IC4-NEXT:    br i1 [[TMP80]], label %[[PRED_LOAD_IF24:.*]], label %[[PRED_LOAD_CONTINUE25:.*]]
; IC4:       [[PRED_LOAD_IF24]]:
; IC4-NEXT:    [[TMP81:%.*]] = extractelement <4 x i32> [[TMP12]], i64 3
; IC4-NEXT:    [[TMP82:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP81]]
; IC4-NEXT:    [[TMP83:%.*]] = load i32, ptr [[TMP82]], align 4
; IC4-NEXT:    [[TMP84:%.*]] = insertelement <4 x i32> [[TMP79]], i32 [[TMP83]], i64 3
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE25]]
; IC4:       [[PRED_LOAD_CONTINUE25]]:
; IC4-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = phi <4 x i32> [ [[TMP79]], %[[PRED_LOAD_CONTINUE23]] ], [ [[TMP84]], %[[PRED_LOAD_IF24]] ]
; IC4-NEXT:    [[TMP86:%.*]] = extractelement <4 x i1> [[TMP10]], i64 0
; IC4-NEXT:    br i1 [[TMP86]], label %[[PRED_LOAD_IF26:.*]], label %[[PRED_LOAD_CONTINUE27:.*]]
; IC4:       [[PRED_LOAD_IF26]]:
; IC4-NEXT:    [[TMP87:%.*]] = extractelement <4 x i32> [[TMP13]], i64 0
; IC4-NEXT:    [[TMP88:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP87]]
; IC4-NEXT:    [[TMP89:%.*]] = load i32, ptr [[TMP88]], align 4
; IC4-NEXT:    [[TMP90:%.*]] = insertelement <4 x i32> poison, i32 [[TMP89]], i64 0
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE27]]
; IC4:       [[PRED_LOAD_CONTINUE27]]:
; IC4-NEXT:    [[TMP91:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE25]] ], [ [[TMP90]], %[[PRED_LOAD_IF26]] ]
; IC4-NEXT:    [[TMP92:%.*]] = extractelement <4 x i1> [[TMP10]], i64 1
; IC4-NEXT:    br i1 [[TMP92]], label %[[PRED_LOAD_IF28:.*]], label %[[PRED_LOAD_CONTINUE29:.*]]
; IC4:       [[PRED_LOAD_IF28]]:
; IC4-NEXT:    [[TMP93:%.*]] = extractelement <4 x i32> [[TMP13]], i64 1
; IC4-NEXT:    [[TMP94:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP93]]
; IC4-NEXT:    [[TMP95:%.*]] = load i32, ptr [[TMP94]], align 4
; IC4-NEXT:    [[TMP96:%.*]] = insertelement <4 x i32> [[TMP91]], i32 [[TMP95]], i64 1
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE29]]
; IC4:       [[PRED_LOAD_CONTINUE29]]:
; IC4-NEXT:    [[TMP97:%.*]] = phi <4 x i32> [ [[TMP91]], %[[PRED_LOAD_CONTINUE27]] ], [ [[TMP96]], %[[PRED_LOAD_IF28]] ]
; IC4-NEXT:    [[TMP98:%.*]] = extractelement <4 x i1> [[TMP10]], i64 2
; IC4-NEXT:    br i1 [[TMP98]], label %[[PRED_LOAD_IF30:.*]], label %[[PRED_LOAD_CONTINUE31:.*]]
; IC4:       [[PRED_LOAD_IF30]]:
; IC4-NEXT:    [[TMP99:%.*]] = extractelement <4 x i32> [[TMP13]], i64 2
; IC4-NEXT:    [[TMP100:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP99]]
; IC4-NEXT:    [[TMP101:%.*]] = load i32, ptr [[TMP100]], align 4
; IC4-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> [[TMP97]], i32 [[TMP101]], i64 2
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE31]]
; IC4:       [[PRED_LOAD_CONTINUE31]]:
; IC4-NEXT:    [[TMP103:%.*]] = phi <4 x i32> [ [[TMP97]], %[[PRED_LOAD_CONTINUE29]] ], [ [[TMP102]], %[[PRED_LOAD_IF30]] ]
; IC4-NEXT:    [[TMP104:%.*]] = extractelement <4 x i1> [[TMP10]], i64 3
; IC4-NEXT:    br i1 [[TMP104]], label %[[PRED_LOAD_IF32:.*]], label %[[PRED_LOAD_CONTINUE33]]
; IC4:       [[PRED_LOAD_IF32]]:
; IC4-NEXT:    [[TMP105:%.*]] = extractelement <4 x i32> [[TMP13]], i64 3
; IC4-NEXT:    [[TMP106:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP105]]
; IC4-NEXT:    [[TMP107:%.*]] = load i32, ptr [[TMP106]], align 4
; IC4-NEXT:    [[TMP108:%.*]] = insertelement <4 x i32> [[TMP103]], i32 [[TMP107]], i64 3
; IC4-NEXT:    br label %[[PRED_LOAD_CONTINUE33]]
; IC4:       [[PRED_LOAD_CONTINUE33]]:
; IC4-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = phi <4 x i32> [ [[TMP103]], %[[PRED_LOAD_CONTINUE31]] ], [ [[TMP108]], %[[PRED_LOAD_IF32]] ]
; IC4-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP7]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer
; IC4-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP8]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer
; IC4-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP9]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer
; IC4-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP10]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer
; IC4-NEXT:    [[TMP19]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]
; IC4-NEXT:    [[TMP20]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]
; IC4-NEXT:    [[TMP21]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]
; IC4-NEXT:    [[TMP22]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]
; IC4-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 16
; IC4-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[STEP_ADD_3]], splat (i32 4)
; IC4-NEXT:    [[TMP23:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; IC4-NEXT:    br i1 [[TMP23]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
; IC4:       [[MIDDLE_BLOCK]]:
; IC4-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP20]], [[TMP19]]
; IC4-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP21]], [[BIN_RDX]]
; IC4-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP22]], [[BIN_RDX10]]
; IC4-NEXT:    [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX11]])
; IC4-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; IC4-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; IC4:       [[SCALAR_PH]]:
; IC4-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; IC4-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP24]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; IC4-NEXT:    br label %[[LOOP:.*]]
; IC4:       [[LOOP]]:
; IC4-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ]
; IC4-NEXT:    [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SUM_NEXT:%.*]], %[[LATCH]] ]
; IC4-NEXT:    [[AND_IV:%.*]] = and i32 [[IV]], 1
; IC4-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND_IV]], 0
; IC4-NEXT:    br i1 [[CMP]], label %[[THEN:.*]], label %[[LATCH]]
; IC4:       [[THEN]]:
; IC4-NEXT:    [[CLAMPED:%.*]] = urem i32 [[IV]], 16
; IC4-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED]]
; IC4-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; IC4-NEXT:    br label %[[LATCH]]
; IC4:       [[LATCH]]:
; IC4-NEXT:    [[V:%.*]] = phi i32 [ [[LV]], %[[THEN]] ], [ 0, %[[LOOP]] ]
; IC4-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[V]]
; IC4-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1
; IC4-NEXT:    [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; IC4-NEXT:    br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]
; IC4:       [[EXIT]]:
; IC4-NEXT:    [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LATCH]] ], [ [[TMP24]], %[[MIDDLE_BLOCK]] ]
; IC4-NEXT:    ret i32 [[SUM_NEXT_LCSSA]]
;
; IC8-LABEL: define i32 @clamped_load_predicated_ic_capped(
; IC8-SAME: ptr [[A:%.*]], i32 [[N:%.*]]) {
; IC8-NEXT:  [[ENTRY:.*]]:
; IC8-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 32
; IC8-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; IC8:       [[VECTOR_PH]]:
; IC8-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -1
; IC8-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[TMP0]], 15
; IC8-NEXT:    br i1 [[TMP1]], label %[[SCALAR_PH]], label %[[VECTOR_PH1:.*]]
; IC8:       [[VECTOR_PH1]]:
; IC8-NEXT:    [[N_MOD_VF:%.*]] = urem i32 [[N]], 32
; IC8-NEXT:    [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
; IC8-NEXT:    br label %[[VECTOR_BODY:.*]]
; IC8:       [[VECTOR_BODY]]:
; IC8-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE69:.*]] ]
; IC8-NEXT:    [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH1]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP19:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI1:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP20:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP21:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP22:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP222:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP223:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP224:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP225:%.*]], %[[PRED_LOAD_CONTINUE69]] ]
; IC8-NEXT:    [[STEP_ADD:%.*]] = add nuw <4 x i32> [[VEC_IND]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_2:%.*]] = add nuw <4 x i32> [[STEP_ADD]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_3:%.*]] = add nuw <4 x i32> [[STEP_ADD_2]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_4:%.*]] = add nuw <4 x i32> [[STEP_ADD_3]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_5:%.*]] = add nuw <4 x i32> [[STEP_ADD_4]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_6:%.*]] = add nuw <4 x i32> [[STEP_ADD_5]], splat (i32 4)
; IC8-NEXT:    [[STEP_ADD_7:%.*]] = add nuw <4 x i32> [[STEP_ADD_6]], splat (i32 4)
; IC8-NEXT:    [[TMP3:%.*]] = and <4 x i32> [[VEC_IND]], splat (i32 1)
; IC8-NEXT:    [[TMP4:%.*]] = and <4 x i32> [[STEP_ADD]], splat (i32 1)
; IC8-NEXT:    [[TMP5:%.*]] = and <4 x i32> [[STEP_ADD_2]], splat (i32 1)
; IC8-NEXT:    [[TMP6:%.*]] = and <4 x i32> [[STEP_ADD_3]], splat (i32 1)
; IC8-NEXT:    [[TMP11:%.*]] = and <4 x i32> [[STEP_ADD_4]], splat (i32 1)
; IC8-NEXT:    [[TMP12:%.*]] = and <4 x i32> [[STEP_ADD_5]], splat (i32 1)
; IC8-NEXT:    [[TMP13:%.*]] = and <4 x i32> [[STEP_ADD_6]], splat (i32 1)
; IC8-NEXT:    [[TMP49:%.*]] = and <4 x i32> [[STEP_ADD_7]], splat (i32 1)
; IC8-NEXT:    [[TMP7:%.*]] = icmp eq <4 x i32> [[TMP3]], zeroinitializer
; IC8-NEXT:    [[TMP8:%.*]] = icmp eq <4 x i32> [[TMP4]], zeroinitializer
; IC8-NEXT:    [[TMP9:%.*]] = icmp eq <4 x i32> [[TMP5]], zeroinitializer
; IC8-NEXT:    [[TMP10:%.*]] = icmp eq <4 x i32> [[TMP6]], zeroinitializer
; IC8-NEXT:    [[TMP14:%.*]] = icmp eq <4 x i32> [[TMP11]], zeroinitializer
; IC8-NEXT:    [[TMP15:%.*]] = icmp eq <4 x i32> [[TMP12]], zeroinitializer
; IC8-NEXT:    [[TMP16:%.*]] = icmp eq <4 x i32> [[TMP13]], zeroinitializer
; IC8-NEXT:    [[TMP17:%.*]] = icmp eq <4 x i32> [[TMP49]], zeroinitializer
; IC8-NEXT:    [[TMP18:%.*]] = urem <4 x i32> [[VEC_IND]], splat (i32 16)
; IC8-NEXT:    [[TMP73:%.*]] = urem <4 x i32> [[STEP_ADD]], splat (i32 16)
; IC8-NEXT:    [[TMP97:%.*]] = urem <4 x i32> [[STEP_ADD_2]], splat (i32 16)
; IC8-NEXT:    [[TMP121:%.*]] = urem <4 x i32> [[STEP_ADD_3]], splat (i32 16)
; IC8-NEXT:    [[TMP218:%.*]] = urem <4 x i32> [[STEP_ADD_4]], splat (i32 16)
; IC8-NEXT:    [[TMP219:%.*]] = urem <4 x i32> [[STEP_ADD_5]], splat (i32 16)
; IC8-NEXT:    [[TMP24:%.*]] = urem <4 x i32> [[STEP_ADD_6]], splat (i32 16)
; IC8-NEXT:    [[TMP25:%.*]] = urem <4 x i32> [[STEP_ADD_7]], splat (i32 16)
; IC8-NEXT:    [[TMP26:%.*]] = extractelement <4 x i1> [[TMP7]], i64 0
; IC8-NEXT:    br i1 [[TMP26]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
; IC8:       [[PRED_LOAD_IF]]:
; IC8-NEXT:    [[TMP27:%.*]] = extractelement <4 x i32> [[TMP18]], i64 0
; IC8-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP27]]
; IC8-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
; IC8-NEXT:    [[TMP30:%.*]] = insertelement <4 x i32> poison, i32 [[TMP29]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE]]
; IC8:       [[PRED_LOAD_CONTINUE]]:
; IC8-NEXT:    [[TMP31:%.*]] = phi <4 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP30]], %[[PRED_LOAD_IF]] ]
; IC8-NEXT:    [[TMP32:%.*]] = extractelement <4 x i1> [[TMP7]], i64 1
; IC8-NEXT:    br i1 [[TMP32]], label %[[PRED_LOAD_IF8:.*]], label %[[PRED_LOAD_CONTINUE9:.*]]
; IC8:       [[PRED_LOAD_IF8]]:
; IC8-NEXT:    [[TMP33:%.*]] = extractelement <4 x i32> [[TMP18]], i64 1
; IC8-NEXT:    [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP33]]
; IC8-NEXT:    [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4
; IC8-NEXT:    [[TMP36:%.*]] = insertelement <4 x i32> [[TMP31]], i32 [[TMP35]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE9]]
; IC8:       [[PRED_LOAD_CONTINUE9]]:
; IC8-NEXT:    [[TMP37:%.*]] = phi <4 x i32> [ [[TMP31]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP36]], %[[PRED_LOAD_IF8]] ]
; IC8-NEXT:    [[TMP38:%.*]] = extractelement <4 x i1> [[TMP7]], i64 2
; IC8-NEXT:    br i1 [[TMP38]], label %[[PRED_LOAD_IF10:.*]], label %[[PRED_LOAD_CONTINUE11:.*]]
; IC8:       [[PRED_LOAD_IF10]]:
; IC8-NEXT:    [[TMP39:%.*]] = extractelement <4 x i32> [[TMP18]], i64 2
; IC8-NEXT:    [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP39]]
; IC8-NEXT:    [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4
; IC8-NEXT:    [[TMP42:%.*]] = insertelement <4 x i32> [[TMP37]], i32 [[TMP41]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE11]]
; IC8:       [[PRED_LOAD_CONTINUE11]]:
; IC8-NEXT:    [[TMP43:%.*]] = phi <4 x i32> [ [[TMP37]], %[[PRED_LOAD_CONTINUE9]] ], [ [[TMP42]], %[[PRED_LOAD_IF10]] ]
; IC8-NEXT:    [[TMP44:%.*]] = extractelement <4 x i1> [[TMP7]], i64 3
; IC8-NEXT:    br i1 [[TMP44]], label %[[PRED_LOAD_IF12:.*]], label %[[PRED_LOAD_CONTINUE13:.*]]
; IC8:       [[PRED_LOAD_IF12]]:
; IC8-NEXT:    [[TMP45:%.*]] = extractelement <4 x i32> [[TMP18]], i64 3
; IC8-NEXT:    [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP45]]
; IC8-NEXT:    [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4
; IC8-NEXT:    [[TMP48:%.*]] = insertelement <4 x i32> [[TMP43]], i32 [[TMP47]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE13]]
; IC8:       [[PRED_LOAD_CONTINUE13]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = phi <4 x i32> [ [[TMP43]], %[[PRED_LOAD_CONTINUE11]] ], [ [[TMP48]], %[[PRED_LOAD_IF12]] ]
; IC8-NEXT:    [[TMP50:%.*]] = extractelement <4 x i1> [[TMP8]], i64 0
; IC8-NEXT:    br i1 [[TMP50]], label %[[PRED_LOAD_IF14:.*]], label %[[PRED_LOAD_CONTINUE15:.*]]
; IC8:       [[PRED_LOAD_IF14]]:
; IC8-NEXT:    [[TMP51:%.*]] = extractelement <4 x i32> [[TMP73]], i64 0
; IC8-NEXT:    [[TMP52:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP51]]
; IC8-NEXT:    [[TMP53:%.*]] = load i32, ptr [[TMP52]], align 4
; IC8-NEXT:    [[TMP54:%.*]] = insertelement <4 x i32> poison, i32 [[TMP53]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE15]]
; IC8:       [[PRED_LOAD_CONTINUE15]]:
; IC8-NEXT:    [[TMP55:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE13]] ], [ [[TMP54]], %[[PRED_LOAD_IF14]] ]
; IC8-NEXT:    [[TMP56:%.*]] = extractelement <4 x i1> [[TMP8]], i64 1
; IC8-NEXT:    br i1 [[TMP56]], label %[[PRED_LOAD_IF16:.*]], label %[[PRED_LOAD_CONTINUE17:.*]]
; IC8:       [[PRED_LOAD_IF16]]:
; IC8-NEXT:    [[TMP57:%.*]] = extractelement <4 x i32> [[TMP73]], i64 1
; IC8-NEXT:    [[TMP58:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP57]]
; IC8-NEXT:    [[TMP59:%.*]] = load i32, ptr [[TMP58]], align 4
; IC8-NEXT:    [[TMP60:%.*]] = insertelement <4 x i32> [[TMP55]], i32 [[TMP59]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE17]]
; IC8:       [[PRED_LOAD_CONTINUE17]]:
; IC8-NEXT:    [[TMP61:%.*]] = phi <4 x i32> [ [[TMP55]], %[[PRED_LOAD_CONTINUE15]] ], [ [[TMP60]], %[[PRED_LOAD_IF16]] ]
; IC8-NEXT:    [[TMP62:%.*]] = extractelement <4 x i1> [[TMP8]], i64 2
; IC8-NEXT:    br i1 [[TMP62]], label %[[PRED_LOAD_IF18:.*]], label %[[PRED_LOAD_CONTINUE19:.*]]
; IC8:       [[PRED_LOAD_IF18]]:
; IC8-NEXT:    [[TMP63:%.*]] = extractelement <4 x i32> [[TMP73]], i64 2
; IC8-NEXT:    [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP63]]
; IC8-NEXT:    [[TMP65:%.*]] = load i32, ptr [[TMP64]], align 4
; IC8-NEXT:    [[TMP66:%.*]] = insertelement <4 x i32> [[TMP61]], i32 [[TMP65]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE19]]
; IC8:       [[PRED_LOAD_CONTINUE19]]:
; IC8-NEXT:    [[TMP67:%.*]] = phi <4 x i32> [ [[TMP61]], %[[PRED_LOAD_CONTINUE17]] ], [ [[TMP66]], %[[PRED_LOAD_IF18]] ]
; IC8-NEXT:    [[TMP68:%.*]] = extractelement <4 x i1> [[TMP8]], i64 3
; IC8-NEXT:    br i1 [[TMP68]], label %[[PRED_LOAD_IF20:.*]], label %[[PRED_LOAD_CONTINUE21:.*]]
; IC8:       [[PRED_LOAD_IF20]]:
; IC8-NEXT:    [[TMP69:%.*]] = extractelement <4 x i32> [[TMP73]], i64 3
; IC8-NEXT:    [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP69]]
; IC8-NEXT:    [[TMP71:%.*]] = load i32, ptr [[TMP70]], align 4
; IC8-NEXT:    [[TMP72:%.*]] = insertelement <4 x i32> [[TMP67]], i32 [[TMP71]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE21]]
; IC8:       [[PRED_LOAD_CONTINUE21]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD4:%.*]] = phi <4 x i32> [ [[TMP67]], %[[PRED_LOAD_CONTINUE19]] ], [ [[TMP72]], %[[PRED_LOAD_IF20]] ]
; IC8-NEXT:    [[TMP74:%.*]] = extractelement <4 x i1> [[TMP9]], i64 0
; IC8-NEXT:    br i1 [[TMP74]], label %[[PRED_LOAD_IF22:.*]], label %[[PRED_LOAD_CONTINUE23:.*]]
; IC8:       [[PRED_LOAD_IF22]]:
; IC8-NEXT:    [[TMP75:%.*]] = extractelement <4 x i32> [[TMP97]], i64 0
; IC8-NEXT:    [[TMP76:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP75]]
; IC8-NEXT:    [[TMP77:%.*]] = load i32, ptr [[TMP76]], align 4
; IC8-NEXT:    [[TMP78:%.*]] = insertelement <4 x i32> poison, i32 [[TMP77]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE23]]
; IC8:       [[PRED_LOAD_CONTINUE23]]:
; IC8-NEXT:    [[TMP79:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE21]] ], [ [[TMP78]], %[[PRED_LOAD_IF22]] ]
; IC8-NEXT:    [[TMP80:%.*]] = extractelement <4 x i1> [[TMP9]], i64 1
; IC8-NEXT:    br i1 [[TMP80]], label %[[PRED_LOAD_IF24:.*]], label %[[PRED_LOAD_CONTINUE25:.*]]
; IC8:       [[PRED_LOAD_IF24]]:
; IC8-NEXT:    [[TMP81:%.*]] = extractelement <4 x i32> [[TMP97]], i64 1
; IC8-NEXT:    [[TMP82:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP81]]
; IC8-NEXT:    [[TMP83:%.*]] = load i32, ptr [[TMP82]], align 4
; IC8-NEXT:    [[TMP84:%.*]] = insertelement <4 x i32> [[TMP79]], i32 [[TMP83]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE25]]
; IC8:       [[PRED_LOAD_CONTINUE25]]:
; IC8-NEXT:    [[TMP85:%.*]] = phi <4 x i32> [ [[TMP79]], %[[PRED_LOAD_CONTINUE23]] ], [ [[TMP84]], %[[PRED_LOAD_IF24]] ]
; IC8-NEXT:    [[TMP86:%.*]] = extractelement <4 x i1> [[TMP9]], i64 2
; IC8-NEXT:    br i1 [[TMP86]], label %[[PRED_LOAD_IF26:.*]], label %[[PRED_LOAD_CONTINUE27:.*]]
; IC8:       [[PRED_LOAD_IF26]]:
; IC8-NEXT:    [[TMP87:%.*]] = extractelement <4 x i32> [[TMP97]], i64 2
; IC8-NEXT:    [[TMP88:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP87]]
; IC8-NEXT:    [[TMP89:%.*]] = load i32, ptr [[TMP88]], align 4
; IC8-NEXT:    [[TMP90:%.*]] = insertelement <4 x i32> [[TMP85]], i32 [[TMP89]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE27]]
; IC8:       [[PRED_LOAD_CONTINUE27]]:
; IC8-NEXT:    [[TMP91:%.*]] = phi <4 x i32> [ [[TMP85]], %[[PRED_LOAD_CONTINUE25]] ], [ [[TMP90]], %[[PRED_LOAD_IF26]] ]
; IC8-NEXT:    [[TMP92:%.*]] = extractelement <4 x i1> [[TMP9]], i64 3
; IC8-NEXT:    br i1 [[TMP92]], label %[[PRED_LOAD_IF28:.*]], label %[[PRED_LOAD_CONTINUE29:.*]]
; IC8:       [[PRED_LOAD_IF28]]:
; IC8-NEXT:    [[TMP93:%.*]] = extractelement <4 x i32> [[TMP97]], i64 3
; IC8-NEXT:    [[TMP94:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP93]]
; IC8-NEXT:    [[TMP95:%.*]] = load i32, ptr [[TMP94]], align 4
; IC8-NEXT:    [[TMP96:%.*]] = insertelement <4 x i32> [[TMP91]], i32 [[TMP95]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE29]]
; IC8:       [[PRED_LOAD_CONTINUE29]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD5:%.*]] = phi <4 x i32> [ [[TMP91]], %[[PRED_LOAD_CONTINUE27]] ], [ [[TMP96]], %[[PRED_LOAD_IF28]] ]
; IC8-NEXT:    [[TMP98:%.*]] = extractelement <4 x i1> [[TMP10]], i64 0
; IC8-NEXT:    br i1 [[TMP98]], label %[[PRED_LOAD_IF30:.*]], label %[[PRED_LOAD_CONTINUE31:.*]]
; IC8:       [[PRED_LOAD_IF30]]:
; IC8-NEXT:    [[TMP99:%.*]] = extractelement <4 x i32> [[TMP121]], i64 0
; IC8-NEXT:    [[TMP100:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP99]]
; IC8-NEXT:    [[TMP101:%.*]] = load i32, ptr [[TMP100]], align 4
; IC8-NEXT:    [[TMP102:%.*]] = insertelement <4 x i32> poison, i32 [[TMP101]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE31]]
; IC8:       [[PRED_LOAD_CONTINUE31]]:
; IC8-NEXT:    [[TMP103:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE29]] ], [ [[TMP102]], %[[PRED_LOAD_IF30]] ]
; IC8-NEXT:    [[TMP104:%.*]] = extractelement <4 x i1> [[TMP10]], i64 1
; IC8-NEXT:    br i1 [[TMP104]], label %[[PRED_LOAD_IF32:.*]], label %[[PRED_LOAD_CONTINUE33:.*]]
; IC8:       [[PRED_LOAD_IF32]]:
; IC8-NEXT:    [[TMP105:%.*]] = extractelement <4 x i32> [[TMP121]], i64 1
; IC8-NEXT:    [[TMP106:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP105]]
; IC8-NEXT:    [[TMP107:%.*]] = load i32, ptr [[TMP106]], align 4
; IC8-NEXT:    [[TMP108:%.*]] = insertelement <4 x i32> [[TMP103]], i32 [[TMP107]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE33]]
; IC8:       [[PRED_LOAD_CONTINUE33]]:
; IC8-NEXT:    [[TMP109:%.*]] = phi <4 x i32> [ [[TMP103]], %[[PRED_LOAD_CONTINUE31]] ], [ [[TMP108]], %[[PRED_LOAD_IF32]] ]
; IC8-NEXT:    [[TMP110:%.*]] = extractelement <4 x i1> [[TMP10]], i64 2
; IC8-NEXT:    br i1 [[TMP110]], label %[[PRED_LOAD_IF34:.*]], label %[[PRED_LOAD_CONTINUE35:.*]]
; IC8:       [[PRED_LOAD_IF34]]:
; IC8-NEXT:    [[TMP111:%.*]] = extractelement <4 x i32> [[TMP121]], i64 2
; IC8-NEXT:    [[TMP112:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP111]]
; IC8-NEXT:    [[TMP113:%.*]] = load i32, ptr [[TMP112]], align 4
; IC8-NEXT:    [[TMP114:%.*]] = insertelement <4 x i32> [[TMP109]], i32 [[TMP113]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE35]]
; IC8:       [[PRED_LOAD_CONTINUE35]]:
; IC8-NEXT:    [[TMP115:%.*]] = phi <4 x i32> [ [[TMP109]], %[[PRED_LOAD_CONTINUE33]] ], [ [[TMP114]], %[[PRED_LOAD_IF34]] ]
; IC8-NEXT:    [[TMP116:%.*]] = extractelement <4 x i1> [[TMP10]], i64 3
; IC8-NEXT:    br i1 [[TMP116]], label %[[PRED_LOAD_IF36:.*]], label %[[PRED_LOAD_CONTINUE37:.*]]
; IC8:       [[PRED_LOAD_IF36]]:
; IC8-NEXT:    [[TMP117:%.*]] = extractelement <4 x i32> [[TMP121]], i64 3
; IC8-NEXT:    [[TMP118:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP117]]
; IC8-NEXT:    [[TMP119:%.*]] = load i32, ptr [[TMP118]], align 4
; IC8-NEXT:    [[TMP120:%.*]] = insertelement <4 x i32> [[TMP115]], i32 [[TMP119]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE37]]
; IC8:       [[PRED_LOAD_CONTINUE37]]:
; IC8-NEXT:    [[WIDE_MASKED_LOAD6:%.*]] = phi <4 x i32> [ [[TMP115]], %[[PRED_LOAD_CONTINUE35]] ], [ [[TMP120]], %[[PRED_LOAD_IF36]] ]
; IC8-NEXT:    [[TMP122:%.*]] = extractelement <4 x i1> [[TMP14]], i64 0
; IC8-NEXT:    br i1 [[TMP122]], label %[[PRED_LOAD_IF38:.*]], label %[[PRED_LOAD_CONTINUE39:.*]]
; IC8:       [[PRED_LOAD_IF38]]:
; IC8-NEXT:    [[TMP123:%.*]] = extractelement <4 x i32> [[TMP218]], i64 0
; IC8-NEXT:    [[TMP124:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP123]]
; IC8-NEXT:    [[TMP125:%.*]] = load i32, ptr [[TMP124]], align 4
; IC8-NEXT:    [[TMP126:%.*]] = insertelement <4 x i32> poison, i32 [[TMP125]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE39]]
; IC8:       [[PRED_LOAD_CONTINUE39]]:
; IC8-NEXT:    [[TMP127:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE37]] ], [ [[TMP126]], %[[PRED_LOAD_IF38]] ]
; IC8-NEXT:    [[TMP128:%.*]] = extractelement <4 x i1> [[TMP14]], i64 1
; IC8-NEXT:    br i1 [[TMP128]], label %[[PRED_LOAD_IF40:.*]], label %[[PRED_LOAD_CONTINUE41:.*]]
; IC8:       [[PRED_LOAD_IF40]]:
; IC8-NEXT:    [[TMP129:%.*]] = extractelement <4 x i32> [[TMP218]], i64 1
; IC8-NEXT:    [[TMP130:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP129]]
; IC8-NEXT:    [[TMP131:%.*]] = load i32, ptr [[TMP130]], align 4
; IC8-NEXT:    [[TMP132:%.*]] = insertelement <4 x i32> [[TMP127]], i32 [[TMP131]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE41]]
; IC8:       [[PRED_LOAD_CONTINUE41]]:
; IC8-NEXT:    [[TMP133:%.*]] = phi <4 x i32> [ [[TMP127]], %[[PRED_LOAD_CONTINUE39]] ], [ [[TMP132]], %[[PRED_LOAD_IF40]] ]
; IC8-NEXT:    [[TMP134:%.*]] = extractelement <4 x i1> [[TMP14]], i64 2
; IC8-NEXT:    br i1 [[TMP134]], label %[[PRED_LOAD_IF42:.*]], label %[[PRED_LOAD_CONTINUE43:.*]]
; IC8:       [[PRED_LOAD_IF42]]:
; IC8-NEXT:    [[TMP135:%.*]] = extractelement <4 x i32> [[TMP218]], i64 2
; IC8-NEXT:    [[TMP136:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP135]]
; IC8-NEXT:    [[TMP137:%.*]] = load i32, ptr [[TMP136]], align 4
; IC8-NEXT:    [[TMP138:%.*]] = insertelement <4 x i32> [[TMP133]], i32 [[TMP137]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE43]]
; IC8:       [[PRED_LOAD_CONTINUE43]]:
; IC8-NEXT:    [[TMP139:%.*]] = phi <4 x i32> [ [[TMP133]], %[[PRED_LOAD_CONTINUE41]] ], [ [[TMP138]], %[[PRED_LOAD_IF42]] ]
; IC8-NEXT:    [[TMP140:%.*]] = extractelement <4 x i1> [[TMP14]], i64 3
; IC8-NEXT:    br i1 [[TMP140]], label %[[PRED_LOAD_IF44:.*]], label %[[PRED_LOAD_CONTINUE45:.*]]
; IC8:       [[PRED_LOAD_IF44]]:
; IC8-NEXT:    [[TMP141:%.*]] = extractelement <4 x i32> [[TMP218]], i64 3
; IC8-NEXT:    [[TMP142:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP141]]
; IC8-NEXT:    [[TMP143:%.*]] = load i32, ptr [[TMP142]], align 4
; IC8-NEXT:    [[TMP144:%.*]] = insertelement <4 x i32> [[TMP139]], i32 [[TMP143]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE45]]
; IC8:       [[PRED_LOAD_CONTINUE45]]:
; IC8-NEXT:    [[TMP145:%.*]] = phi <4 x i32> [ [[TMP139]], %[[PRED_LOAD_CONTINUE43]] ], [ [[TMP144]], %[[PRED_LOAD_IF44]] ]
; IC8-NEXT:    [[TMP146:%.*]] = extractelement <4 x i1> [[TMP15]], i64 0
; IC8-NEXT:    br i1 [[TMP146]], label %[[PRED_LOAD_IF46:.*]], label %[[PRED_LOAD_CONTINUE47:.*]]
; IC8:       [[PRED_LOAD_IF46]]:
; IC8-NEXT:    [[TMP147:%.*]] = extractelement <4 x i32> [[TMP219]], i64 0
; IC8-NEXT:    [[TMP148:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP147]]
; IC8-NEXT:    [[TMP149:%.*]] = load i32, ptr [[TMP148]], align 4
; IC8-NEXT:    [[TMP150:%.*]] = insertelement <4 x i32> poison, i32 [[TMP149]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE47]]
; IC8:       [[PRED_LOAD_CONTINUE47]]:
; IC8-NEXT:    [[TMP151:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE45]] ], [ [[TMP150]], %[[PRED_LOAD_IF46]] ]
; IC8-NEXT:    [[TMP152:%.*]] = extractelement <4 x i1> [[TMP15]], i64 1
; IC8-NEXT:    br i1 [[TMP152]], label %[[PRED_LOAD_IF48:.*]], label %[[PRED_LOAD_CONTINUE49:.*]]
; IC8:       [[PRED_LOAD_IF48]]:
; IC8-NEXT:    [[TMP153:%.*]] = extractelement <4 x i32> [[TMP219]], i64 1
; IC8-NEXT:    [[TMP154:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP153]]
; IC8-NEXT:    [[TMP155:%.*]] = load i32, ptr [[TMP154]], align 4
; IC8-NEXT:    [[TMP156:%.*]] = insertelement <4 x i32> [[TMP151]], i32 [[TMP155]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE49]]
; IC8:       [[PRED_LOAD_CONTINUE49]]:
; IC8-NEXT:    [[TMP157:%.*]] = phi <4 x i32> [ [[TMP151]], %[[PRED_LOAD_CONTINUE47]] ], [ [[TMP156]], %[[PRED_LOAD_IF48]] ]
; IC8-NEXT:    [[TMP158:%.*]] = extractelement <4 x i1> [[TMP15]], i64 2
; IC8-NEXT:    br i1 [[TMP158]], label %[[PRED_LOAD_IF50:.*]], label %[[PRED_LOAD_CONTINUE51:.*]]
; IC8:       [[PRED_LOAD_IF50]]:
; IC8-NEXT:    [[TMP159:%.*]] = extractelement <4 x i32> [[TMP219]], i64 2
; IC8-NEXT:    [[TMP160:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP159]]
; IC8-NEXT:    [[TMP161:%.*]] = load i32, ptr [[TMP160]], align 4
; IC8-NEXT:    [[TMP162:%.*]] = insertelement <4 x i32> [[TMP157]], i32 [[TMP161]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE51]]
; IC8:       [[PRED_LOAD_CONTINUE51]]:
; IC8-NEXT:    [[TMP163:%.*]] = phi <4 x i32> [ [[TMP157]], %[[PRED_LOAD_CONTINUE49]] ], [ [[TMP162]], %[[PRED_LOAD_IF50]] ]
; IC8-NEXT:    [[TMP164:%.*]] = extractelement <4 x i1> [[TMP15]], i64 3
; IC8-NEXT:    br i1 [[TMP164]], label %[[PRED_LOAD_IF52:.*]], label %[[PRED_LOAD_CONTINUE53:.*]]
; IC8:       [[PRED_LOAD_IF52]]:
; IC8-NEXT:    [[TMP165:%.*]] = extractelement <4 x i32> [[TMP219]], i64 3
; IC8-NEXT:    [[TMP166:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP165]]
; IC8-NEXT:    [[TMP167:%.*]] = load i32, ptr [[TMP166]], align 4
; IC8-NEXT:    [[TMP168:%.*]] = insertelement <4 x i32> [[TMP163]], i32 [[TMP167]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE53]]
; IC8:       [[PRED_LOAD_CONTINUE53]]:
; IC8-NEXT:    [[TMP169:%.*]] = phi <4 x i32> [ [[TMP163]], %[[PRED_LOAD_CONTINUE51]] ], [ [[TMP168]], %[[PRED_LOAD_IF52]] ]
; IC8-NEXT:    [[TMP170:%.*]] = extractelement <4 x i1> [[TMP16]], i64 0
; IC8-NEXT:    br i1 [[TMP170]], label %[[PRED_LOAD_IF54:.*]], label %[[PRED_LOAD_CONTINUE55:.*]]
; IC8:       [[PRED_LOAD_IF54]]:
; IC8-NEXT:    [[TMP171:%.*]] = extractelement <4 x i32> [[TMP24]], i64 0
; IC8-NEXT:    [[TMP172:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP171]]
; IC8-NEXT:    [[TMP173:%.*]] = load i32, ptr [[TMP172]], align 4
; IC8-NEXT:    [[TMP174:%.*]] = insertelement <4 x i32> poison, i32 [[TMP173]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE55]]
; IC8:       [[PRED_LOAD_CONTINUE55]]:
; IC8-NEXT:    [[TMP175:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE53]] ], [ [[TMP174]], %[[PRED_LOAD_IF54]] ]
; IC8-NEXT:    [[TMP176:%.*]] = extractelement <4 x i1> [[TMP16]], i64 1
; IC8-NEXT:    br i1 [[TMP176]], label %[[PRED_LOAD_IF56:.*]], label %[[PRED_LOAD_CONTINUE57:.*]]
; IC8:       [[PRED_LOAD_IF56]]:
; IC8-NEXT:    [[TMP177:%.*]] = extractelement <4 x i32> [[TMP24]], i64 1
; IC8-NEXT:    [[TMP178:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP177]]
; IC8-NEXT:    [[TMP179:%.*]] = load i32, ptr [[TMP178]], align 4
; IC8-NEXT:    [[TMP180:%.*]] = insertelement <4 x i32> [[TMP175]], i32 [[TMP179]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE57]]
; IC8:       [[PRED_LOAD_CONTINUE57]]:
; IC8-NEXT:    [[TMP181:%.*]] = phi <4 x i32> [ [[TMP175]], %[[PRED_LOAD_CONTINUE55]] ], [ [[TMP180]], %[[PRED_LOAD_IF56]] ]
; IC8-NEXT:    [[TMP182:%.*]] = extractelement <4 x i1> [[TMP16]], i64 2
; IC8-NEXT:    br i1 [[TMP182]], label %[[PRED_LOAD_IF58:.*]], label %[[PRED_LOAD_CONTINUE59:.*]]
; IC8:       [[PRED_LOAD_IF58]]:
; IC8-NEXT:    [[TMP183:%.*]] = extractelement <4 x i32> [[TMP24]], i64 2
; IC8-NEXT:    [[TMP184:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP183]]
; IC8-NEXT:    [[TMP185:%.*]] = load i32, ptr [[TMP184]], align 4
; IC8-NEXT:    [[TMP186:%.*]] = insertelement <4 x i32> [[TMP181]], i32 [[TMP185]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE59]]
; IC8:       [[PRED_LOAD_CONTINUE59]]:
; IC8-NEXT:    [[TMP187:%.*]] = phi <4 x i32> [ [[TMP181]], %[[PRED_LOAD_CONTINUE57]] ], [ [[TMP186]], %[[PRED_LOAD_IF58]] ]
; IC8-NEXT:    [[TMP188:%.*]] = extractelement <4 x i1> [[TMP16]], i64 3
; IC8-NEXT:    br i1 [[TMP188]], label %[[PRED_LOAD_IF60:.*]], label %[[PRED_LOAD_CONTINUE61:.*]]
; IC8:       [[PRED_LOAD_IF60]]:
; IC8-NEXT:    [[TMP189:%.*]] = extractelement <4 x i32> [[TMP24]], i64 3
; IC8-NEXT:    [[TMP190:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP189]]
; IC8-NEXT:    [[TMP191:%.*]] = load i32, ptr [[TMP190]], align 4
; IC8-NEXT:    [[TMP192:%.*]] = insertelement <4 x i32> [[TMP187]], i32 [[TMP191]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE61]]
; IC8:       [[PRED_LOAD_CONTINUE61]]:
; IC8-NEXT:    [[TMP193:%.*]] = phi <4 x i32> [ [[TMP187]], %[[PRED_LOAD_CONTINUE59]] ], [ [[TMP192]], %[[PRED_LOAD_IF60]] ]
; IC8-NEXT:    [[TMP194:%.*]] = extractelement <4 x i1> [[TMP17]], i64 0
; IC8-NEXT:    br i1 [[TMP194]], label %[[PRED_LOAD_IF62:.*]], label %[[PRED_LOAD_CONTINUE63:.*]]
; IC8:       [[PRED_LOAD_IF62]]:
; IC8-NEXT:    [[TMP195:%.*]] = extractelement <4 x i32> [[TMP25]], i64 0
; IC8-NEXT:    [[TMP196:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP195]]
; IC8-NEXT:    [[TMP197:%.*]] = load i32, ptr [[TMP196]], align 4
; IC8-NEXT:    [[TMP198:%.*]] = insertelement <4 x i32> poison, i32 [[TMP197]], i64 0
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE63]]
; IC8:       [[PRED_LOAD_CONTINUE63]]:
; IC8-NEXT:    [[TMP199:%.*]] = phi <4 x i32> [ poison, %[[PRED_LOAD_CONTINUE61]] ], [ [[TMP198]], %[[PRED_LOAD_IF62]] ]
; IC8-NEXT:    [[TMP200:%.*]] = extractelement <4 x i1> [[TMP17]], i64 1
; IC8-NEXT:    br i1 [[TMP200]], label %[[PRED_LOAD_IF64:.*]], label %[[PRED_LOAD_CONTINUE65:.*]]
; IC8:       [[PRED_LOAD_IF64]]:
; IC8-NEXT:    [[TMP201:%.*]] = extractelement <4 x i32> [[TMP25]], i64 1
; IC8-NEXT:    [[TMP202:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP201]]
; IC8-NEXT:    [[TMP203:%.*]] = load i32, ptr [[TMP202]], align 4
; IC8-NEXT:    [[TMP204:%.*]] = insertelement <4 x i32> [[TMP199]], i32 [[TMP203]], i64 1
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE65]]
; IC8:       [[PRED_LOAD_CONTINUE65]]:
; IC8-NEXT:    [[TMP205:%.*]] = phi <4 x i32> [ [[TMP199]], %[[PRED_LOAD_CONTINUE63]] ], [ [[TMP204]], %[[PRED_LOAD_IF64]] ]
; IC8-NEXT:    [[TMP206:%.*]] = extractelement <4 x i1> [[TMP17]], i64 2
; IC8-NEXT:    br i1 [[TMP206]], label %[[PRED_LOAD_IF66:.*]], label %[[PRED_LOAD_CONTINUE67:.*]]
; IC8:       [[PRED_LOAD_IF66]]:
; IC8-NEXT:    [[TMP207:%.*]] = extractelement <4 x i32> [[TMP25]], i64 2
; IC8-NEXT:    [[TMP208:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP207]]
; IC8-NEXT:    [[TMP209:%.*]] = load i32, ptr [[TMP208]], align 4
; IC8-NEXT:    [[TMP210:%.*]] = insertelement <4 x i32> [[TMP205]], i32 [[TMP209]], i64 2
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE67]]
; IC8:       [[PRED_LOAD_CONTINUE67]]:
; IC8-NEXT:    [[TMP211:%.*]] = phi <4 x i32> [ [[TMP205]], %[[PRED_LOAD_CONTINUE65]] ], [ [[TMP210]], %[[PRED_LOAD_IF66]] ]
; IC8-NEXT:    [[TMP212:%.*]] = extractelement <4 x i1> [[TMP17]], i64 3
; IC8-NEXT:    br i1 [[TMP212]], label %[[PRED_LOAD_IF68:.*]], label %[[PRED_LOAD_CONTINUE69]]
; IC8:       [[PRED_LOAD_IF68]]:
; IC8-NEXT:    [[TMP213:%.*]] = extractelement <4 x i32> [[TMP25]], i64 3
; IC8-NEXT:    [[TMP214:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP213]]
; IC8-NEXT:    [[TMP215:%.*]] = load i32, ptr [[TMP214]], align 4
; IC8-NEXT:    [[TMP216:%.*]] = insertelement <4 x i32> [[TMP211]], i32 [[TMP215]], i64 3
; IC8-NEXT:    br label %[[PRED_LOAD_CONTINUE69]]
; IC8:       [[PRED_LOAD_CONTINUE69]]:
; IC8-NEXT:    [[TMP217:%.*]] = phi <4 x i32> [ [[TMP211]], %[[PRED_LOAD_CONTINUE67]] ], [ [[TMP216]], %[[PRED_LOAD_IF68]] ]
; IC8-NEXT:    [[PREDPHI:%.*]] = select <4 x i1> [[TMP7]], <4 x i32> [[WIDE_MASKED_LOAD]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI7:%.*]] = select <4 x i1> [[TMP8]], <4 x i32> [[WIDE_MASKED_LOAD4]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI8:%.*]] = select <4 x i1> [[TMP9]], <4 x i32> [[WIDE_MASKED_LOAD5]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI9:%.*]] = select <4 x i1> [[TMP10]], <4 x i32> [[WIDE_MASKED_LOAD6]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI73:%.*]] = select <4 x i1> [[TMP14]], <4 x i32> [[TMP145]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI74:%.*]] = select <4 x i1> [[TMP15]], <4 x i32> [[TMP169]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI75:%.*]] = select <4 x i1> [[TMP16]], <4 x i32> [[TMP193]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[PREDPHI76:%.*]] = select <4 x i1> [[TMP17]], <4 x i32> [[TMP217]], <4 x i32> zeroinitializer
; IC8-NEXT:    [[TMP19]] = add <4 x i32> [[VEC_PHI]], [[PREDPHI]]
; IC8-NEXT:    [[TMP20]] = add <4 x i32> [[VEC_PHI1]], [[PREDPHI7]]
; IC8-NEXT:    [[TMP21]] = add <4 x i32> [[VEC_PHI2]], [[PREDPHI8]]
; IC8-NEXT:    [[TMP22]] = add <4 x i32> [[VEC_PHI3]], [[PREDPHI9]]
; IC8-NEXT:    [[TMP222]] = add <4 x i32> [[VEC_PHI4]], [[PREDPHI73]]
; IC8-NEXT:    [[TMP223]] = add <4 x i32> [[VEC_PHI5]], [[PREDPHI74]]
; IC8-NEXT:    [[TMP224]] = add <4 x i32> [[VEC_PHI6]], [[PREDPHI75]]
; IC8-NEXT:    [[TMP225]] = add <4 x i32> [[VEC_PHI7]], [[PREDPHI76]]
; IC8-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 32
; IC8-NEXT:    [[VEC_IND_NEXT]] = add <4 x i32> [[STEP_ADD_7]], splat (i32 4)
; IC8-NEXT:    [[TMP23:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; IC8-NEXT:    br i1 [[TMP23]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
; IC8:       [[MIDDLE_BLOCK]]:
; IC8-NEXT:    [[BIN_RDX:%.*]] = add <4 x i32> [[TMP20]], [[TMP19]]
; IC8-NEXT:    [[BIN_RDX10:%.*]] = add <4 x i32> [[TMP21]], [[BIN_RDX]]
; IC8-NEXT:    [[BIN_RDX11:%.*]] = add <4 x i32> [[TMP22]], [[BIN_RDX10]]
; IC8-NEXT:    [[BIN_RDX79:%.*]] = add <4 x i32> [[TMP222]], [[BIN_RDX11]]
; IC8-NEXT:    [[BIN_RDX80:%.*]] = add <4 x i32> [[TMP223]], [[BIN_RDX79]]
; IC8-NEXT:    [[BIN_RDX81:%.*]] = add <4 x i32> [[TMP224]], [[BIN_RDX80]]
; IC8-NEXT:    [[BIN_RDX82:%.*]] = add <4 x i32> [[TMP225]], [[BIN_RDX81]]
; IC8-NEXT:    [[TMP227:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX82]])
; IC8-NEXT:    [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
; IC8-NEXT:    br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
; IC8:       [[SCALAR_PH]]:
; IC8-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; IC8-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP227]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_PH]] ]
; IC8-NEXT:    br label %[[LOOP:.*]]
; IC8:       [[LOOP]]:
; IC8-NEXT:    [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ]
; IC8-NEXT:    [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SUM_NEXT:%.*]], %[[LATCH]] ]
; IC8-NEXT:    [[AND_IV:%.*]] = and i32 [[IV]], 1
; IC8-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND_IV]], 0
; IC8-NEXT:    br i1 [[CMP]], label %[[THEN:.*]], label %[[LATCH]]
; IC8:       [[THEN]]:
; IC8-NEXT:    [[CLAMPED:%.*]] = urem i32 [[IV]], 16
; IC8-NEXT:    [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[CLAMPED]]
; IC8-NEXT:    [[LV:%.*]] = load i32, ptr [[GEP_A]], align 4
; IC8-NEXT:    br label %[[LATCH]]
; IC8:       [[LATCH]]:
; IC8-NEXT:    [[V:%.*]] = phi i32 [ [[LV]], %[[THEN]] ], [ 0, %[[LOOP]] ]
; IC8-NEXT:    [[SUM_NEXT]] = add i32 [[SUM]], [[V]]
; IC8-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1
; IC8-NEXT:    [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
; IC8-NEXT:    br i1 [[EC]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]
; IC8:       [[EXIT]]:
; IC8-NEXT:    [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], %[[LATCH]] ], [ [[TMP227]], %[[MIDDLE_BLOCK]] ]
; IC8-NEXT:    ret i32 [[SUM_NEXT_LCSSA]]
;
entry:
  br label %loop

loop:
  %iv = phi i32 [ 0, %entry ], [ %iv.next, %latch ]
  %sum = phi i32 [ 0, %entry ], [ %sum.next, %latch ]
  %and.iv = and i32 %iv, 1
  %cmp = icmp eq i32 %and.iv, 0
  br i1 %cmp, label %then, label %latch

then:
  %clamped = urem i32 %iv, 16
  %gep.A = getelementptr inbounds i32, ptr %A, i32 %clamped
  %lv = load i32, ptr %gep.A
  br label %latch

latch:
  %v = phi i32 [ %lv, %then ], [ 0, %loop ]
  %sum.next = add i32 %sum, %v
  %iv.next = add i32 %iv, 1
  %ec = icmp eq i32 %iv.next, %n
  br i1 %ec, label %exit, label %loop

exit:
  ret i32 %sum.next
}
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]]}
; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]]}
;.
; IC4: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; IC4: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
; IC4: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
; IC4: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]]}
; IC4: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
; IC4: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]]}
;.
; IC8: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; IC8: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
; IC8: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
; IC8: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]]}
; IC8: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
; IC8: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]]}
;.