)]}'
{
  "commit": "df3629dc0cc820e04275bd0f1fda0e9565dfba5d",
  "tree": "7b97b7503a9dba42925d39295efe21b274ab8199",
  "parents": [
    "ac508575ed13787e4d7ed928670c3d6144fce137"
  ],
  "author": {
    "name": "Shilei Tian",
    "email": "i@tianshilei.me",
    "time": "Fri Jan 09 14:43:41 2026 -0500"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Fri Jan 09 14:43:41 2026 -0500"
  },
  "message": "[AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (#174681)\n\nOn certain hardware, this instruction clobbers VGPR MSB `bits[12:19]`,\nso we need to restore the current mode.\n\nFixes SWDEV-571581.",
  "tree_diff": [
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}