)]}'
{
  "commit": "db024764c18413a3b2d3cebe2bb06a09eeef507d",
  "tree": "b86f1d2e49affa76e9a3d7fd6d46f66c64f03852",
  "parents": [
    "0263c15f874d4fc33308db93023e583b816b920e"
  ],
  "author": {
    "name": "Matt Arsenault",
    "email": "Matthew.Arsenault@amd.com",
    "time": "Mon Aug 25 17:42:58 2025 +0900"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon Aug 25 17:42:58 2025 +0900"
  },
  "message": "AMDGPU: Fix not diagnosing unaligned VGPRs for vsrc operands (#155104)\n\nThis was not checking the alignment requirement for 64-bit\noperands which accept inline immediates. Not all custom operand\ntypes were handled in the switch, so round out with explicit\nhandling of all enum values, and change the default to use\nthe default checks for unhandled cases.\n\nFixes #155095",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "69708c47f6c9cdbe102398df4c6a41a74f7fb320",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIInstrInfo.cpp",
      "new_id": "ba37bdb203a7fac0971a6024f7646b70d6f5ef95",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIInstrInfo.cpp"
    },
    {
      "type": "modify",
      "old_id": "4f6ea44ccf68bd3fac65722593fec13822a28987",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/remat-vop.mir",
      "new_id": "23cf6f005811e9812b38bef3f26fee7b74c90bd9",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/remat-vop.mir"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "b4652f2b519e7873f075d82c9c4544ff5124a5f7",
      "new_mode": 33188,
      "new_path": "llvm/test/MachineVerifier/AMDGPU/unsupported-unaligned-vgpr-check-vsrc-operand.mir"
    }
  ]
}
