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llvm / llvm-project / 1ca8ad29dbbe4255cb19fb1193a88040dda515a9
commit1ca8ad29dbbe4255cb19fb1193a88040dda515a9[log] [tgz]
authorFarzon Lotfi <farzonlotfi@microsoft.com>Tue Aug 12 17:43:30 2025 -0400
committerGitHub <noreply@github.com>Tue Aug 12 17:43:30 2025 -0400
treec8073ffba4f479a4b7e0d3de21e1d018461aee33
parent116c318225b1d6b198baf22312a6bd980b80b135 [diff]
[SPIRV]  Create a new OpSelect selector and fix register types. (#152311)

fixes #135572

There are two problems that are causing problems first register types
are copied from older registers instead of evaluating the spirv types.

Second the way OpSelect is defined in SPIRVInstrInfo.td we always
default to integer for TernOpTyped. There seems to be a problem of
multiple matches in the getMatchTable so when executeMatchTable runs we
aren't getting the right opSelect.

Correcting the tablegen wasn't very easy so instead created an emitter
for Select that evaluated the register types. this passes the original
llvm/test/CodeGen/SPIRV/instructions/select.ll tests and the new float
ones I'm adding in issue-135572-emit-float-opselect.ll
3 files changed
tree: c8073ffba4f479a4b7e0d3de21e1d018461aee33
  1. .ci/
  2. .github/
  3. bolt/
  4. clang/
  5. clang-tools-extra/
  6. cmake/
  7. compiler-rt/
  8. cross-project-tests/
  9. flang/
  10. flang-rt/
  11. libc/
  12. libclc/
  13. libcxx/
  14. libcxxabi/
  15. libsycl/
  16. libunwind/
  17. lld/
  18. lldb/
  19. llvm/
  20. llvm-libgcc/
  21. mlir/
  22. offload/
  23. openmp/
  24. polly/
  25. runtimes/
  26. third-party/
  27. utils/
  28. .clang-format
  29. .clang-format-ignore
  30. .clang-tidy
  31. .git-blame-ignore-revs
  32. .gitattributes
  33. .gitignore
  34. .mailmap
  35. CODE_OF_CONDUCT.md
  36. CONTRIBUTING.md
  37. LICENSE.TXT
  38. pyproject.toml
  39. README.md
  40. SECURITY.md
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