tree 650c9aeb39f975a0d2a3fabf95ab68f241e81397
parent a6f4a54891979c7c6d3c9e01598827da8b413f4f
author Jan Górski <jan.a.gorski@wp.pl> 1745854551 +0200
committer GitHub <noreply@github.com> 1745854551 -0700
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[RISCV] Remove `AND` mask generated by `( zext  ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (#136502)

Extends changes from
[ff687af](https://github.com/llvm/llvm-project/commit/ff687af04f5b0e85305250587b524cb0b3849aa0).
Fixes https://github.com/llvm/llvm-project/issues/131476.

This patch adds a DAG combine to replace an `AND` of an `ATOMIC_LOAD`
with a full-bit mask (e.g. `0xFF`, `0xFFFF`, etc.) which is generated as
a result of `(zext (atomic_load))`, by a zero-extended load, provided
the atomic operation is monotonic or weaker.