| { |
| "context" : "{ : }", |
| "name" : "bb1 => bb22", |
| "statements" : [ |
| { |
| "accesses" : [ |
| { |
| "kind" : "read", |
| "relation" : "{ Stmt_bb2[i0] -> MemRef_Short[0]}" |
| }, |
| { |
| "kind" : "write", |
| "relation" : "{ Stmt_bb2[i0] -> MemRef_Short[i0] }" |
| }, |
| { |
| "kind" : "read", |
| "relation" : "{ Stmt_bb2[i0] -> MemRef_Float[o0] : 8i0 <= o0 <= 3 + 8i0 }" |
| }, |
| { |
| "kind" : "write", |
| "relation" : "{ Stmt_bb2[i0] -> MemRef_Float[i0] }" |
| }, |
| { |
| "kind" : "read", |
| "relation" : "{ Stmt_bb2[i0] -> MemRef_Double[8]}" |
| }, |
| { |
| "kind" : "write", |
| "relation" : "{ Stmt_bb2[i0] -> MemRef_Double[i0] }" |
| } |
| ], |
| "domain" : "{ Stmt_bb2[i0] : 0 <= i0 <= 99 }", |
| "name" : "Stmt_bb2", |
| "schedule" : "{ Stmt_bb2[i0] -> [i0] }" |
| } |
| ] |
| } |