)]}'
{
  "id": "e0782710370c66d5975c51444307b1b10ba0ad85",
  "repo": "llvm-project",
  "revision": "d4bfce552110086f198ba46f37acf63df8758921",
  "path": "llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll"
}