commit cfca2a7adfce4fb166773a4122a067726a3beefc
author Matt Arsenault <Matthew.Arsenault@amd.com> Sun Jan 27 22:36:24 2019 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Sun Jan 27 22:36:24 2019 +0000
tree 300d434ce34a476a3f6a3c93734d2cd9e586e2b0
parent ebe6b43aecc7d784a66afc63d746b106052ba7e3

GlobalISel: Don't reduce elements for atomic load/store

This is invalid for the same reason as in the narrowScalar handling
for load.

llvm-svn: 352334

llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index c86b3e5..62ed8af 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -1445,6 +1445,14 @@
   if (TypeIdx != 0)
     return UnableToLegalize;
 
+  MachineMemOperand *MMO = *MI.memoperands_begin();
+
+  // This implementation doesn't work for atomics. Give up instead of doing
+  // something invalid.
+  if (MMO->getOrdering() != AtomicOrdering::NotAtomic ||
+      MMO->getFailureOrdering() != AtomicOrdering::NotAtomic)
+    return UnableToLegalize;
+
   bool IsLoad = MI.getOpcode() == TargetOpcode::G_LOAD;
   unsigned ValReg = MI.getOperand(0).getReg();
   unsigned AddrReg = MI.getOperand(1).getReg();
@@ -1459,7 +1467,7 @@
   const LLT OffsetTy =
     LLT::scalar(MRI.getType(AddrReg).getScalarSizeInBits());
   MachineFunction &MF = *MI.getMF();
-  MachineMemOperand *MMO = *MI.memoperands_begin();
+
   for (unsigned Idx = 0; Idx < NumParts; ++Idx) {
     unsigned Adjustment = Idx * NarrowTy.getSizeInBits() / 8;
     unsigned Alignment = MinAlign(MMO->getAlignment(), Adjustment);