commit | c4806dbda348556d58fa10fa06b1d9dd95bac4c8 | [log] [tgz] |
---|---|---|
author | Piotr Fusik <p.fusik@samsung.com> | Mon Jun 02 20:43:16 2025 +0200 |
committer | GitHub <noreply@github.com> | Mon Jun 02 20:43:16 2025 +0200 |
tree | b3ad27a92767b7a98852cd2152f3b079fe231747 | |
parent | 9f7f4acbf0fc42357e7c804447cb7c2468ca4f4e [diff] |
[RISCV] Fold LI 1 / SLLI into BSETI during i64 materialization (#142348) My first approach was to avoid emitting LI 1 / SLLI in the first place. Unfortunately, that favors BSETI C / ADDI -1 over LI -1 / SRLI 64-C even though the latter has both instructions compressible. This is because the code assumes in several places that a two-instruction sequence (here: BSETI / ADDI) cannot be improved. Another possible approach would be to keep LI 1 / SLLI if it is to be later replaced with SRLI. This would be harder to grasp than eventually patching LI 1 / SLLI with BSETI.
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