| //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===// |
| // |
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| // See https://llvm.org/LICENSE.txt for license information. |
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This transformation analyzes and transforms the induction variables (and |
| // computations derived from them) into forms suitable for efficient execution |
| // on the target. |
| // |
| // This pass performs a strength reduction on array references inside loops that |
| // have as one or more of their components the loop induction variable, it |
| // rewrites expressions to take advantage of scaled-index addressing modes |
| // available on the target, and it performs a variety of other optimizations |
| // related to loop induction variables. |
| // |
| // Terminology note: this code has a lot of handling for "post-increment" or |
| // "post-inc" users. This is not talking about post-increment addressing modes; |
| // it is instead talking about code like this: |
| // |
| // %i = phi [ 0, %entry ], [ %i.next, %latch ] |
| // ... |
| // %i.next = add %i, 1 |
| // %c = icmp eq %i.next, %n |
| // |
| // The SCEV for %i is {0,+,1}<%L>. The SCEV for %i.next is {1,+,1}<%L>, however |
| // it's useful to think about these as the same register, with some uses using |
| // the value of the register before the add and some using it after. In this |
| // example, the icmp is a post-increment user, since it uses %i.next, which is |
| // the value of the induction variable after the increment. The other common |
| // case of post-increment users is users outside the loop. |
| // |
| // TODO: More sophistication in the way Formulae are generated and filtered. |
| // |
| // TODO: Handle multiple loops at a time. |
| // |
| // TODO: Should the addressing mode BaseGV be changed to a ConstantExpr instead |
| // of a GlobalValue? |
| // |
| // TODO: When truncation is free, truncate ICmp users' operands to make it a |
| // smaller encoding (on x86 at least). |
| // |
| // TODO: When a negated register is used by an add (such as in a list of |
| // multiple base registers, or as the increment expression in an addrec), |
| // we may not actually need both reg and (-1 * reg) in registers; the |
| // negation can be implemented by using a sub instead of an add. The |
| // lack of support for taking this into consideration when making |
| // register pressure decisions is partly worked around by the "Special" |
| // use kind. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| #include "llvm/Transforms/Scalar/LoopStrengthReduce.h" |
| #include "llvm/ADT/APInt.h" |
| #include "llvm/ADT/DenseMap.h" |
| #include "llvm/ADT/DenseSet.h" |
| #include "llvm/ADT/Hashing.h" |
| #include "llvm/ADT/PointerIntPair.h" |
| #include "llvm/ADT/STLExtras.h" |
| #include "llvm/ADT/SetVector.h" |
| #include "llvm/ADT/SmallBitVector.h" |
| #include "llvm/ADT/SmallPtrSet.h" |
| #include "llvm/ADT/SmallSet.h" |
| #include "llvm/ADT/SmallVector.h" |
| #include "llvm/ADT/iterator_range.h" |
| #include "llvm/Analysis/AssumptionCache.h" |
| #include "llvm/Analysis/IVUsers.h" |
| #include "llvm/Analysis/LoopAnalysisManager.h" |
| #include "llvm/Analysis/LoopInfo.h" |
| #include "llvm/Analysis/LoopPass.h" |
| #include "llvm/Analysis/MemorySSA.h" |
| #include "llvm/Analysis/MemorySSAUpdater.h" |
| #include "llvm/Analysis/ScalarEvolution.h" |
| #include "llvm/Analysis/ScalarEvolutionExpressions.h" |
| #include "llvm/Analysis/ScalarEvolutionNormalization.h" |
| #include "llvm/Analysis/TargetLibraryInfo.h" |
| #include "llvm/Analysis/TargetTransformInfo.h" |
| #include "llvm/Analysis/ValueTracking.h" |
| #include "llvm/Config/llvm-config.h" |
| #include "llvm/IR/BasicBlock.h" |
| #include "llvm/IR/Constant.h" |
| #include "llvm/IR/Constants.h" |
| #include "llvm/IR/DebugInfoMetadata.h" |
| #include "llvm/IR/DerivedTypes.h" |
| #include "llvm/IR/Dominators.h" |
| #include "llvm/IR/GlobalValue.h" |
| #include "llvm/IR/IRBuilder.h" |
| #include "llvm/IR/InstrTypes.h" |
| #include "llvm/IR/Instruction.h" |
| #include "llvm/IR/Instructions.h" |
| #include "llvm/IR/IntrinsicInst.h" |
| #include "llvm/IR/Intrinsics.h" |
| #include "llvm/IR/Module.h" |
| #include "llvm/IR/OperandTraits.h" |
| #include "llvm/IR/Operator.h" |
| #include "llvm/IR/PassManager.h" |
| #include "llvm/IR/Type.h" |
| #include "llvm/IR/Use.h" |
| #include "llvm/IR/User.h" |
| #include "llvm/IR/Value.h" |
| #include "llvm/IR/ValueHandle.h" |
| #include "llvm/InitializePasses.h" |
| #include "llvm/Pass.h" |
| #include "llvm/Support/Casting.h" |
| #include "llvm/Support/CommandLine.h" |
| #include "llvm/Support/Compiler.h" |
| #include "llvm/Support/Debug.h" |
| #include "llvm/Support/ErrorHandling.h" |
| #include "llvm/Support/MathExtras.h" |
| #include "llvm/Support/raw_ostream.h" |
| #include "llvm/Transforms/Scalar.h" |
| #include "llvm/Transforms/Utils.h" |
| #include "llvm/Transforms/Utils/BasicBlockUtils.h" |
| #include "llvm/Transforms/Utils/Local.h" |
| #include "llvm/Transforms/Utils/ScalarEvolutionExpander.h" |
| #include <algorithm> |
| #include <cassert> |
| #include <cstddef> |
| #include <cstdint> |
| #include <cstdlib> |
| #include <iterator> |
| #include <limits> |
| #include <map> |
| #include <numeric> |
| #include <utility> |
| |
| using namespace llvm; |
| |
| #define DEBUG_TYPE "loop-reduce" |
| |
| /// MaxIVUsers is an arbitrary threshold that provides an early opportunity for |
| /// bail out. This threshold is far beyond the number of users that LSR can |
| /// conceivably solve, so it should not affect generated code, but catches the |
| /// worst cases before LSR burns too much compile time and stack space. |
| static const unsigned MaxIVUsers = 200; |
| |
| /// Limit the size of expression that SCEV-based salvaging will attempt to |
| /// translate into a DIExpression. |
| /// Choose a maximum size such that debuginfo is not excessively increased and |
| /// the salvaging is not too expensive for the compiler. |
| static const unsigned MaxSCEVSalvageExpressionSize = 64; |
| |
| // Temporary flag to cleanup congruent phis after LSR phi expansion. |
| // It's currently disabled until we can determine whether it's truly useful or |
| // not. The flag should be removed after the v3.0 release. |
| // This is now needed for ivchains. |
| static cl::opt<bool> EnablePhiElim( |
| "enable-lsr-phielim", cl::Hidden, cl::init(true), |
| cl::desc("Enable LSR phi elimination")); |
| |
| // The flag adds instruction count to solutions cost comparision. |
| static cl::opt<bool> InsnsCost( |
| "lsr-insns-cost", cl::Hidden, cl::init(true), |
| cl::desc("Add instruction count to a LSR cost model")); |
| |
| // Flag to choose how to narrow complex lsr solution |
| static cl::opt<bool> LSRExpNarrow( |
| "lsr-exp-narrow", cl::Hidden, cl::init(false), |
| cl::desc("Narrow LSR complex solution using" |
| " expectation of registers number")); |
| |
| // Flag to narrow search space by filtering non-optimal formulae with |
| // the same ScaledReg and Scale. |
| static cl::opt<bool> FilterSameScaledReg( |
| "lsr-filter-same-scaled-reg", cl::Hidden, cl::init(true), |
| cl::desc("Narrow LSR search space by filtering non-optimal formulae" |
| " with the same ScaledReg and Scale")); |
| |
| static cl::opt<TTI::AddressingModeKind> PreferredAddresingMode( |
| "lsr-preferred-addressing-mode", cl::Hidden, cl::init(TTI::AMK_None), |
| cl::desc("A flag that overrides the target's preferred addressing mode."), |
| cl::values(clEnumValN(TTI::AMK_None, |
| "none", |
| "Don't prefer any addressing mode"), |
| clEnumValN(TTI::AMK_PreIndexed, |
| "preindexed", |
| "Prefer pre-indexed addressing mode"), |
| clEnumValN(TTI::AMK_PostIndexed, |
| "postindexed", |
| "Prefer post-indexed addressing mode"))); |
| |
| static cl::opt<unsigned> ComplexityLimit( |
| "lsr-complexity-limit", cl::Hidden, |
| cl::init(std::numeric_limits<uint16_t>::max()), |
| cl::desc("LSR search space complexity limit")); |
| |
| static cl::opt<unsigned> SetupCostDepthLimit( |
| "lsr-setupcost-depth-limit", cl::Hidden, cl::init(7), |
| cl::desc("The limit on recursion depth for LSRs setup cost")); |
| |
| #ifndef NDEBUG |
| // Stress test IV chain generation. |
| static cl::opt<bool> StressIVChain( |
| "stress-ivchain", cl::Hidden, cl::init(false), |
| cl::desc("Stress test LSR IV chains")); |
| #else |
| static bool StressIVChain = false; |
| #endif |
| |
| namespace { |
| |
| struct MemAccessTy { |
| /// Used in situations where the accessed memory type is unknown. |
| static const unsigned UnknownAddressSpace = |
| std::numeric_limits<unsigned>::max(); |
| |
| Type *MemTy = nullptr; |
| unsigned AddrSpace = UnknownAddressSpace; |
| |
| MemAccessTy() = default; |
| MemAccessTy(Type *Ty, unsigned AS) : MemTy(Ty), AddrSpace(AS) {} |
| |
| bool operator==(MemAccessTy Other) const { |
| return MemTy == Other.MemTy && AddrSpace == Other.AddrSpace; |
| } |
| |
| bool operator!=(MemAccessTy Other) const { return !(*this == Other); } |
| |
| static MemAccessTy getUnknown(LLVMContext &Ctx, |
| unsigned AS = UnknownAddressSpace) { |
| return MemAccessTy(Type::getVoidTy(Ctx), AS); |
| } |
| |
| Type *getType() { return MemTy; } |
| }; |
| |
| /// This class holds data which is used to order reuse candidates. |
| class RegSortData { |
| public: |
| /// This represents the set of LSRUse indices which reference |
| /// a particular register. |
| SmallBitVector UsedByIndices; |
| |
| void print(raw_ostream &OS) const; |
| void dump() const; |
| }; |
| |
| } // end anonymous namespace |
| |
| #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) |
| void RegSortData::print(raw_ostream &OS) const { |
| OS << "[NumUses=" << UsedByIndices.count() << ']'; |
| } |
| |
| LLVM_DUMP_METHOD void RegSortData::dump() const { |
| print(errs()); errs() << '\n'; |
| } |
| #endif |
| |
| namespace { |
| |
| /// Map register candidates to information about how they are used. |
| class RegUseTracker { |
| using RegUsesTy = DenseMap<const SCEV *, RegSortData>; |
| |
| RegUsesTy RegUsesMap; |
| SmallVector<const SCEV *, 16> RegSequence; |
| |
| public: |
| void countRegister(const SCEV *Reg, size_t LUIdx); |
| void dropRegister(const SCEV *Reg, size_t LUIdx); |
| void swapAndDropUse(size_t LUIdx, size_t LastLUIdx); |
| |
| bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const; |
| |
| const SmallBitVector &getUsedByIndices(const SCEV *Reg) const; |
| |
| void clear(); |
| |
| using iterator = SmallVectorImpl<const SCEV *>::iterator; |
| using const_iterator = SmallVectorImpl<const SCEV *>::const_iterator; |
| |
| iterator begin() { return RegSequence.begin(); } |
| iterator end() { return RegSequence.end(); } |
| const_iterator begin() const { return RegSequence.begin(); } |
| const_iterator end() const { return RegSequence.end(); } |
| }; |
| |
| } // end anonymous namespace |
| |
| void |
| RegUseTracker::countRegister(const SCEV *Reg, size_t LUIdx) { |
| std::pair<RegUsesTy::iterator, bool> Pair = |
| RegUsesMap.insert(std::make_pair(Reg, RegSortData())); |
| RegSortData &RSD = Pair.first->second; |
| if (Pair.second) |
| RegSequence.push_back(Reg); |
| RSD.UsedByIndices.resize(std::max(RSD.UsedByIndices.size(), LUIdx + 1)); |
| RSD.UsedByIndices.set(LUIdx); |
| } |
| |
| void |
| RegUseTracker::dropRegister(const SCEV *Reg, size_t LUIdx) { |
| RegUsesTy::iterator It = RegUsesMap.find(Reg); |
| assert(It != RegUsesMap.end()); |
| RegSortData &RSD = It->second; |
| assert(RSD.UsedByIndices.size() > LUIdx); |
| RSD.UsedByIndices.reset(LUIdx); |
| } |
| |
| void |
| RegUseTracker::swapAndDropUse(size_t LUIdx, size_t LastLUIdx) { |
| assert(LUIdx <= LastLUIdx); |
| |
| // Update RegUses. The data structure is not optimized for this purpose; |
| // we must iterate through it and update each of the bit vectors. |
| for (auto &Pair : RegUsesMap) { |
| SmallBitVector &UsedByIndices = Pair.second.UsedByIndices; |
| if (LUIdx < UsedByIndices.size()) |
| UsedByIndices[LUIdx] = |
| LastLUIdx < UsedByIndices.size() ? UsedByIndices[LastLUIdx] : false; |
| UsedByIndices.resize(std::min(UsedByIndices.size(), LastLUIdx)); |
| } |
| } |
| |
| bool |
| RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const { |
| RegUsesTy::const_iterator I = RegUsesMap.find(Reg); |
| if (I == RegUsesMap.end()) |
| return false; |
| const SmallBitVector &UsedByIndices = I->second.UsedByIndices; |
| int i = UsedByIndices.find_first(); |
| if (i == -1) return false; |
| if ((size_t)i != LUIdx) return true; |
| return UsedByIndices.find_next(i) != -1; |
| } |
| |
| const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const { |
| RegUsesTy::const_iterator I = RegUsesMap.find(Reg); |
| assert(I != RegUsesMap.end() && "Unknown register!"); |
| return I->second.UsedByIndices; |
| } |
| |
| void RegUseTracker::clear() { |
| RegUsesMap.clear(); |
| RegSequence.clear(); |
| } |
| |
| namespace { |
| |
| /// This class holds information that describes a formula for computing |
| /// satisfying a use. It may include broken-out immediates and scaled registers. |
| struct Formula { |
| /// Global base address used for complex addressing. |
| GlobalValue *BaseGV = nullptr; |
| |
| /// Base offset for complex addressing. |
| int64_t BaseOffset = 0; |
| |
| /// Whether any complex addressing has a base register. |
| bool HasBaseReg = false; |
| |
| /// The scale of any complex addressing. |
| int64_t Scale = 0; |
| |
| /// The list of "base" registers for this use. When this is non-empty. The |
| /// canonical representation of a formula is |
| /// 1. BaseRegs.size > 1 implies ScaledReg != NULL and |
| /// 2. ScaledReg != NULL implies Scale != 1 || !BaseRegs.empty(). |
| /// 3. The reg containing recurrent expr related with currect loop in the |
| /// formula should be put in the ScaledReg. |
| /// #1 enforces that the scaled register is always used when at least two |
| /// registers are needed by the formula: e.g., reg1 + reg2 is reg1 + 1 * reg2. |
| /// #2 enforces that 1 * reg is reg. |
| /// #3 ensures invariant regs with respect to current loop can be combined |
| /// together in LSR codegen. |
| /// This invariant can be temporarily broken while building a formula. |
| /// However, every formula inserted into the LSRInstance must be in canonical |
| /// form. |
| SmallVector<const SCEV *, 4> BaseRegs; |
| |
| /// The 'scaled' register for this use. This should be non-null when Scale is |
| /// not zero. |
| const SCEV *ScaledReg = nullptr; |
| |
| /// An additional constant offset which added near the use. This requires a |
| /// temporary register, but the offset itself can live in an add immediate |
| /// field rather than a register. |
| int64_t UnfoldedOffset = 0; |
| |
| Formula() = default; |
| |
| void initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE); |
| |
| bool isCanonical(const Loop &L) const; |
| |
| void canonicalize(const Loop &L); |
| |
| bool unscale(); |
| |
| bool hasZeroEnd() const; |
| |
| size_t getNumRegs() const; |
| Type *getType() const; |
| |
| void deleteBaseReg(const SCEV *&S); |
| |
| bool referencesReg(const SCEV *S) const; |
| bool hasRegsUsedByUsesOtherThan(size_t LUIdx, |
| const RegUseTracker &RegUses) const; |
| |
| void print(raw_ostream &OS) const; |
| void dump() const; |
| }; |
| |
| } // end anonymous namespace |
| |
| /// Recursion helper for initialMatch. |
| static void DoInitialMatch(const SCEV *S, Loop *L, |
| SmallVectorImpl<const SCEV *> &Good, |
| SmallVectorImpl<const SCEV *> &Bad, |
| ScalarEvolution &SE) { |
| // Collect expressions which properly dominate the loop header. |
| if (SE.properlyDominates(S, L->getHeader())) { |
| Good.push_back(S); |
| return; |
| } |
| |
| // Look at add operands. |
| if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) { |
| for (const SCEV *S : Add->operands()) |
| DoInitialMatch(S, L, Good, Bad, SE); |
| return; |
| } |
| |
| // Look at addrec operands. |
| if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) |
| if (!AR->getStart()->isZero() && AR->isAffine()) { |
| DoInitialMatch(AR->getStart(), L, Good, Bad, SE); |
| DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0), |
| AR->getStepRecurrence(SE), |
| // FIXME: AR->getNoWrapFlags() |
| AR->getLoop(), SCEV::FlagAnyWrap), |
| L, Good, Bad, SE); |
| return; |
| } |
| |
| // Handle a multiplication by -1 (negation) if it didn't fold. |
| if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) |
| if (Mul->getOperand(0)->isAllOnesValue()) { |
| SmallVector<const SCEV *, 4> Ops(drop_begin(Mul->operands())); |
| const SCEV *NewMul = SE.getMulExpr(Ops); |
| |
| SmallVector<const SCEV *, 4> MyGood; |
| SmallVector<const SCEV *, 4> MyBad; |
| DoInitialMatch(NewMul, L, MyGood, MyBad, SE); |
| const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue( |
| SE.getEffectiveSCEVType(NewMul->getType()))); |
| for (const SCEV *S : MyGood) |
| Good.push_back(SE.getMulExpr(NegOne, S)); |
| for (const SCEV *S : MyBad) |
| Bad.push_back(SE.getMulExpr(NegOne, S)); |
| return; |
| } |
| |
| // Ok, we can't do anything interesting. Just stuff the whole thing into a |
| // register and hope for the best. |
| Bad.push_back(S); |
| } |
| |
| /// Incorporate loop-variant parts of S into this Formula, attempting to keep |
| /// all loop-invariant and loop-computable values in a single base register. |
| void Formula::initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) { |
| SmallVector<const SCEV *, 4> Good; |
| SmallVector<const SCEV *, 4> Bad; |
| DoInitialMatch(S, L, Good, Bad, SE); |
| if (!Good.empty()) { |
| const SCEV *Sum = SE.getAddExpr(Good); |
| if (!Sum->isZero()) |
| BaseRegs.push_back(Sum); |
| HasBaseReg = true; |
| } |
| if (!Bad.empty()) { |
| const SCEV *Sum = SE.getAddExpr(Bad); |
| if (!Sum->isZero()) |
| BaseRegs.push_back(Sum); |
| HasBaseReg = true; |
| } |
| canonicalize(*L); |
| } |
| |
| /// Check whether or not this formula satisfies the canonical |
| /// representation. |
| /// \see Formula::BaseRegs. |
| bool Formula::isCanonical(const Loop &L) const { |
| if (!ScaledReg) |
| return BaseRegs.size() <= 1; |
| |
| if (Scale != 1) |
| return true; |
| |
| if (Scale == 1 && BaseRegs.empty()) |
| return false; |
| |
| const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg); |
| if (SAR && SAR->getLoop() == &L) |
| return true; |
| |
| // If ScaledReg is not a recurrent expr, or it is but its loop is not current |
| // loop, meanwhile BaseRegs contains a recurrent expr reg related with current |
| // loop, we want to swap the reg in BaseRegs with ScaledReg. |
| auto I = find_if(BaseRegs, [&](const SCEV *S) { |
| return isa<const SCEVAddRecExpr>(S) && |
| (cast<SCEVAddRecExpr>(S)->getLoop() == &L); |
| }); |
| return I == BaseRegs.end(); |
| } |
| |
| /// Helper method to morph a formula into its canonical representation. |
| /// \see Formula::BaseRegs. |
| /// Every formula having more than one base register, must use the ScaledReg |
| /// field. Otherwise, we would have to do special cases everywhere in LSR |
| /// to treat reg1 + reg2 + ... the same way as reg1 + 1*reg2 + ... |
| /// On the other hand, 1*reg should be canonicalized into reg. |
| void Formula::canonicalize(const Loop &L) { |
| if (isCanonical(L)) |
| return; |
| |
| if (BaseRegs.empty()) { |
| // No base reg? Use scale reg with scale = 1 as such. |
| assert(ScaledReg && "Expected 1*reg => reg"); |
| assert(Scale == 1 && "Expected 1*reg => reg"); |
| BaseRegs.push_back(ScaledReg); |
| Scale = 0; |
| ScaledReg = nullptr; |
| return; |
| } |
| |
| // Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg. |
| if (!ScaledReg) { |
| ScaledReg = BaseRegs.pop_back_val(); |
| Scale = 1; |
| } |
| |
| // If ScaledReg is an invariant with respect to L, find the reg from |
| // BaseRegs containing the recurrent expr related with Loop L. Swap the |
| // reg with ScaledReg. |
| const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg); |
| if (!SAR || SAR->getLoop() != &L) { |
| auto I = find_if(BaseRegs, [&](const SCEV *S) { |
| return isa<const SCEVAddRecExpr>(S) && |
| (cast<SCEVAddRecExpr>(S)->getLoop() == &L); |
| }); |
| if (I != BaseRegs.end()) |
| std::swap(ScaledReg, *I); |
| } |
| assert(isCanonical(L) && "Failed to canonicalize?"); |
| } |
| |
| /// Get rid of the scale in the formula. |
| /// In other words, this method morphes reg1 + 1*reg2 into reg1 + reg2. |
| /// \return true if it was possible to get rid of the scale, false otherwise. |
| /// \note After this operation the formula may not be in the canonical form. |
| bool Formula::unscale() { |
| if (Scale != 1) |
| return false; |
| Scale = 0; |
| BaseRegs.push_back(ScaledReg); |
| ScaledReg = nullptr; |
| return true; |
| } |
| |
| bool Formula::hasZeroEnd() const { |
| if (UnfoldedOffset || BaseOffset) |
| return false; |
| if (BaseRegs.size() != 1 || ScaledReg) |
| return false; |
| return true; |
| } |
| |
| /// Return the total number of register operands used by this formula. This does |
| /// not include register uses implied by non-constant addrec strides. |
| size_t Formula::getNumRegs() const { |
| return !!ScaledReg + BaseRegs.size(); |
| } |
| |
| /// Return the type of this formula, if it has one, or null otherwise. This type |
| /// is meaningless except for the bit size. |
| Type *Formula::getType() const { |
| return !BaseRegs.empty() ? BaseRegs.front()->getType() : |
| ScaledReg ? ScaledReg->getType() : |
| BaseGV ? BaseGV->getType() : |
| nullptr; |
| } |
| |
| /// Delete the given base reg from the BaseRegs list. |
| void Formula::deleteBaseReg(const SCEV *&S) { |
| if (&S != &BaseRegs.back()) |
| std::swap(S, BaseRegs.back()); |
| BaseRegs.pop_back(); |
| } |
| |
| /// Test if this formula references the given register. |
| bool Formula::referencesReg(const SCEV *S) const { |
| return S == ScaledReg || is_contained(BaseRegs, S); |
| } |
| |
| /// Test whether this formula uses registers which are used by uses other than |
| /// the use with the given index. |
| bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx, |
| const RegUseTracker &RegUses) const { |
| if (ScaledReg) |
| if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx)) |
| return true; |
| for (const SCEV *BaseReg : BaseRegs) |
| if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx)) |
| return true; |
| return false; |
| } |
| |
| #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) |
| void Formula::print(raw_ostream &OS) const { |
| bool First = true; |
| if (BaseGV) { |
| if (!First) OS << " + "; else First = false; |
| BaseGV->printAsOperand(OS, /*PrintType=*/false); |
| } |
| if (BaseOffset != 0) { |
| if (!First) OS << " + "; else First = false; |
| OS << BaseOffset; |
| } |
| for (const SCEV *BaseReg : BaseRegs) { |
| if (!First) OS << " + "; else First = false; |
| OS << "reg(" << *BaseReg << ')'; |
| } |
| if (HasBaseReg && BaseRegs.empty()) { |
| if (!First) OS << " + "; else First = false; |
| OS << "**error: HasBaseReg**"; |
| } else if (!HasBaseReg && !BaseRegs.empty()) { |
| if (!First) OS << " + "; else First = false; |
| OS << "**error: !HasBaseReg**"; |
| } |
| if (Scale != 0) { |
| if (!First) OS << " + "; else First = false; |
| OS << Scale << "*reg("; |
| if (ScaledReg) |
| OS << *ScaledReg; |
| else |
| OS << "<unknown>"; |
| OS << ')'; |
| } |
| if (UnfoldedOffset != 0) { |
| if (!First) OS << " + "; |
| OS << "imm(" << UnfoldedOffset << ')'; |
| } |
| } |
| |
| LLVM_DUMP_METHOD void Formula::dump() const { |
| print(errs()); errs() << '\n'; |
| } |
| #endif |
| |
| /// Return true if the given addrec can be sign-extended without changing its |
| /// value. |
| static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) { |
| Type *WideTy = |
| IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(AR->getType()) + 1); |
| return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy)); |
| } |
| |
| /// Return true if the given add can be sign-extended without changing its |
| /// value. |
| static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) { |
| Type *WideTy = |
| IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(A->getType()) + 1); |
| return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy)); |
| } |
| |
| /// Return true if the given mul can be sign-extended without changing its |
| /// value. |
| static bool isMulSExtable(const SCEVMulExpr *M, ScalarEvolution &SE) { |
| Type *WideTy = |
| IntegerType::get(SE.getContext(), |
| SE.getTypeSizeInBits(M->getType()) * M->getNumOperands()); |
| return isa<SCEVMulExpr>(SE.getSignExtendExpr(M, WideTy)); |
| } |
| |
| /// Return an expression for LHS /s RHS, if it can be determined and if the |
| /// remainder is known to be zero, or null otherwise. If IgnoreSignificantBits |
| /// is true, expressions like (X * Y) /s Y are simplified to X, ignoring that |
| /// the multiplication may overflow, which is useful when the result will be |
| /// used in a context where the most significant bits are ignored. |
| static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS, |
| ScalarEvolution &SE, |
| bool IgnoreSignificantBits = false) { |
| // Handle the trivial case, which works for any SCEV type. |
| if (LHS == RHS) |
| return SE.getConstant(LHS->getType(), 1); |
| |
| // Handle a few RHS special cases. |
| const SCEVConstant *RC = dyn_cast<SCEVConstant>(RHS); |
| if (RC) { |
| const APInt &RA = RC->getAPInt(); |
| // Handle x /s -1 as x * -1, to give ScalarEvolution a chance to do |
| // some folding. |
| if (RA.isAllOnes()) { |
| if (LHS->getType()->isPointerTy()) |
| return nullptr; |
| return SE.getMulExpr(LHS, RC); |
| } |
| // Handle x /s 1 as x. |
| if (RA == 1) |
| return LHS; |
| } |
| |
| // Check for a division of a constant by a constant. |
| if (const SCEVConstant *C = dyn_cast<SCEVConstant>(LHS)) { |
| if (!RC) |
| return nullptr; |
| const APInt &LA = C->getAPInt(); |
| const APInt &RA = RC->getAPInt(); |
| if (LA.srem(RA) != 0) |
| return nullptr; |
| return SE.getConstant(LA.sdiv(RA)); |
| } |
| |
| // Distribute the sdiv over addrec operands, if the addrec doesn't overflow. |
| if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) { |
| if ((IgnoreSignificantBits || isAddRecSExtable(AR, SE)) && AR->isAffine()) { |
| const SCEV *Step = getExactSDiv(AR->getStepRecurrence(SE), RHS, SE, |
| IgnoreSignificantBits); |
| if (!Step) return nullptr; |
| const SCEV *Start = getExactSDiv(AR->getStart(), RHS, SE, |
| IgnoreSignificantBits); |
| if (!Start) return nullptr; |
| // FlagNW is independent of the start value, step direction, and is |
| // preserved with smaller magnitude steps. |
| // FIXME: AR->getNoWrapFlags(SCEV::FlagNW) |
| return SE.getAddRecExpr(Start, Step, AR->getLoop(), SCEV::FlagAnyWrap); |
| } |
| return nullptr; |
| } |
| |
| // Distribute the sdiv over add operands, if the add doesn't overflow. |
| if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) { |
| if (IgnoreSignificantBits || isAddSExtable(Add, SE)) { |
| SmallVector<const SCEV *, 8> Ops; |
| for (const SCEV *S : Add->operands()) { |
| const SCEV *Op = getExactSDiv(S, RHS, SE, IgnoreSignificantBits); |
| if (!Op) return nullptr; |
| Ops.push_back(Op); |
| } |
| return SE.getAddExpr(Ops); |
| } |
| return nullptr; |
| } |
| |
| // Check for a multiply operand that we can pull RHS out of. |
| if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS)) { |
| if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) { |
| // Handle special case C1*X*Y /s C2*X*Y. |
| if (const SCEVMulExpr *MulRHS = dyn_cast<SCEVMulExpr>(RHS)) { |
| if (IgnoreSignificantBits || isMulSExtable(MulRHS, SE)) { |
| const SCEVConstant *LC = dyn_cast<SCEVConstant>(Mul->getOperand(0)); |
| const SCEVConstant *RC = |
| dyn_cast<SCEVConstant>(MulRHS->getOperand(0)); |
| if (LC && RC) { |
| SmallVector<const SCEV *, 4> LOps(drop_begin(Mul->operands())); |
| SmallVector<const SCEV *, 4> ROps(drop_begin(MulRHS->operands())); |
| if (LOps == ROps) |
| return getExactSDiv(LC, RC, SE, IgnoreSignificantBits); |
| } |
| } |
| } |
| |
| SmallVector<const SCEV *, 4> Ops; |
| bool Found = false; |
| for (const SCEV *S : Mul->operands()) { |
| if (!Found) |
| if (const SCEV *Q = getExactSDiv(S, RHS, SE, |
| IgnoreSignificantBits)) { |
| S = Q; |
| Found = true; |
| } |
| Ops.push_back(S); |
| } |
| return Found ? SE.getMulExpr(Ops) : nullptr; |
| } |
| return nullptr; |
| } |
| |
| // Otherwise we don't know. |
| return nullptr; |
| } |
| |
| /// If S involves the addition of a constant integer value, return that integer |
| /// value, and mutate S to point to a new SCEV with that value excluded. |
| static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) { |
| if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S)) { |
| if (C->getAPInt().getMinSignedBits() <= 64) { |
| S = SE.getConstant(C->getType(), 0); |
| return C->getValue()->getSExtValue(); |
| } |
| } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) { |
| SmallVector<const SCEV *, 8> NewOps(Add->operands()); |
| int64_t Result = ExtractImmediate(NewOps.front(), SE); |
| if (Result != 0) |
| S = SE.getAddExpr(NewOps); |
| return Result; |
| } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) { |
| SmallVector<const SCEV *, 8> NewOps(AR->operands()); |
| int64_t Result = ExtractImmediate(NewOps.front(), SE); |
| if (Result != 0) |
| S = SE.getAddRecExpr(NewOps, AR->getLoop(), |
| // FIXME: AR->getNoWrapFlags(SCEV::FlagNW) |
| SCEV::FlagAnyWrap); |
| return Result; |
| } |
| return 0; |
| } |
| |
| /// If S involves the addition of a GlobalValue address, return that symbol, and |
| /// mutate S to point to a new SCEV with that value excluded. |
| static GlobalValue *ExtractSymbol(const SCEV *&S, ScalarEvolution &SE) { |
| if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) { |
| if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue())) { |
| S = SE.getConstant(GV->getType(), 0); |
| return GV; |
| } |
| } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) { |
| SmallVector<const SCEV *, 8> NewOps(Add->operands()); |
| GlobalValue *Result = ExtractSymbol(NewOps.back(), SE); |
| if (Result) |
| S = SE.getAddExpr(NewOps); |
| return Result; |
| } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) { |
| SmallVector<const SCEV *, 8> NewOps(AR->operands()); |
| GlobalValue *Result = ExtractSymbol(NewOps.front(), SE); |
| if (Result) |
| S = SE.getAddRecExpr(NewOps, AR->getLoop(), |
| // FIXME: AR->getNoWrapFlags(SCEV::FlagNW) |
| SCEV::FlagAnyWrap); |
| return Result; |
| } |
| return nullptr; |
| } |
| |
| /// Returns true if the specified instruction is using the specified value as an |
| /// address. |
| static bool isAddressUse(const TargetTransformInfo &TTI, |
| Instruction *Inst, Value *OperandVal) { |
| bool isAddress = isa<LoadInst>(Inst); |
| if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) { |
| if (SI->getPointerOperand() == OperandVal) |
| isAddress = true; |
| } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) { |
| // Addressing modes can also be folded into prefetches and a variety |
| // of intrinsics. |
| switch (II->getIntrinsicID()) { |
| case Intrinsic::memset: |
| case Intrinsic::prefetch: |
| case Intrinsic::masked_load: |
| if (II->getArgOperand(0) == OperandVal) |
| isAddress = true; |
| break; |
| case Intrinsic::masked_store: |
| if (II->getArgOperand(1) == OperandVal) |
| isAddress = true; |
| break; |
| case Intrinsic::memmove: |
| case Intrinsic::memcpy: |
| if (II->getArgOperand(0) == OperandVal || |
| II->getArgOperand(1) == OperandVal) |
| isAddress = true; |
| break; |
| default: { |
| MemIntrinsicInfo IntrInfo; |
| if (TTI.getTgtMemIntrinsic(II, IntrInfo)) { |
| if (IntrInfo.PtrVal == OperandVal) |
| isAddress = true; |
| } |
| } |
| } |
| } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) { |
| if (RMW->getPointerOperand() == OperandVal) |
| isAddress = true; |
| } else if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(Inst)) { |
| if (CmpX->getPointerOperand() == OperandVal) |
| isAddress = true; |
| } |
| return isAddress; |
| } |
| |
| /// Return the type of the memory being accessed. |
| static MemAccessTy getAccessType(const TargetTransformInfo &TTI, |
| Instruction *Inst, Value *OperandVal) { |
| MemAccessTy AccessTy(Inst->getType(), MemAccessTy::UnknownAddressSpace); |
| if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) { |
| AccessTy.MemTy = SI->getOperand(0)->getType(); |
| AccessTy.AddrSpace = SI->getPointerAddressSpace(); |
| } else if (const LoadInst *LI = dyn_cast<LoadInst>(Inst)) { |
| AccessTy.AddrSpace = LI->getPointerAddressSpace(); |
| } else if (const AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) { |
| AccessTy.AddrSpace = RMW->getPointerAddressSpace(); |
| } else if (const AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(Inst)) { |
| AccessTy.AddrSpace = CmpX->getPointerAddressSpace(); |
| } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) { |
| switch (II->getIntrinsicID()) { |
| case Intrinsic::prefetch: |
| case Intrinsic::memset: |
| AccessTy.AddrSpace = II->getArgOperand(0)->getType()->getPointerAddressSpace(); |
| AccessTy.MemTy = OperandVal->getType(); |
| break; |
| case Intrinsic::memmove: |
| case Intrinsic::memcpy: |
| AccessTy.AddrSpace = OperandVal->getType()->getPointerAddressSpace(); |
| AccessTy.MemTy = OperandVal->getType(); |
| break; |
| case Intrinsic::masked_load: |
| AccessTy.AddrSpace = |
| II->getArgOperand(0)->getType()->getPointerAddressSpace(); |
| break; |
| case Intrinsic::masked_store: |
| AccessTy.MemTy = II->getOperand(0)->getType(); |
| AccessTy.AddrSpace = |
| II->getArgOperand(1)->getType()->getPointerAddressSpace(); |
| break; |
| default: { |
| MemIntrinsicInfo IntrInfo; |
| if (TTI.getTgtMemIntrinsic(II, IntrInfo) && IntrInfo.PtrVal) { |
| AccessTy.AddrSpace |
| = IntrInfo.PtrVal->getType()->getPointerAddressSpace(); |
| } |
| |
| break; |
| } |
| } |
| } |
| |
| // All pointers have the same requirements, so canonicalize them to an |
| // arbitrary pointer type to minimize variation. |
| if (PointerType *PTy = dyn_cast<PointerType>(AccessTy.MemTy)) |
| AccessTy.MemTy = PointerType::get(IntegerType::get(PTy->getContext(), 1), |
| PTy->getAddressSpace()); |
| |
| return AccessTy; |
| } |
| |
| /// Return true if this AddRec is already a phi in its loop. |
| static bool isExistingPhi(const SCEVAddRecExpr *AR, ScalarEvolution &SE) { |
| for (PHINode &PN : AR->getLoop()->getHeader()->phis()) { |
| if (SE.isSCEVable(PN.getType()) && |
| (SE.getEffectiveSCEVType(PN.getType()) == |
| SE.getEffectiveSCEVType(AR->getType())) && |
| SE.getSCEV(&PN) == AR) |
| return true; |
| } |
| return false; |
| } |
| |
| /// Check if expanding this expression is likely to incur significant cost. This |
| /// is tricky because SCEV doesn't track which expressions are actually computed |
| /// by the current IR. |
| /// |
| /// We currently allow expansion of IV increments that involve adds, |
| /// multiplication by constants, and AddRecs from existing phis. |
| /// |
| /// TODO: Allow UDivExpr if we can find an existing IV increment that is an |
| /// obvious multiple of the UDivExpr. |
| static bool isHighCostExpansion(const SCEV *S, |
| SmallPtrSetImpl<const SCEV*> &Processed, |
| ScalarEvolution &SE) { |
| // Zero/One operand expressions |
| switch (S->getSCEVType()) { |
| case scUnknown: |
| case scConstant: |
| return false; |
| case scTruncate: |
| return isHighCostExpansion(cast<SCEVTruncateExpr>(S)->getOperand(), |
| Processed, SE); |
| case scZeroExtend: |
| return isHighCostExpansion(cast<SCEVZeroExtendExpr>(S)->getOperand(), |
| Processed, SE); |
| case scSignExtend: |
| return isHighCostExpansion(cast<SCEVSignExtendExpr>(S)->getOperand(), |
| Processed, SE); |
| default: |
| break; |
| } |
| |
| if (!Processed.insert(S).second) |
| return false; |
| |
| if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) { |
| for (const SCEV *S : Add->operands()) { |
| if (isHighCostExpansion(S, Processed, SE)) |
| return true; |
| } |
| return false; |
| } |
| |
| if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) { |
| if (Mul->getNumOperands() == 2) { |
| // Multiplication by a constant is ok |
| if (isa<SCEVConstant>(Mul->getOperand(0))) |
| return isHighCostExpansion(Mul->getOperand(1), Processed, SE); |
| |
| // If we have the value of one operand, check if an existing |
| // multiplication already generates this expression. |
| if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Mul->getOperand(1))) { |
| Value *UVal = U->getValue(); |
| for (User *UR : UVal->users()) { |
| // If U is a constant, it may be used by a ConstantExpr. |
| Instruction *UI = dyn_cast<Instruction>(UR); |
| if (UI && UI->getOpcode() == Instruction::Mul && |
| SE.isSCEVable(UI->getType())) { |
| return SE.getSCEV(UI) == Mul; |
| } |
| } |
| } |
| } |
| } |
| |
| if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) { |
| if (isExistingPhi(AR, SE)) |
| return false; |
| } |
| |
| // Fow now, consider any other type of expression (div/mul/min/max) high cost. |
| return true; |
| } |
| |
| namespace { |
| |
| class LSRUse; |
| |
| } // end anonymous namespace |
| |
| /// Check if the addressing mode defined by \p F is completely |
| /// folded in \p LU at isel time. |
| /// This includes address-mode folding and special icmp tricks. |
| /// This function returns true if \p LU can accommodate what \p F |
| /// defines and up to 1 base + 1 scaled + offset. |
| /// In other words, if \p F has several base registers, this function may |
| /// still return true. Therefore, users still need to account for |
| /// additional base registers and/or unfolded offsets to derive an |
| /// accurate cost model. |
| static bool isAMCompletelyFolded(const TargetTransformInfo &TTI, |
| const LSRUse &LU, const Formula &F); |
| |
| // Get the cost of the scaling factor used in F for LU. |
| static InstructionCost getScalingFactorCost(const TargetTransformInfo &TTI, |
| const LSRUse &LU, const Formula &F, |
| const Loop &L); |
| |
| namespace { |
| |
| /// This class is used to measure and compare candidate formulae. |
| class Cost { |
| const Loop *L = nullptr; |
| ScalarEvolution *SE = nullptr; |
| const TargetTransformInfo *TTI = nullptr; |
| TargetTransformInfo::LSRCost C; |
| TTI::AddressingModeKind AMK = TTI::AMK_None; |
| |
| public: |
| Cost() = delete; |
| Cost(const Loop *L, ScalarEvolution &SE, const TargetTransformInfo &TTI, |
| TTI::AddressingModeKind AMK) : |
| L(L), SE(&SE), TTI(&TTI), AMK(AMK) { |
| C.Insns = 0; |
| C.NumRegs = 0; |
| C.AddRecCost = 0; |
| C.NumIVMuls = 0; |
| C.NumBaseAdds = 0; |
| C.ImmCost = 0; |
| C.SetupCost = 0; |
| C.ScaleCost = 0; |
| } |
| |
| bool isLess(Cost &Other); |
| |
| void Lose(); |
| |
| #ifndef NDEBUG |
| // Once any of the metrics loses, they must all remain losers. |
| bool isValid() { |
| return ((C.Insns | C.NumRegs | C.AddRecCost | C.NumIVMuls | C.NumBaseAdds |
| | C.ImmCost | C.SetupCost | C.ScaleCost) != ~0u) |
| || ((C.Insns & C.NumRegs & C.AddRecCost & C.NumIVMuls & C.NumBaseAdds |
| & C.ImmCost & C.SetupCost & C.ScaleCost) == ~0u); |
| } |
| #endif |
| |
| bool isLoser() { |
| assert(isValid() && "invalid cost"); |
| return C.NumRegs == ~0u; |
| } |
| |
| void RateFormula(const Formula &F, |
| SmallPtrSetImpl<const SCEV *> &Regs, |
| const DenseSet<const SCEV *> &VisitedRegs, |
| const LSRUse &LU, |
| SmallPtrSetImpl<const SCEV *> *LoserRegs = nullptr); |
| |
| void print(raw_ostream &OS) const; |
| void dump() const; |
| |
| private: |
| void RateRegister(const Formula &F, const SCEV *Reg, |
| SmallPtrSetImpl<const SCEV *> &Regs); |
| void RatePrimaryRegister(const Formula &F, const SCEV *Reg, |
| SmallPtrSetImpl<const SCEV *> &Regs, |
| SmallPtrSetImpl<const SCEV *> *LoserRegs); |
| }; |
| |
| /// An operand value in an instruction which is to be replaced with some |
| /// equivalent, possibly strength-reduced, replacement. |
| struct LSRFixup { |
| /// The instruction which will be updated. |
| Instruction *UserInst = nullptr; |
| |
| /// The operand of the instruction which will be replaced. The operand may be |
| /// used more than once; every instance will be replaced. |
| Value *OperandValToReplace = nullptr; |
| |
| /// If this user is to use the post-incremented value of an induction |
| /// variable, this set is non-empty and holds the loops associated with the |
| /// induction variable. |
| PostIncLoopSet PostIncLoops; |
| |
| /// A constant offset to be added to the LSRUse expression. This allows |
| /// multiple fixups to share the same LSRUse with different offsets, for |
| /// example in an unrolled loop. |
| int64_t Offset = 0; |
| |
| LSRFixup() = default; |
| |
| bool isUseFullyOutsideLoop(const Loop *L) const; |
| |
| void print(raw_ostream &OS) const; |
| void dump() const; |
| }; |
| |
| /// A DenseMapInfo implementation for holding DenseMaps and DenseSets of sorted |
| /// SmallVectors of const SCEV*. |
| struct UniquifierDenseMapInfo { |
| static SmallVector<const SCEV *, 4> getEmptyKey() { |
| SmallVector<const SCEV *, 4> V; |
| V.push_back(reinterpret_cast<const SCEV *>(-1)); |
| return V; |
| } |
| |
| static SmallVector<const SCEV *, 4> getTombstoneKey() { |
| SmallVector<const SCEV *, 4> V; |
| V.push_back(reinterpret_cast<const SCEV *>(-2)); |
| return V; |
| } |
| |
| static unsigned getHashValue(const SmallVector<const SCEV *, 4> &V) { |
| return static_cast<unsigned>(hash_combine_range(V.begin(), V.end())); |
| } |
| |
| static bool isEqual(const SmallVector<const SCEV *, 4> &LHS, |
| const SmallVector<const SCEV *, 4> &RHS) { |
| return LHS == RHS; |
| } |
| }; |
| |
| /// This class holds the state that LSR keeps for each use in IVUsers, as well |
| /// as uses invented by LSR itself. It includes information about what kinds of |
| /// things can be folded into the user, information about the user itself, and |
| /// information about how the use may be satisfied. TODO: Represent multiple |
| /// users of the same expression in common? |
| class LSRUse { |
| DenseSet<SmallVector<const SCEV *, 4>, UniquifierDenseMapInfo> Uniquifier; |
| |
| public: |
| /// An enum for a kind of use, indicating what types of scaled and immediate |
| /// operands it might support. |
| enum KindType { |
| Basic, ///< A normal use, with no folding. |
| Special, ///< A special case of basic, allowing -1 scales. |
| Address, ///< An address use; folding according to TargetLowering |
| ICmpZero ///< An equality icmp with both operands folded into one. |
| // TODO: Add a generic icmp too? |
| }; |
| |
| using SCEVUseKindPair = PointerIntPair<const SCEV *, 2, KindType>; |
| |
| KindType Kind; |
| MemAccessTy AccessTy; |
| |
| /// The list of operands which are to be replaced. |
| SmallVector<LSRFixup, 8> Fixups; |
| |
| /// Keep track of the min and max offsets of the fixups. |
| int64_t MinOffset = std::numeric_limits<int64_t>::max(); |
| int64_t MaxOffset = std::numeric_limits<int64_t>::min(); |
| |
| /// This records whether all of the fixups using this LSRUse are outside of |
| /// the loop, in which case some special-case heuristics may be used. |
| bool AllFixupsOutsideLoop = true; |
| |
| /// RigidFormula is set to true to guarantee that this use will be associated |
| /// with a single formula--the one that initially matched. Some SCEV |
| /// expressions cannot be expanded. This allows LSR to consider the registers |
| /// used by those expressions without the need to expand them later after |
| /// changing the formula. |
| bool RigidFormula = false; |
| |
| /// This records the widest use type for any fixup using this |
| /// LSRUse. FindUseWithSimilarFormula can't consider uses with different max |
| /// fixup widths to be equivalent, because the narrower one may be relying on |
| /// the implicit truncation to truncate away bogus bits. |
| Type *WidestFixupType = nullptr; |
| |
| /// A list of ways to build a value that can satisfy this user. After the |
| /// list is populated, one of these is selected heuristically and used to |
| /// formulate a replacement for OperandValToReplace in UserInst. |
| SmallVector<Formula, 12> Formulae; |
| |
| /// The set of register candidates used by all formulae in this LSRUse. |
| SmallPtrSet<const SCEV *, 4> Regs; |
| |
| LSRUse(KindType K, MemAccessTy AT) : Kind(K), AccessTy(AT) {} |
| |
| LSRFixup &getNewFixup() { |
| Fixups.push_back(LSRFixup()); |
| return Fixups.back(); |
| } |
| |
| void pushFixup(LSRFixup &f) { |
| Fixups.push_back(f); |
| if (f.Offset > MaxOffset) |
| MaxOffset = f.Offset; |
| if (f.Offset < MinOffset) |
| MinOffset = f.Offset; |
| } |
| |
| bool HasFormulaWithSameRegs(const Formula &F) const; |
| float getNotSelectedProbability(const SCEV *Reg) const; |
| bool InsertFormula(const Formula &F, const Loop &L); |
| void DeleteFormula(Formula &F); |
| void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses); |
| |
| void print(raw_ostream &OS) const; |
| void dump() const; |
| }; |
| |
| } // end anonymous namespace |
| |
| static bool isAMCompletelyFolded(const TargetTransformInfo &TTI, |
| LSRUse::KindType Kind, MemAccessTy AccessTy, |
| GlobalValue *BaseGV, int64_t BaseOffset, |
| bool HasBaseReg, int64_t Scale, |
| Instruction *Fixup = nullptr); |
| |
| static unsigned getSetupCost(const SCEV *Reg, unsigned Depth) { |
| if (isa<SCEVUnknown>(Reg) || isa<SCEVConstant>(Reg)) |
| return 1; |
| if (Depth == 0) |
| return 0; |
| if (const auto *S = dyn_cast<SCEVAddRecExpr>(Reg)) |
| return getSetupCost(S->getStart(), Depth - 1); |
| if (auto S = dyn_cast<SCEVIntegralCastExpr>(Reg)) |
| return getSetupCost(S->getOperand(), Depth - 1); |
| if (auto S = dyn_cast<SCEVNAryExpr>(Reg)) |
| return std::accumulate(S->op_begin(), S->op_end(), 0, |
| [&](unsigned i, const SCEV *Reg) { |
| return i + getSetupCost(Reg, Depth - 1); |
| }); |
| if (auto S = dyn_cast<SCEVUDivExpr>(Reg)) |
| return getSetupCost(S->getLHS(), Depth - 1) + |
| getSetupCost(S->getRHS(), Depth - 1); |
| return 0; |
| } |
| |
| /// Tally up interesting quantities from the given register. |
| void Cost::RateRegister(const Formula &F, const SCEV *Reg, |
| SmallPtrSetImpl<const SCEV *> &Regs) { |
| if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) { |
| // If this is an addrec for another loop, it should be an invariant |
| // with respect to L since L is the innermost loop (at least |
| // for now LSR only handles innermost loops). |
| if (AR->getLoop() != L) { |
| // If the AddRec exists, consider it's register free and leave it alone. |
| if (isExistingPhi(AR, *SE) && AMK != TTI::AMK_PostIndexed) |
| return; |
| |
| // It is bad to allow LSR for current loop to add induction variables |
| // for its sibling loops. |
| if (!AR->getLoop()->contains(L)) { |
| Lose(); |
| return; |
| } |
| |
| // Otherwise, it will be an invariant with respect to Loop L. |
| ++C.NumRegs; |
| return; |
| } |
| |
| unsigned LoopCost = 1; |
| if (TTI->isIndexedLoadLegal(TTI->MIM_PostInc, AR->getType()) || |
| TTI->isIndexedStoreLegal(TTI->MIM_PostInc, AR->getType())) { |
| |
| // If the step size matches the base offset, we could use pre-indexed |
| // addressing. |
| if (AMK == TTI::AMK_PreIndexed) { |
| if (auto *Step = dyn_cast<SCEVConstant>(AR->getStepRecurrence(*SE))) |
| if (Step->getAPInt() == F.BaseOffset) |
| LoopCost = 0; |
| } else if (AMK == TTI::AMK_PostIndexed) { |
| const SCEV *LoopStep = AR->getStepRecurrence(*SE); |
| if (isa<SCEVConstant>(LoopStep)) { |
| const SCEV *LoopStart = AR->getStart(); |
| if (!isa<SCEVConstant>(LoopStart) && |
| SE->isLoopInvariant(LoopStart, L)) |
| LoopCost = 0; |
| } |
| } |
| } |
| C.AddRecCost += LoopCost; |
| |
| // Add the step value register, if it needs one. |
| // TODO: The non-affine case isn't precisely modeled here. |
| if (!AR->isAffine() || !isa<SCEVConstant>(AR->getOperand(1))) { |
| if (!Regs.count(AR->getOperand(1))) { |
| RateRegister(F, AR->getOperand(1), Regs); |
| if (isLoser()) |
| return; |
| } |
| } |
| } |
| ++C.NumRegs; |
| |
| // Rough heuristic; favor registers which don't require extra setup |
| // instructions in the preheader. |
| C.SetupCost += getSetupCost(Reg, SetupCostDepthLimit); |
| // Ensure we don't, even with the recusion limit, produce invalid costs. |
| C.SetupCost = std::min<unsigned>(C.SetupCost, 1 << 16); |
| |
| C.NumIVMuls += isa<SCEVMulExpr>(Reg) && |
| SE->hasComputableLoopEvolution(Reg, L); |
| } |
| |
| /// Record this register in the set. If we haven't seen it before, rate |
| /// it. Optional LoserRegs provides a way to declare any formula that refers to |
| /// one of those regs an instant loser. |
| void Cost::RatePrimaryRegister(const Formula &F, const SCEV *Reg, |
| SmallPtrSetImpl<const SCEV *> &Regs, |
| SmallPtrSetImpl<const SCEV *> *LoserRegs) { |
| if (LoserRegs && LoserRegs->count(Reg)) { |
| Lose(); |
| return; |
| } |
| if (Regs.insert(Reg).second) { |
| RateRegister(F, Reg, Regs); |
| if (LoserRegs && isLoser()) |
| LoserRegs->insert(Reg); |
| } |
| } |
| |
| void Cost::RateFormula(const Formula &F, |
| SmallPtrSetImpl<const SCEV *> &Regs, |
| const DenseSet<const SCEV *> &VisitedRegs, |
| const LSRUse &LU, |
| SmallPtrSetImpl<const SCEV *> *LoserRegs) { |
| assert(F.isCanonical(*L) && "Cost is accurate only for canonical formula"); |
| // Tally up the registers. |
| unsigned PrevAddRecCost = C.AddRecCost; |
| unsigned PrevNumRegs = C.NumRegs; |
| unsigned PrevNumBaseAdds = C.NumBaseAdds; |
| if (const SCEV *ScaledReg = F.ScaledReg) { |
| if (VisitedRegs.count(ScaledReg)) { |
| Lose(); |
| return; |
| } |
| RatePrimaryRegister(F, ScaledReg, Regs, LoserRegs); |
| if (isLoser()) |
| return; |
| } |
| for (const SCEV *BaseReg : F.BaseRegs) { |
| if (VisitedRegs.count(BaseReg)) { |
| Lose(); |
| return; |
| } |
| RatePrimaryRegister(F, BaseReg, Regs, LoserRegs); |
| if (isLoser()) |
| return; |
| } |
| |
| // Determine how many (unfolded) adds we'll need inside the loop. |
| size_t NumBaseParts = F.getNumRegs(); |
| if (NumBaseParts > 1) |
| // Do not count the base and a possible second register if the target |
| // allows to fold 2 registers. |
| C.NumBaseAdds += |
| NumBaseParts - (1 + (F.Scale && isAMCompletelyFolded(*TTI, LU, F))); |
| C.NumBaseAdds += (F.UnfoldedOffset != 0); |
| |
| // Accumulate non-free scaling amounts. |
| C.ScaleCost += *getScalingFactorCost(*TTI, LU, F, *L).getValue(); |
| |
| // Tally up the non-zero immediates. |
| for (const LSRFixup &Fixup : LU.Fixups) { |
| int64_t O = Fixup.Offset; |
| int64_t Offset = (uint64_t)O + F.BaseOffset; |
| if (F.BaseGV) |
| C.ImmCost += 64; // Handle symbolic values conservatively. |
| // TODO: This should probably be the pointer size. |
| else if (Offset != 0) |
| C.ImmCost += APInt(64, Offset, true).getMinSignedBits(); |
| |
| // Check with target if this offset with this instruction is |
| // specifically not supported. |
| if (LU.Kind == LSRUse::Address && Offset != 0 && |
| !isAMCompletelyFolded(*TTI, LSRUse::Address, LU.AccessTy, F.BaseGV, |
| Offset, F.HasBaseReg, F.Scale, Fixup.UserInst)) |
| C.NumBaseAdds++; |
| } |
| |
| // If we don't count instruction cost exit here. |
| if (!InsnsCost) { |
| assert(isValid() && "invalid cost"); |
| return; |
| } |
| |
| // Treat every new register that exceeds TTI.getNumberOfRegisters() - 1 as |
| // additional instruction (at least fill). |
| // TODO: Need distinguish register class? |
| unsigned TTIRegNum = TTI->getNumberOfRegisters( |
| TTI->getRegisterClassForType(false, F.getType())) - 1; |
| if (C.NumRegs > TTIRegNum) { |
| // Cost already exceeded TTIRegNum, then only newly added register can add |
| // new instructions. |
| if (PrevNumRegs > TTIRegNum) |
| C.Insns += (C.NumRegs - PrevNumRegs); |
| else |
| C.Insns += (C.NumRegs - TTIRegNum); |
| } |
| |
| // If ICmpZero formula ends with not 0, it could not be replaced by |
| // just add or sub. We'll need to compare final result of AddRec. |
| // That means we'll need an additional instruction. But if the target can |
| // macro-fuse a compare with a branch, don't count this extra instruction. |
| // For -10 + {0, +, 1}: |
| // i = i + 1; |
| // cmp i, 10 |
| // |
| // For {-10, +, 1}: |
| // i = i + 1; |
| if (LU.Kind == LSRUse::ICmpZero && !F.hasZeroEnd() && |
| !TTI->canMacroFuseCmp()) |
| C.Insns++; |
| // Each new AddRec adds 1 instruction to calculation. |
| C.Insns += (C.AddRecCost - PrevAddRecCost); |
| |
| // BaseAdds adds instructions for unfolded registers. |
| if (LU.Kind != LSRUse::ICmpZero) |
| C.Insns += C.NumBaseAdds - PrevNumBaseAdds; |
| assert(isValid() && "invalid cost"); |
| } |
| |
| /// Set this cost to a losing value. |
| void Cost::Lose() { |
| C.Insns = std::numeric_limits<unsigned>::max(); |
| C.NumRegs = std::numeric_limits<unsigned>::max(); |
| C.AddRecCost = std::numeric_limits<unsigned>::max(); |
| C.NumIVMuls = std::numeric_limits<unsigned>::max(); |
| C.NumBaseAdds = std::numeric_limits<unsigned>::max(); |
| C.ImmCost = std::numeric_limits<unsigned>::max(); |
| C.SetupCost = std::numeric_limits<unsigned>::max(); |
| C.ScaleCost = std::numeric_limits<unsigned>::max(); |
| } |
| |
| /// Choose the lower cost. |
| bool Cost::isLess(Cost &Other) { |
| if (InsnsCost.getNumOccurrences() > 0 && InsnsCost && |
| C.Insns != Other.C.Insns) |
| return C.Insns < Other.C.Insns; |
| return TTI->isLSRCostLess(C, Other.C); |
| } |
| |
| #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) |
| void Cost::print(raw_ostream &OS) const { |
| if (InsnsCost) |
| OS << C.Insns << " instruction" << (C.Insns == 1 ? " " : "s "); |
| OS << C.NumRegs << " reg" << (C.NumRegs == 1 ? "" : "s"); |
| if (C.AddRecCost != 0) |
| OS << ", with addrec cost " << C.AddRecCost; |
| if (C.NumIVMuls != 0) |
| OS << ", plus " << C.NumIVMuls << " IV mul" |
| << (C.NumIVMuls == 1 ? "" : "s"); |
| if (C.NumBaseAdds != 0) |
| OS << ", plus " << C.NumBaseAdds << " base add" |
| << (C.NumBaseAdds == 1 ? "" : "s"); |
| if (C.ScaleCost != 0) |
| OS << ", plus " << C.ScaleCost << " scale cost"; |
| if (C.ImmCost != 0) |
| OS << ", plus " << C.ImmCost << " imm cost"; |
| if (C.SetupCost != 0) |
| OS << ", plus " << C.SetupCost << " setup cost"; |
| } |
| |
| LLVM_DUMP_METHOD void Cost::dump() const { |
| print(errs()); errs() << '\n'; |
| } |
| #endif |
| |
| /// Test whether this fixup always uses its value outside of the given loop. |
| bool LSRFixup::isUseFullyOutsideLoop(const Loop *L) const { |
| // PHI nodes use their value in their incoming blocks. |
| if (const PHINode *PN = dyn_cast<PHINode>(UserInst)) { |
| for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) |
| if (PN->getIncomingValue(i) == OperandValToReplace && |
| L->contains(PN->getIncomingBlock(i))) |
| return false; |
| return true; |
| } |
| |
| return !L->contains(UserInst); |
| } |
| |
| #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) |
| void LSRFixup::print(raw_ostream &OS) const { |
| OS << "UserInst="; |
| // Store is common and interesting enough to be worth special-casing. |
| if (StoreInst *Store = dyn_cast<StoreInst>(UserInst)) { |
| OS << "store "; |
| Store->getOperand(0)->printAsOperand(OS, /*PrintType=*/false); |
| } else if (UserInst->getType()->isVoidTy()) |
| OS << UserInst->getOpcodeName(); |
| else |
| UserInst->printAsOperand(OS, /*PrintType=*/false); |
| |
| OS << ", OperandValToReplace="; |
| OperandValToReplace->printAsOperand(OS, /*PrintType=*/false); |
| |
| for (const Loop *PIL : PostIncLoops) { |
| OS << ", PostIncLoop="; |
| PIL->getHeader()->printAsOperand(OS, /*PrintType=*/false); |
| } |
| |
| if (Offset != 0) |
| OS << ", Offset=" << Offset; |
| } |
| |
| LLVM_DUMP_METHOD void LSRFixup::dump() const { |
| print(errs()); errs() << '\n'; |
| } |
| #endif |
| |
| /// Test whether this use as a formula which has the same registers as the given |
| /// formula. |
| bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const { |
| SmallVector<const SCEV *, 4> Key = F.BaseRegs; |
| if (F.ScaledReg) Key.push_back(F.ScaledReg); |
| // Unstable sort by host order ok, because this is only used for uniquifying. |
| llvm::sort(Key); |
| return Uniquifier.count(Key); |
| } |
| |
| /// The function returns a probability of selecting formula without Reg. |
| float LSRUse::getNotSelectedProbability(const SCEV *Reg) const { |
| unsigned FNum = 0; |
| for (const Formula &F : Formulae) |
| if (F.referencesReg(Reg)) |
| FNum++; |
| return ((float)(Formulae.size() - FNum)) / Formulae.size(); |
| } |
| |
| /// If the given formula has not yet been inserted, add it to the list, and |
| /// return true. Return false otherwise. The formula must be in canonical form. |
| bool LSRUse::InsertFormula(const Formula &F, const Loop &L) { |
| assert(F.isCanonical(L) && "Invalid canonical representation"); |
| |
| if (!Formulae.empty() && RigidFormula) |
| return false; |
| |
| SmallVector<const SCEV *, 4> Key = F.BaseRegs; |
| if (F.ScaledReg) Key.push_back(F.ScaledReg); |
| // Unstable sort by host order ok, because this is only used for uniquifying. |
| llvm::sort(Key); |
| |
| if (!Uniquifier.insert(Key).second) |
| return false; |
| |
| // Using a register to hold the value of 0 is not profitable. |
| assert((!F.ScaledReg || !F.ScaledReg->isZero()) && |
| "Zero allocated in a scaled register!"); |
| #ifndef NDEBUG |
| for (const SCEV *BaseReg : F.BaseRegs) |
| assert(!BaseReg->isZero() && "Zero allocated in a base register!"); |
| #endif |
| |
| // Add the formula to the list. |
| Formulae.push_back(F); |
| |
| // Record registers now being used by this use. |
| Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end()); |
| if (F.ScaledReg) |
| Regs.insert(F.ScaledReg); |
| |
| return true; |
| } |
| |
| /// Remove the given formula from this use's list. |
| void LSRUse::DeleteFormula(Formula &F) { |
| if (&F != &Formulae.back()) |
| std::swap(F, Formulae.back()); |
| Formulae.pop_back(); |
| } |
| |
| /// Recompute the Regs field, and update RegUses. |
| void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) { |
| // Now that we've filtered out some formulae, recompute the Regs set. |
| SmallPtrSet<const SCEV *, 4> OldRegs = std::move(Regs); |
| Regs.clear(); |
| for (const Formula &F : Formulae) { |
| if (F.ScaledReg) Regs.insert(F.ScaledReg); |
| Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end()); |
| } |
| |
| // Update the RegTracker. |
| for (const SCEV *S : OldRegs) |
| if (!Regs.count(S)) |
| RegUses.dropRegister(S, LUIdx); |
| } |
| |
| #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) |
| void LSRUse::print(raw_ostream &OS) const { |
| OS << "LSR Use: Kind="; |
| switch (Kind) { |
| case Basic: OS << "Basic"; break; |
| case Special: OS << "Special"; break; |
| case ICmpZero: OS << "ICmpZero"; break; |
| case Address: |
| OS << "Address of "; |
| if (AccessTy.MemTy->isPointerTy()) |
| OS << "pointer"; // the full pointer type could be really verbose |
| else { |
| OS << *AccessTy.MemTy; |
| } |
| |
| OS << " in addrspace(" << AccessTy.AddrSpace << ')'; |
| } |
| |
| OS << ", Offsets={"; |
| bool NeedComma = false; |
| for (const LSRFixup &Fixup : Fixups) { |
| if (NeedComma) OS << ','; |
| OS << Fixup.Offset; |
| NeedComma = true; |
| } |
| OS << '}'; |
| |
| if (AllFixupsOutsideLoop) |
| OS << ", all-fixups-outside-loop"; |
| |
| if (WidestFixupType) |
| OS << ", widest fixup type: " << *WidestFixupType; |
| } |
| |
| LLVM_DUMP_METHOD void LSRUse::dump() const { |
| print(errs()); errs() << '\n'; |
| } |
| #endif |
| |
| static bool isAMCompletelyFolded(const TargetTransformInfo &TTI, |
| LSRUse::KindType Kind, MemAccessTy AccessTy, |
| GlobalValue *BaseGV, int64_t BaseOffset, |
| bool HasBaseReg, int64_t Scale, |
| Instruction *Fixup/*= nullptr*/) { |
| switch (Kind) { |
| case LSRUse::Address: |
| return TTI.isLegalAddressingMode(AccessTy.MemTy, BaseGV, BaseOffset, |
| HasBaseReg, Scale, AccessTy.AddrSpace, Fixup); |
| |
| case LSRUse::ICmpZero: |
| // There's not even a target hook for querying whether it would be legal to |
| // fold a GV into an ICmp. |
| if (BaseGV) |
| return false; |
| |
| // ICmp only has two operands; don't allow more than two non-trivial parts. |
| if (Scale != 0 && HasBaseReg && BaseOffset != 0) |
| return false; |
| |
| // ICmp only supports no scale or a -1 scale, as we can "fold" a -1 scale by |
| // putting the scaled register in the other operand of the icmp. |
| if (Scale != 0 && Scale != -1) |
| return false; |
| |
| // If we have low-level target information, ask the target if it can fold an |
| // integer immediate on an icmp. |
| if (BaseOffset != 0) { |
| // We have one of: |
| // ICmpZero BaseReg + BaseOffset => ICmp BaseReg, -BaseOffset |
| // ICmpZero -1*ScaleReg + BaseOffset => ICmp ScaleReg, BaseOffset |
| // Offs is the ICmp immediate. |
| if (Scale == 0) |
| // The cast does the right thing with |
| // std::numeric_limits<int64_t>::min(). |
| BaseOffset = -(uint64_t)BaseOffset; |
| return TTI.isLegalICmpImmediate(BaseOffset); |
| } |
| |
| // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg |
| return true; |
| |
| case LSRUse::Basic: |
| // Only handle single-register values. |
| return !BaseGV && Scale == 0 && BaseOffset == 0; |
| |
| case LSRUse::Special: |
| // Special case Basic to handle -1 scales. |
| return !BaseGV && (Scale == 0 || Scale == -1) && BaseOffset == 0; |
| } |
| |
| llvm_unreachable("Invalid LSRUse Kind!"); |
| } |
| |
| static bool isAMCompletelyFolded(const TargetTransformInfo &TTI, |
| int64_t MinOffset, int64_t MaxOffset, |
| LSRUse::KindType Kind, MemAccessTy AccessTy, |
| GlobalValue *BaseGV, int64_t BaseOffset, |
| bool HasBaseReg, int64_t Scale) { |
| // Check for overflow. |
| if (((int64_t)((uint64_t)BaseOffset + MinOffset) > BaseOffset) != |
| (MinOffset > 0)) |
| return false; |
| MinOffset = (uint64_t)BaseOffset + MinOffset; |
| if (((int64_t)((uint64_t)BaseOffset + MaxOffset) > BaseOffset) != |
| (MaxOffset > 0)) |
| return false; |
| MaxOffset = (uint64_t)BaseOffset + MaxOffset; |
| |
| return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MinOffset, |
| HasBaseReg, Scale) && |
| isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MaxOffset, |
| HasBaseReg, Scale); |
| } |
| |
| static bool isAMCompletelyFolded(const TargetTransformInfo &TTI, |
| int64_t MinOffset, int64_t MaxOffset, |
| LSRUse::KindType Kind, MemAccessTy AccessTy, |
| const Formula &F, const Loop &L) { |
| // For the purpose of isAMCompletelyFolded either having a canonical formula |
| // or a scale not equal to zero is correct. |
| // Problems may arise from non canonical formulae having a scale == 0. |
| // Strictly speaking it would best to just rely on canonical formulae. |
| // However, when we generate the scaled formulae, we first check that the |
| // scaling factor is profitable before computing the actual ScaledReg for |
| // compile time sake. |
| assert((F.isCanonical(L) || F.Scale != 0)); |
| return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, |
| F.BaseGV, F.BaseOffset, F.HasBaseReg, F.Scale); |
| } |
| |
| /// Test whether we know how to expand the current formula. |
| static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset, |
| int64_t MaxOffset, LSRUse::KindType Kind, |
| MemAccessTy AccessTy, GlobalValue *BaseGV, |
| int64_t BaseOffset, bool HasBaseReg, int64_t Scale) { |
| // We know how to expand completely foldable formulae. |
| return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV, |
| BaseOffset, HasBaseReg, Scale) || |
| // Or formulae that use a base register produced by a sum of base |
| // registers. |
| (Scale == 1 && |
| isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, |
| BaseGV, BaseOffset, true, 0)); |
| } |
| |
| static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset, |
| int64_t MaxOffset, LSRUse::KindType Kind, |
| MemAccessTy AccessTy, const Formula &F) { |
| return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, F.BaseGV, |
| F.BaseOffset, F.HasBaseReg, F.Scale); |
| } |
| |
| static bool isAMCompletelyFolded(const TargetTransformInfo &TTI, |
| const LSRUse &LU, const Formula &F) { |
| // Target may want to look at the user instructions. |
| if (LU.Kind == LSRUse::Address && TTI.LSRWithInstrQueries()) { |
| for (const LSRFixup &Fixup : LU.Fixups) |
| if (!isAMCompletelyFolded(TTI, LSRUse::Address, LU.AccessTy, F.BaseGV, |
| (F.BaseOffset + Fixup.Offset), F.HasBaseReg, |
| F.Scale, Fixup.UserInst)) |
| return false; |
| return true; |
| } |
| |
| return isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, |
| LU.AccessTy, F.BaseGV, F.BaseOffset, F.HasBaseReg, |
| F.Scale); |
| } |
| |
| static InstructionCost getScalingFactorCost(const TargetTransformInfo &TTI, |
| const LSRUse &LU, const Formula &F, |
| const Loop &L) { |
| if (!F.Scale) |
| return 0; |
| |
| // If the use is not completely folded in that instruction, we will have to |
| // pay an extra cost only for scale != 1. |
| if (!isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, |
| LU.AccessTy, F, L)) |
| return F.Scale != 1; |
| |
| switch (LU.Kind) { |
| case LSRUse::Address: { |
| // Check the scaling factor cost with both the min and max offsets. |
| InstructionCost ScaleCostMinOffset = TTI.getScalingFactorCost( |
| LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MinOffset, F.HasBaseReg, |
| F.Scale, LU.AccessTy.AddrSpace); |
| InstructionCost ScaleCostMaxOffset = TTI.getScalingFactorCost( |
| LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MaxOffset, F.HasBaseReg, |
| F.Scale, LU.AccessTy.AddrSpace); |
| |
| assert(ScaleCostMinOffset.isValid() && ScaleCostMaxOffset.isValid() && |
| "Legal addressing mode has an illegal cost!"); |
| return std::max(ScaleCostMinOffset, ScaleCostMaxOffset); |
| } |
| case LSRUse::ICmpZero: |
| case LSRUse::Basic: |
| case LSRUse::Special: |
| // The use is completely folded, i.e., everything is folded into the |
| // instruction. |
| return 0; |
| } |
| |
| llvm_unreachable("Invalid LSRUse Kind!"); |
| } |
| |
| static bool isAlwaysFoldable(const TargetTransformInfo &TTI, |
| LSRUse::KindType Kind, MemAccessTy AccessTy, |
| GlobalValue *BaseGV, int64_t BaseOffset, |
| bool HasBaseReg) { |
| // Fast-path: zero is always foldable. |
| if (BaseOffset == 0 && !BaseGV) return true; |
| |
| // Conservatively, create an address with an immediate and a |
| // base and a scale. |
| int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1; |
| |
| // Canonicalize a scale of 1 to a base register if the formula doesn't |
| // already have a base register. |
| if (!HasBaseReg && Scale == 1) { |
| Scale = 0; |
| HasBaseReg = true; |
| } |
| |
| return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, BaseOffset, |
| HasBaseReg, Scale); |
| } |
| |
| static bool isAlwaysFoldable(const TargetTransformInfo &TTI, |
| ScalarEvolution &SE, int64_t MinOffset, |
| int64_t MaxOffset, LSRUse::KindType Kind, |
| MemAccessTy AccessTy, const SCEV *S, |
| bool HasBaseReg) { |
| // Fast-path: zero is always foldable. |
| if (S->isZero()) return true; |
| |
| // Conservatively, create an address with an immediate and a |
| // base and a scale. |
| int64_t BaseOffset = ExtractImmediate(S, SE); |
| GlobalValue *BaseGV = ExtractSymbol(S, SE); |
| |
| // If there's anything else involved, it's not foldable. |
| if (!S->isZero()) return false; |
| |
| // Fast-path: zero is always foldable. |
| if (BaseOffset == 0 && !BaseGV) return true; |
| |
| // Conservatively, create an address with an immediate and a |
| // base and a scale. |
| int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1; |
| |
| return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV, |
| BaseOffset, HasBaseReg, Scale); |
| } |
| |
| namespace { |
| |
| /// An individual increment in a Chain of IV increments. Relate an IV user to |
| /// an expression that computes the IV it uses from the IV used by the previous |
| /// link in the Chain. |
| /// |
| /// For the head of a chain, IncExpr holds the absolute SCEV expression for the |
| /// original IVOperand. The head of the chain's IVOperand is only valid during |
| /// chain collection, before LSR replaces IV users. During chain generation, |
| /// IncExpr can be used to find the new IVOperand that computes the same |
| /// expression. |
| struct IVInc { |
| Instruction *UserInst; |
| Value* IVOperand; |
| const SCEV *IncExpr; |
| |
| IVInc(Instruction *U, Value *O, const SCEV *E) |
| : UserInst(U), IVOperand(O), IncExpr(E) {} |
| }; |
| |
| // The list of IV increments in program order. We typically add the head of a |
| // chain without finding subsequent links. |
| struct IVChain { |
| SmallVector<IVInc, 1> Incs; |
| const SCEV *ExprBase = nullptr; |
| |
| IVChain() = default; |
| IVChain(const IVInc &Head, const SCEV *Base) |
| : Incs(1, Head), ExprBase(Base) {} |
| |
| using const_iterator = SmallVectorImpl<IVInc>::const_iterator; |
| |
| // Return the first increment in the chain. |
| const_iterator begin() const { |
| assert(!Incs.empty()); |
| return std::next(Incs.begin()); |
| } |
| const_iterator end() const { |
| return Incs.end(); |
| } |
| |
| // Returns true if this chain contains any increments. |
| bool hasIncs() const { return Incs.size() >= 2; } |
| |
| // Add an IVInc to the end of this chain. |
| void add(const IVInc &X) { Incs.push_back(X); } |
| |
| // Returns the last UserInst in the chain. |
| Instruction *tailUserInst() const { return Incs.back().UserInst; } |
| |
| // Returns true if IncExpr can be profitably added to this chain. |
| bool isProfitableIncrement(const SCEV *OperExpr, |
| const SCEV *IncExpr, |
| ScalarEvolution&); |
| }; |
| |
| /// Helper for CollectChains to track multiple IV increment uses. Distinguish |
| /// between FarUsers that definitely cross IV increments and NearUsers that may |
| /// be used between IV increments. |
| struct ChainUsers { |
| SmallPtrSet<Instruction*, 4> FarUsers; |
| SmallPtrSet<Instruction*, 4> NearUsers; |
| }; |
| |
| /// This class holds state for the main loop strength reduction logic. |
| class LSRInstance { |
| IVUsers &IU; |
| ScalarEvolution &SE; |
| DominatorTree &DT; |
| LoopInfo &LI; |
| AssumptionCache &AC; |
| TargetLibraryInfo &TLI; |
| const TargetTransformInfo &TTI; |
| Loop *const L; |
| MemorySSAUpdater *MSSAU; |
| TTI::AddressingModeKind AMK; |
| bool Changed = false; |
| |
| /// This is the insert position that the current loop's induction variable |
| /// increment should be placed. In simple loops, this is the latch block's |
| /// terminator. But in more complicated cases, this is a position which will |
| /// dominate all the in-loop post-increment users. |
| Instruction *IVIncInsertPos = nullptr; |
| |
| /// Interesting factors between use strides. |
| /// |
| /// We explicitly use a SetVector which contains a SmallSet, instead of the |
| /// default, a SmallDenseSet, because we need to use the full range of |
| /// int64_ts, and there's currently no good way of doing that with |
| /// SmallDenseSet. |
| SetVector<int64_t, SmallVector<int64_t, 8>, SmallSet<int64_t, 8>> Factors; |
| |
| /// Interesting use types, to facilitate truncation reuse. |
| SmallSetVector<Type *, 4> Types; |
| |
| /// The list of interesting uses. |
| mutable SmallVector<LSRUse, 16> Uses; |
| |
| /// Track which uses use which register candidates. |
| RegUseTracker RegUses; |
| |
| // Limit the number of chains to avoid quadratic behavior. We don't expect to |
| // have more than a few IV increment chains in a loop. Missing a Chain falls |
| // back to normal LSR behavior for those uses. |
| static const unsigned MaxChains = 8; |
| |
| /// IV users can form a chain of IV increments. |
| SmallVector<IVChain, MaxChains> IVChainVec; |
| |
| /// IV users that belong to profitable IVChains. |
| SmallPtrSet<Use*, MaxChains> IVIncSet; |
| |
| /// Induction variables that were generated and inserted by the SCEV Expander. |
| SmallVector<llvm::WeakVH, 2> ScalarEvolutionIVs; |
| |
| void OptimizeShadowIV(); |
| bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse); |
| ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse); |
| void OptimizeLoopTermCond(); |
| |
| void ChainInstruction(Instruction *UserInst, Instruction *IVOper, |
| SmallVectorImpl<ChainUsers> &ChainUsersVec); |
| void FinalizeChain(IVChain &Chain); |
| void CollectChains(); |
| void GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter, |
| SmallVectorImpl<WeakTrackingVH> &DeadInsts); |
| |
| void CollectInterestingTypesAndFactors(); |
| void CollectFixupsAndInitialFormulae(); |
| |
| // Support for sharing of LSRUses between LSRFixups. |
| using UseMapTy = DenseMap<LSRUse::SCEVUseKindPair, size_t>; |
| UseMapTy UseMap; |
| |
| bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg, |
| LSRUse::KindType Kind, MemAccessTy AccessTy); |
| |
| std::pair<size_t, int64_t> getUse(const SCEV *&Expr, LSRUse::KindType Kind, |
| MemAccessTy AccessTy); |
| |
| void DeleteUse(LSRUse &LU, size_t LUIdx); |
| |
| LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU); |
| |
| void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx); |
| void InsertSupplementalFormula(const SCEV *S, LSRUse &LU, size_t LUIdx); |
| void CountRegisters(const Formula &F, size_t LUIdx); |
| bool InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F); |
| |
| void CollectLoopInvariantFixupsAndFormulae(); |
| |
| void GenerateReassociations(LSRUse &LU, unsigned LUIdx, Formula Base, |
| unsigned Depth = 0); |
| |
| void GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx, |
| const Formula &Base, unsigned Depth, |
| size_t Idx, bool IsScaledReg = false); |
| void GenerateCombinations(LSRUse &LU, unsigned LUIdx, Formula Base); |
| void GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx, |
| const Formula &Base, size_t Idx, |
| bool IsScaledReg = false); |
| void GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx, Formula Base); |
| void GenerateConstantOffsetsImpl(LSRUse &LU, unsigned LUIdx, |
| const Formula &Base, |
| const SmallVectorImpl<int64_t> &Worklist, |
| size_t Idx, bool IsScaledReg = false); |
| void GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx, Formula Base); |
| void GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, Formula Base); |
| void GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base); |
| void GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base); |
| void GenerateCrossUseConstantOffsets(); |
| void GenerateAllReuseFormulae(); |
| |
| void FilterOutUndesirableDedicatedRegisters(); |
| |
| size_t EstimateSearchSpaceComplexity() const; |
| void NarrowSearchSpaceByDetectingSupersets(); |
| void NarrowSearchSpaceByCollapsingUnrolledCode(); |
| void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters(); |
| void NarrowSearchSpaceByFilterFormulaWithSameScaledReg(); |
| void NarrowSearchSpaceByFilterPostInc(); |
| void NarrowSearchSpaceByDeletingCostlyFormulas(); |
| void NarrowSearchSpaceByPickingWinnerRegs(); |
| void NarrowSearchSpaceUsingHeuristics(); |
| |
| void SolveRecurse(SmallVectorImpl<const Formula *> &Solution, |
| Cost &SolutionCost, |
| SmallVectorImpl<const Formula *> &Workspace, |
| const Cost &CurCost, |
| const SmallPtrSet<const SCEV *, 16> &CurRegs, |
| DenseSet<const SCEV *> &VisitedRegs) const; |
| void Solve(SmallVectorImpl<const Formula *> &Solution) const; |
| |
| BasicBlock::iterator |
| HoistInsertPosition(BasicBlock::iterator IP, |
| const SmallVectorImpl<Instruction *> &Inputs) const; |
| BasicBlock::iterator |
| AdjustInsertPositionForExpand(BasicBlock::iterator IP, |
| const LSRFixup &LF, |
| const LSRUse &LU, |
| SCEVExpander &Rewriter) const; |
| |
| Value *Expand(const LSRUse &LU, const LSRFixup &LF, const Formula &F, |
| BasicBlock::iterator IP, SCEVExpander &Rewriter, |
| SmallVectorImpl<WeakTrackingVH> &DeadInsts) const; |
| void RewriteForPHI(PHINode *PN, const LSRUse &LU, const LSRFixup &LF, |
| const Formula &F, SCEVExpander &Rewriter, |
| SmallVectorImpl<WeakTrackingVH> &DeadInsts) const; |
| void Rewrite(const LSRUse &LU, const LSRFixup &LF, const Formula &F, |
| SCEVExpander &Rewriter, |
| SmallVectorImpl<WeakTrackingVH> &DeadInsts) const; |
| void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution); |
| |
| public: |
| LSRInstance(Loop *L, IVUsers &IU, ScalarEvolution &SE, DominatorTree &DT, |
| LoopInfo &LI, const TargetTransformInfo &TTI, AssumptionCache &AC, |
| TargetLibraryInfo &TLI, MemorySSAUpdater *MSSAU); |
| |
| bool getChanged() const { return Changed; } |
| const SmallVectorImpl<WeakVH> &getScalarEvolutionIVs() const { |
| return ScalarEvolutionIVs; |
| } |
| |
| void print_factors_and_types(raw_ostream &OS) const; |
| void print_fixups(raw_ostream &OS) const; |
| void print_uses(raw_ostream &OS) const; |
| void print(raw_ostream &OS) const; |
| void dump() const; |
| }; |
| |
| } // end anonymous namespace |
| |
| /// If IV is used in a int-to-float cast inside the loop then try to eliminate |
| /// the cast operation. |
| void LSRInstance::OptimizeShadowIV() { |
| const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L); |
| if (isa<SCEVCouldNotCompute>(BackedgeTakenCount)) |
| return; |
| |
| for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); |
| UI != E; /* empty */) { |
| IVUsers::const_iterator CandidateUI = UI; |
| ++UI; |
| Instruction *ShadowUse = CandidateUI->getUser(); |
| Type *DestTy = nullptr; |
| bool IsSigned = false; |
| |
| /* If shadow use is a int->float cast then insert a second IV |
| to eliminate this cast. |
| |
| for (unsigned i = 0; i < n; ++i) |
| foo((double)i); |
| |
| is transformed into |
| |
| double d = 0.0; |
| for (unsigned i = 0; i < n; ++i, ++d) |
| foo(d); |
| */ |
| if (UIToFPInst *UCast = dyn_cast<UIToFPInst>(CandidateUI->getUser())) { |
| IsSigned = false; |
| DestTy = UCast->getDestTy(); |
| } |
| else if (SIToFPInst *SCast = dyn_cast<SIToFPInst>(CandidateUI->getUser())) { |
| IsSigned = true; |
| DestTy = SCast->getDestTy(); |
| } |
| if (!DestTy) continue; |
| |
| // If target does not support DestTy natively then do not apply |
| // this transformation. |
| if (!TTI.isTypeLegal(DestTy)) continue; |
| |
| PHINode *PH = dyn_cast<PHINode>(ShadowUse->getOperand(0)); |
| if (!PH) continue; |
| if (PH->getNumIncomingValues() != 2) continue; |
| |
| // If the calculation in integers overflows, the result in FP type will |
| // differ. So we only can do this transformation if we are guaranteed to not |
| // deal with overflowing values |
| const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(SE.getSCEV(PH)); |
| if (!AR) continue; |
| if (IsSigned && !AR->hasNoSignedWrap()) continue; |
| if (!IsSigned && !AR->hasNoUnsignedWrap()) continue; |
| |
| Type *SrcTy = PH->getType(); |
| int Mantissa = DestTy->getFPMantissaWidth(); |
| if (Mantissa == -1) continue; |
| if ((int)SE.getTypeSizeInBits(SrcTy) > Mantissa) |
| continue; |
| |
| unsigned Entry, Latch; |
| if (PH->getIncomingBlock(0) == L->getLoopPreheader()) { |
| Entry = 0; |
| Latch = 1; |
| } else { |
| Entry = 1; |
| Latch = 0; |
| } |
| |
| ConstantInt *Init = dyn_cast<ConstantInt>(PH->getIncomingValue(Entry)); |
| if (!Init) continue; |
| Constant *NewInit = ConstantFP::get(DestTy, IsSigned ? |
| (double)Init->getSExtValue() : |
| (double)Init->getZExtValue()); |
| |
| BinaryOperator *Incr = |
| dyn_cast<BinaryOperator>(PH->getIncomingValue(Latch)); |
| if (!Incr) continue; |
| if (Incr->getOpcode() != Instruction::Add |
| && Incr->getOpcode() != Instruction::Sub) |
| continue; |
| |
| /* Initialize new IV, double d = 0.0 in above example. */ |
| ConstantInt *C = nullptr; |
| if (Incr->getOperand(0) == PH) |
| C = dyn_cast<ConstantInt>(Incr->getOperand(1)); |
| else if (Incr->getOperand(1) == PH) |
| C = dyn_cast<ConstantInt>(Incr->getOperand(0)); |
| else |
| continue; |
| |
| if (!C) continue; |
| |
| // Ignore negative constants, as the code below doesn't handle them |
| // correctly. TODO: Remove this restriction. |
| if (!C->getValue().isStrictlyPositive()) continue; |
| |
| /* Add new PHINode. */ |
| PHINode *NewPH = PHINode::Create(DestTy, 2, "IV.S.", PH); |
| |
| /* create new increment. '++d' in above example. */ |
| Constant *CFP = ConstantFP::get(DestTy, C->getZExtValue()); |
| BinaryOperator *NewIncr = |
| BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ? |
| Instruction::FAdd : Instruction::FSub, |
| NewPH, CFP, "IV.S.next.", Incr); |
| |
| NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry)); |
| NewPH->addIncoming(NewIncr, PH->getIncomingBlock(Latch)); |
| |
| /* Remove cast operation */ |
| ShadowUse->replaceAllUsesWith(NewPH); |
| ShadowUse->eraseFromParent(); |
| Changed = true; |
| break; |
| } |
| } |
| |
| /// If Cond has an operand that is an expression of an IV, set the IV user and |
| /// stride information and return true, otherwise return false. |
| bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) { |
| for (IVStrideUse &U : IU) |
| if (U.getUser() == Cond) { |
| // NOTE: we could handle setcc instructions with multiple uses here, but |
| // InstCombine does it as well for simple uses, it's not clear that it |
| // occurs enough in real life to handle. |
| CondUse = &U; |
| return true; |
| } |
| return false; |
| } |
| |
| /// Rewrite the loop's terminating condition if it uses a max computation. |
| /// |
| /// This is a narrow solution to a specific, but acute, problem. For loops |
| /// like this: |
| /// |
| /// i = 0; |
| /// do { |
| /// p[i] = 0.0; |
| /// } while (++i < n); |
| /// |
| /// the trip count isn't just 'n', because 'n' might not be positive. And |
| /// unfortunately this can come up even for loops where the user didn't use |
| /// a C do-while loop. For example, seemingly well-behaved top-test loops |
| /// will commonly be lowered like this: |
| /// |
| /// if (n > 0) { |
| /// i = 0; |
| /// do { |
| /// p[i] = 0.0; |
| /// } while (++i < n); |
| /// } |
| /// |
| /// and then it's possible for subsequent optimization to obscure the if |
| /// test in such a way that indvars can't find it. |
| /// |
| /// When indvars can't find the if test in loops like this, it creates a |
| /// max expression, which allows it to give the loop a canonical |
| /// induction variable: |
| /// |
| /// i = 0; |
| /// max = n < 1 ? 1 : n; |
| /// do { |
| /// p[i] = 0.0; |
| /// } while (++i != max); |
| /// |
| /// Canonical induction variables are necessary because the loop passes |
| /// are designed around them. The most obvious example of this is the |
| /// LoopInfo analysis, which doesn't remember trip count values. It |
| /// expects to be able to rediscover the trip count each time it is |
| /// needed, and it does this using a simple analysis that only succeeds if |
| /// the loop has a canonical induction variable. |
| /// |
| /// However, when it comes time to generate code, the maximum operation |
| /// can be quite costly, especially if it's inside of an outer loop. |
| /// |
| /// This function solves this problem by detecting this type of loop and |
| /// rewriting their conditions from ICMP_NE back to ICMP_SLT, and deleting |
| /// the instructions for the maximum computation. |
| ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) { |
| // Check that the loop matches the pattern we're looking for. |
| if (Cond->getPredicate() != CmpInst::ICMP_EQ && |
| Cond->getPredicate() != CmpInst::ICMP_NE) |
| return Cond; |
| |
| SelectInst *Sel = dyn_cast<SelectInst>(Cond->getOperand(1)); |
| if (!Sel || !Sel->hasOneUse()) return Cond; |
| |
| const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L); |
| if (isa<SCEVCouldNotCompute>(BackedgeTakenCount)) |
| return Cond; |
| const SCEV *One = SE.getConstant(BackedgeTakenCount->getType(), 1); |
| |
| // Add one to the backedge-taken count to get the trip count. |
| const SCEV *IterationCount = SE.getAddExpr(One, BackedgeTakenCount); |
| if (IterationCount != SE.getSCEV(Sel)) return Cond; |
| |
| // Check for a max calculation that matches the pattern. There's no check |
| // for ICMP_ULE here because the comparison would be with zero, which |
| // isn't interesting. |
| CmpInst::Predicate Pred = ICmpInst::BAD_ICMP_PREDICATE; |
| const SCEVNAryExpr *Max = nullptr; |
| if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(BackedgeTakenCount)) { |
| Pred = ICmpInst::ICMP_SLE; |
| Max = S; |
| } else if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(IterationCount)) { |
| Pred = ICmpInst::ICMP_SLT; |
| Max = S; |
| } else if (const SCEVUMaxExpr *U = dyn_cast<SCEVUMaxExpr>(IterationCount)) { |
| Pred = ICmpInst::ICMP_ULT; |
| Max = U; |
| } else { |
| // No match; bail. |
| return Cond; |
| } |
| |
| // To handle a max with more than two operands, this optimization would |
| // require additional checking and setup. |
| if (Max->getNumOperands() != 2) |
| return Cond; |
| |
| const SCEV *MaxLHS = Max->getOperand(0); |
| const SCEV *MaxRHS = Max->getOperand(1); |
| |
| // ScalarEvolution canonicalizes constants to the left. For < and >, look |
| // for a comparison with 1. For <= and >=, a comparison with zero. |
| if (!MaxLHS || |
| (ICmpInst::isTrueWhenEqual(Pred) ? !MaxLHS->isZero() : (MaxLHS != One))) |
| return Cond; |
| |
| // Check the relevant induction variable for conformance to |
| // the pattern. |
| const SCEV *IV = SE.getSCEV(Cond->getOperand(0)); |
| const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(IV); |
| if (!AR || !AR->isAffine() || |
| AR->getStart() != One || |
| AR->getStepRecurrence(SE) != One) |
| return Cond; |
| |
| assert(AR->getLoop() == L && |
| "Loop condition operand is an addrec in a different loop!"); |
| |
| // Check the right operand of the select, and remember it, as it will |
| // be used in the new comparison instruction. |
| Value *NewRHS = nullptr; |
| if (ICmpInst::isTrueWhenEqual(Pred)) { |
| // Look for n+1, and grab n. |
| if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(1))) |
| if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1))) |
| if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS) |
| NewRHS = BO->getOperand(0); |
| if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(2))) |
| if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1))) |
| if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS) |
| NewRHS = BO->getOperand(0); |
| if (!NewRHS) |
| return Cond; |
| } else if (SE.getSCEV(Sel->getOperand(1)) == MaxRHS) |
| NewRHS = Sel->getOperand(1); |
| else if (SE.getSCEV(Sel->getOperand(2)) == MaxRHS) |
| NewRHS = Sel->getOperand(2); |
| else if (const SCEVUnknown *SU = dyn_cast<SCEVUnknown>(MaxRHS)) |
| NewRHS = SU->getValue(); |
| else |
| // Max doesn't match expected pattern. |
| return Cond; |
| |
| // Determine the new comparison opcode. It may be signed or unsigned, |
| // and the original comparison may be either equality or inequality. |
| if (Cond->getPredicate() == CmpInst::ICMP_EQ) |
| Pred = CmpInst::getInversePredicate(Pred); |
| |
| // Ok, everything looks ok to change the condition into an SLT or SGE and |
| // delete the max calculation. |
| ICmpInst *NewCond = |
| new ICmpInst(Cond, Pred, Cond->getOperand(0), NewRHS, "scmp"); |
| |
| // Delete the max calculation instructions. |
| NewCond->setDebugLoc(Cond->getDebugLoc()); |
| Cond->replaceAllUsesWith(NewCond); |
| CondUse->setUser(NewCond); |
| Instruction *Cmp = cast<Instruction>(Sel->getOperand(0)); |
| Cond->eraseFromParent(); |
| Sel->eraseFromParent(); |
| if (Cmp->use_empty()) |
| Cmp->eraseFromParent(); |
| return NewCond; |
| } |
| |
| /// Change loop terminating condition to use the postinc iv when possible. |
| void |
| LSRInstance::OptimizeLoopTermCond() { |
| SmallPtrSet<Instruction *, 4> PostIncs; |
| |
| // We need a different set of heuristics for rotated and non-rotated loops. |
| // If a loop is rotated then the latch is also the backedge, so inserting |
| // post-inc expressions just before the latch is ideal. To reduce live ranges |
| // it also makes sense to rewrite terminating conditions to use post-inc |
| // expressions. |
| // |
| // If the loop is not rotated then the latch is not a backedge; the latch |
| // check is done in the loop head. Adding post-inc expressions before the |
| // latch will cause overlapping live-ranges of pre-inc and post-inc expressions |
| // in the loop body. In this case we do *not* want to use post-inc expressions |
| // in the latch check, and we want to insert post-inc expressions before |
| // the backedge. |
| BasicBlock *LatchBlock = L->getLoopLatch(); |
| SmallVector<BasicBlock*, 8> ExitingBlocks; |
| L->getExitingBlocks(ExitingBlocks); |
| if (llvm::all_of(ExitingBlocks, [&LatchBlock](const BasicBlock *BB) { |
| return LatchBlock != BB; |
| })) { |
| // The backedge doesn't exit the loop; treat this as a head-tested loop. |
| IVIncInsertPos = LatchBlock->getTerminator(); |
| return; |
| } |
| |
| // Otherwise treat this as a rotated loop. |
| for (BasicBlock *ExitingBlock : ExitingBlocks) { |
| // Get the terminating condition for the loop if possible. If we |
| // can, we want to change it to use a post-incremented version of its |
| // induction variable, to allow coalescing the live ranges for the IV into |
| // one register value. |
| |
| BranchInst *TermBr = dyn_cast<BranchInst>(ExitingBlock->getTerminator()); |
| if (!TermBr) |
| continue; |
| // FIXME: Overly conservative, termination condition could be an 'or' etc.. |
| if (TermBr->isUnconditional() || !isa<ICmpInst>(TermBr->getCondition())) |
| continue; |
| |
| // Search IVUsesByStride to find Cond's IVUse if there is one. |
| IVStrideUse *CondUse = nullptr; |
| ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition()); |
| if (!FindIVUserForCond(Cond, CondUse)) |
| continue; |
| |
| // If the trip count is computed in terms of a max (due to ScalarEvolution |
| // being unable to find a sufficient guard, for example), change the loop |
| // comparison to use SLT or ULT instead of NE. |
| // One consequence of doing this now is that it disrupts the count-down |
| // optimization. That's not always a bad thing though, because in such |
| // cases it may still be worthwhile to avoid a max. |
| Cond = OptimizeMax(Cond, CondUse); |
| |
| // If this exiting block dominates the latch block, it may also use |
| // the post-inc value if it won't be shared with other uses. |
| // Check for dominance. |
| if (!DT.dominates(ExitingBlock, LatchBlock)) |
| continue; |
| |
| // Conservatively avoid trying to use the post-inc value in non-latch |
| // exits if there may be pre-inc users in intervening blocks. |
| if (LatchBlock != ExitingBlock) |
| for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) |
| // Test if the use is reachable from the exiting block. This dominator |
| // query is a conservative approximation of reachability. |
| if (&*UI != CondUse && |
| !DT.properlyDominates(UI->getUser()->getParent(), ExitingBlock)) { |
| // Conservatively assume there may be reuse if the quotient of their |
| // strides could be a legal scale. |
| const SCEV *A = IU.getStride(*CondUse, L); |
| const SCEV *B = IU.getStride(*UI, L); |
| if (!A || !B) continue; |
| if (SE.getTypeSizeInBits(A->getType()) != |
| SE.getTypeSizeInBits(B->getType())) { |
| if (SE.getTypeSizeInBits(A->getType()) > |
| SE.getTypeSizeInBits(B->getType())) |
| B = SE.getSignExtendExpr(B, A->getType()); |
| else |
| A = SE.getSignExtendExpr(A, B->getType()); |
| } |
| if (const SCEVConstant *D = |
| dyn_cast_or_null<SCEVConstant>(getExactSDiv(B, A, SE))) { |
| const ConstantInt *C = D->getValue(); |
| // Stride of one or negative one can have reuse with non-addresses. |
| if (C->isOne() || C->isMinusOne()) |
| goto decline_post_inc; |
| // Avoid weird situations. |
| if (C->getValue().getMinSignedBits() >= 64 || |
| C->getValue().isMinSignedValue()) |
| goto decline_post_inc; |
| // Check for possible scaled-address reuse. |
| if (isAddressUse(TTI, UI->getUser(), UI->getOperandValToReplace())) { |
| MemAccessTy AccessTy = getAccessType( |
| TTI, UI->getUser(), UI->getOperandValToReplace()); |
| int64_t Scale = C->getSExtValue(); |
| if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr, |
| /*BaseOffset=*/0, |
| /*HasBaseReg=*/false, Scale, |
| AccessTy.AddrSpace)) |
| goto decline_post_inc; |
| Scale = -Scale; |
| if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr, |
| /*BaseOffset=*/0, |
| /*HasBaseReg=*/false, Scale, |
| AccessTy.AddrSpace)) |
| goto decline_post_inc; |
| } |
| } |
| } |
| |
| LLVM_DEBUG(dbgs() << " Change loop exiting icmp to use postinc iv: " |
| << *Cond << '\n'); |
| |
| // It's possible for the setcc instruction to be anywhere in the loop, and |
| // possible for it to have multiple users. If it is not immediately before |
| // the exiting block branch, move it. |
| if (Cond->getNextNonDebugInstruction() != TermBr) { |
| if (Cond->hasOneUse()) { |
| Cond->moveBefore(TermBr); |
| } else { |
| // Clone the terminating condition and insert into the loopend. |
| ICmpInst *OldCond = Cond; |
| Cond = cast<ICmpInst>(Cond->clone()); |
| Cond->setName(L->getHeader()->getName() + ".termcond"); |
| ExitingBlock->getInstList().insert(TermBr->getIterator(), Cond); |
| |
| // Clone the IVUse, as the old use still exists! |
| CondUse = &IU.AddUser(Cond, CondUse->getOperandValToReplace()); |
| TermBr->replaceUsesOfWith(OldCond, Cond); |
| } |
| } |
| |
| // If we get to here, we know that we can transform the setcc instruction to |
| // use the post-incremented version of the IV, allowing us to coalesce the |
| // live ranges for the IV correctly. |
| CondUse->transformToPostInc(L); |
| Changed = true; |
| |
| PostIncs.insert(Cond); |
| decline_post_inc:; |
| } |
| |
| // Determine an insertion point for the loop induction variable increment. It |
| // must dominate all the post-inc comparisons we just set up, and it must |
| // dominate the loop latch edge. |
| IVIncInsertPos = L->getLoopLatch()->getTerminator(); |
| for (Instruction *Inst : PostIncs) { |
| BasicBlock *BB = |
| DT.findNearestCommonDominator(IVIncInsertPos->getParent(), |
| Inst->getParent()); |
| if (BB == Inst->getParent()) |
| IVIncInsertPos = Inst; |
| else if (BB != IVIncInsertPos->getParent()) |
| IVIncInsertPos = BB->getTerminator(); |
| } |
| } |
| |
| /// Determine if the given use can accommodate a fixup at the given offset and |
| /// other details. If so, update the use and return true. |
| bool LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset, |
| bool HasBaseReg, LSRUse::KindType Kind, |
| MemAccessTy AccessTy) { |
| int64_t NewMinOffset = LU.MinOffset; |
| int64_t NewMaxOffset = LU.MaxOffset; |
| MemAccessTy NewAccessTy = AccessTy; |
| |
| // Check for a mismatched kind. It's tempting to collapse mismatched kinds to |
| // something conservative, however this can pessimize in the case that one of |
| // the uses will have all its uses outside the loop, for example. |
| if (LU.Kind != Kind) |
| return false; |
| |
| // Check for a mismatched access type, and fall back conservatively as needed. |
| // TODO: Be less conservative when the type is similar and can use the same |
| // addressing modes. |
| if (Kind == LSRUse::Address) { |
| if (AccessTy.MemTy != LU.AccessTy.MemTy) { |
| NewAccessTy = MemAccessTy::getUnknown(AccessTy.MemTy->getContext(), |
| AccessTy.AddrSpace); |
| } |
| } |
| |
| // Conservatively assume HasBaseReg is true for now. |
| if (NewOffset < LU.MinOffset) { |
| if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr, |
| LU.MaxOffset - NewOffset, HasBaseReg)) |
| return false; |
| NewMinOffset = NewOffset; |
| } else if (NewOffset > LU.MaxOffset) { |
| if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr, |
| NewOffset - LU.MinOffset, HasBaseReg)) |
| return false; |
| NewMaxOffset = NewOffset; |
| } |
| |
| // Update the use. |
| LU.MinOffset = NewMinOffset; |
| LU.MaxOffset = NewMaxOffset; |
| LU.AccessTy = NewAccessTy; |
| return true; |
| } |
| |
| /// Return an LSRUse index and an offset value for a fixup which needs the given |
| /// expression, with the given kind and optional access type. Either reuse an |
| /// existing use or create a new one, as needed. |
| std::pair<size_t, int64_t> LSRInstance::getUse(const SCEV *&Expr, |
| LSRUse::KindType Kind, |
| MemAccessTy AccessTy) { |
| const SCEV *Copy = Expr; |
| int64_t Offset = ExtractImmediate(Expr, SE); |
| |
| // Basic uses can't accept any offset, for example. |
| if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ nullptr, |
| Offset, /*HasBaseReg=*/ true)) { |
| Expr = Copy; |
| Offset = 0; |
| } |
| |
| std::pair<UseMapTy::iterator, bool> P = |
| UseMap.insert(std::make_pair(LSRUse::SCEVUseKindPair(Expr, Kind), 0)); |
| if (!P.second) { |
| // A use already existed with this base. |
| size_t LUIdx = P.first->second; |
| LSRUse &LU = Uses[LUIdx]; |
| if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy)) |
| // Reuse this use. |
| return std::make_pair(LUIdx, Offset); |
| } |
| |
| // Create a new use. |
| size_t LUIdx = Uses.size(); |
| P.first->second = LUIdx; |
| Uses.push_back(LSRUse(Kind, AccessTy)); |
| LSRUse &LU = Uses[LUIdx]; |
| |
| LU.MinOffset = Offset; |
| LU.MaxOffset = Offset; |
| return std::make_pair(LUIdx, Offset); |
| } |
| |
| /// Delete the given use from the Uses list. |
| void LSRInstance::DeleteUse(LSRUse &LU, size_t LUIdx) { |
| if (&LU != &Uses.back()) |
| std::swap(LU, Uses.back()); |
| Uses.pop_back(); |
| |
| // Update RegUses. |
| RegUses.swapAndDropUse(LUIdx, Uses.size()); |
| } |
| |
| /// Look for a use distinct from OrigLU which is has a formula that has the same |
| /// registers as the given formula. |
| LSRUse * |
| LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF, |
| const LSRUse &OrigLU) { |
| // Search all uses for the formula. This could be more clever. |
| for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) { |
| LSRUse &LU = Uses[LUIdx]; |
| // Check whether this use is close enough to OrigLU, to see whether it's |
|