| commit | bf0655f2080248a59aa2b79f2579798b8158869c | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@sifive.com> | Wed May 14 10:27:00 2025 -0700 |
| committer | GitHub <noreply@github.com> | Wed May 14 10:27:00 2025 -0700 |
| tree | a69855a810b70dda6e4a7c9389ce523cd34948be | |
| parent | a3ba00a3dbc314794d8ca14d0c0993ef5a229069 [diff] |
[RISCV] Improve casting between i1 scalable vectors and i8 fixed vectors for -mrvv-vector-bits (#139190) For i1 vectors, we used an i8 fixed vector as the storage type. If the known minimum number of elements of the scalable vector type is less than 8, we were doing the cast through memory. This used a load or store from a fixed vector alloca. If is less than 8, DataLayout indicates that the load/store reads/writes vscale bytes even if vscale is known and vscale*X is less than or equal to 8. This means the load or store is outside the bounds of the fixed size alloca as far as DataLayout is concerned leading to undefined behavior. This patch avoids this by widening the i1 scalable vector type with zero elements until it is divisible by 8. This allows it be bitcasted to/from an i8 scalable vector. We then insert or extract the i8 fixed vector into this type. Hopefully this enables #130973 to be accepted.
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