[X86] optimize ssse3 horizontal saturating add/sub (#169591)

Currently LLVM fails to recognize a manual implementation of `phadd`

https://godbolt.org/z/zozrssaWb

```llvm
declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>)

declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>)

define <8 x i16> @phaddsw_v8i16_intrinsic(<8 x i16> %a, <8 x i16> %b) {
entry:
  %res = call <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16> %a, <8 x i16> %b)
  ret <8 x i16> %res
}

define <8 x i16> @phaddsw_v8i16_generic(<8 x i16> %a, <8 x i16> %b) {
entry:
  %even = shufflevector <8 x i16> %a, <8 x i16> %b,
    <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
  %odd  = shufflevector <8 x i16> %a, <8 x i16> %b,
    <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
  %sum = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> %even, <8 x i16> %odd)
  ret <8 x i16> %sum
}
```

```asm
phaddsw_v8i16_intrinsic:                # @phaddsw_v8i16_intrinsic
        phaddsw xmm0, xmm1
        ret

phaddsw_v8i16_generic:                  # @phaddsw_v8i16_generic
        movdqa  xmm2, xmmword ptr [rip + .LCPI1_0] # xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
        movdqa  xmm3, xmm1
        pshufb  xmm3, xmm2
        movdqa  xmm4, xmm0
        pshufb  xmm4, xmm2
        punpcklqdq      xmm4, xmm3              # xmm4 = xmm4[0],xmm3[0]
        psrad   xmm1, 16
        psrad   xmm0, 16
        packssdw        xmm0, xmm1
        paddsw  xmm0, xmm4
        ret
```

This PR does recognize the pattern.