tree 2fd830c68c0df4f61d1474bb4b7b3ebf3d9e39ff
parent b057c78db8abe08b3663009bf56381c6e5f5a369
author Nirvedh Meshram <96096277+nirvedhmeshram@users.noreply.github.com> 1777915713 -0500
committer GitHub <noreply@github.com> 1777915713 -0500
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[MLIR][AMDGPU] Add amdgpu.global_transpose_load op for gfx1200+ global memory transpose loads (#195287)

Adds a new `amdgpu.global_transpose_load` op to the AMDGPU dialect that
wraps the `global_load_tr` family of instructions introduced in RDNA4
(gfx1250+). Each thread reads a column of a matrix from global memory
and receives the corresponding transposed row in its result register.

The op is kept separate from the existing `amdgpu.transpose_load` (which
targets LDS via `ds_read_tr` on gfx950+) because the two variants target
different GPU architecture families, have different chipset
requirements, and differ in their valid (element size, num elements)
combinations — in particular the 16-bit case produces a 128-bit
(8-element) result via `global_load_tr.b128` rather than the 64-bit
(4-element) result from `ds_read_tr16.b64`.

Lowering to the existing ROCDL `global.load.tr{4,6,.}.b{64,96,128}`
intrinsics added for gfx1200+.

---------

Signed-off-by: Nirvedh Meshram <nirvedh@gmail.com>
Co-authored-by: Claude Sonnet 4 (1M context) <noreply@anthropic.com>