; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-SDAG %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx801 < %s | FileCheck -check-prefixes=GFX8,GFX8-SDAG %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx801 < %s | FileCheck -check-prefixes=GFX8,GFX8-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -check-prefixes=GFX9,GFX9-SDAG %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -check-prefixes=GFX9,GFX9-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-TRUE16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-FAKE16 %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL,GFX11-GISEL-TRUE16 %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL,GFX11-GISEL-FAKE16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1170 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-SDAG,GFX1170-SDAG-TRUE16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1170 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-SDAG,GFX1170-SDAG-FAKE16 %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1170 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-GISEL,GFX1170-GISEL-TRUE16 %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1170 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-GISEL,GFX1170-GISEL-FAKE16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG,GFX12-SDAG-TRUE16 %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG,GFX12-SDAG-FAKE16 %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL,GFX12-GISEL-TRUE16 %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL,GFX12-GISEL-FAKE16 %s

define half @test_vector_reduce_fmin_v2half(<2 x half> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v2half:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v2half:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v2half:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v1, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v2half:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f16_e32 v1, v0, v0
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v1, v0
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v2half:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f16_sdwa v1, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-SDAG-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX9-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v2half:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f16_e32 v1, v0, v0
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v1, v0
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v2half:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f16_sdwa v1, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-SDAG-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX10-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v2half:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f16_e32 v1, v0, v0
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v1, v0
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-TRUE16-NEXT:    v_max_f16_e32 v0.h, v0.h, v0.h
; GFX11-SDAG-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v0.l
; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX11-SDAG-FAKE16-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-FAKE16-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX11-SDAG-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v0.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.h, v0.h, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX1170-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX1170-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX1170-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX1170-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX1170-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX1170-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX1170-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX1170-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX12-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX12-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX12-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX12-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX12-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX12-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX12-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX12-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX12-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX12-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX12-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call half @llvm.vector.reduce.fmin.v2half(<2 x half> %v)
  ret half %res
}

define half @test_vector_reduce_fmin_v3half(<3 x half> %v) {
; GFX7-LABEL: test_vector_reduce_fmin_v3half:
; GFX7:       ; %bb.0: ; %entry
; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-NEXT:    v_min_f32_e32 v0, v0, v2
; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v3half:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v2, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v2
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v3half:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f16_e32 v2, v0, v0
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v2, v0
; GFX8-GISEL-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v3half:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX9-SDAG-NEXT:    s_movk_i32 s0, 0x7e00
; GFX9-SDAG-NEXT:    v_pack_b32_f16 v1, v1, s0
; GFX9-SDAG-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX9-SDAG-NEXT:    s_nop 0
; GFX9-SDAG-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX9-SDAG-NEXT:    s_nop 0
; GFX9-SDAG-NEXT:    v_min_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v3half:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f16_e32 v2, v0, v0
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v2, v0
; GFX9-GISEL-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v3half:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX10-SDAG-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX10-SDAG-NEXT:    v_pack_b32_f16 v1, v1, 0x7e00
; GFX10-SDAG-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX10-SDAG-NEXT:    v_min_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v3half:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f16_e32 v2, v0, v0
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v2, v0
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-TRUE16-NEXT:    v_mov_b16_e32 v1.h, 0x7e00
; GFX11-SDAG-TRUE16-NEXT:    v_max_f16_e32 v1.l, v1.l, v1.l
; GFX11-SDAG-TRUE16-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX11-SDAG-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-FAKE16-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX11-SDAG-FAKE16-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-FAKE16-NEXT:    v_pack_b32_f16 v1, v1, 0x7e00
; GFX11-SDAG-FAKE16-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX11-SDAG-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v0.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.h, v0.h, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.h, v1.l, v1.l
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v2, v2, v2
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v2
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX1170-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-TRUE16-NEXT:    v_mov_b16_e32 v1.h, 0x7e00
; GFX1170-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v1.l, v1.l, v1.l
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX1170-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX1170-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT:    v_pack_b32_f16 v1, v1, 0x7e00
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX1170-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX1170-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v1.l, v1.l
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX1170-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v2, v2, v2
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v2
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX12-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX12-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    v_mov_b16_e32 v1.h, 0x7e00
; GFX12-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v1.l, v1.l, v1.l
; GFX12-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX12-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX12-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX12-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX12-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT:    v_pack_b32_f16 v1, v1, 0x7e00
; GFX12-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX12-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX12-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX12-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v1.l, v1.l
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX12-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX12-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v2, v2, v2
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v2
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call half @llvm.vector.reduce.fmin.v3half(<3 x half> %v)
  ret half %res
}

define half @test_vector_reduce_fmin_v4half(<4 x half> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v4half:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v2
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v1
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v2
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v4half:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v2
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v1, v3
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v4half:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v3, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v2, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v3
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v2
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v4half:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f16_e32 v2, v0, v0
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v2, v0
; GFX8-GISEL-NEXT:    v_max_f16_e32 v2, v1, v1
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v1, v2, v1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v4half:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_pk_max_f16 v1, v1, v1
; GFX9-SDAG-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX9-SDAG-NEXT:    s_nop 0
; GFX9-SDAG-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX9-SDAG-NEXT:    s_nop 0
; GFX9-SDAG-NEXT:    v_min_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v4half:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f16_e32 v2, v0, v0
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v2, v0
; GFX9-GISEL-NEXT:    v_max_f16_e32 v2, v1, v1
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v1, v2, v1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v4half:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_pk_max_f16 v1, v1, v1
; GFX10-SDAG-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX10-SDAG-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX10-SDAG-NEXT:    v_min_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v4half:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f16_e32 v2, v0, v0
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v3, v1, v1
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v2, v0
; GFX10-GISEL-NEXT:    v_min_f16_e32 v1, v3, v1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-TRUE16-NEXT:    v_pk_max_f16 v1, v1, v1
; GFX11-SDAG-TRUE16-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX11-SDAG-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-FAKE16-NEXT:    v_pk_max_f16 v1, v1, v1
; GFX11-SDAG-FAKE16-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-FAKE16-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v0.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.h, v0.h, v0.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v1.l, v1.l, v1.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v1.h, v1.h, v1.h
; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.h, v1.l, v1.h
; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v2, v2, v2
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v3, v3, v3
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v2
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v1, v1, v3
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX1170-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v1, v1, v1
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX1170-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX1170-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v1, v1, v1
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX1170-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.l, v1.l, v1.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.h, v1.h, v1.h
; GFX1170-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX1170-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX1170-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v2, v2, v2
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v3, v3, v3
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v2
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v1, v3
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX12-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX12-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v1, v1, v1
; GFX12-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX12-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX12-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX12-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v1, v1, v1
; GFX12-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX12-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX12-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.l, v1.l, v1.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.h, v1.h, v1.h
; GFX12-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX12-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX12-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX12-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v2, v2, v2
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v3, v3, v3
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v2
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v1, v3
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call half @llvm.vector.reduce.fmin.v4half(<4 x half> %v)
  ret half %res
}

define half @test_vector_reduce_fmin_v8half(<8 x half> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v8half:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v4, 16, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v4, v4
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v4
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v4, v1
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v4
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v2
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v2
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v3
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v3
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v8half:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v4, 16, v0
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v5, 16, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v4, v4
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v5, v5
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v6, 16, v2
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v7, 16, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v4
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v1, v5
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v4, v6
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v5, v7
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    v_min_f32_e32 v2, v2, v4
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v3, v3, v5
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v2, v2
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v3, v3
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v8half:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v5, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v4, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v5
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v4
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v2, v2
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v1, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v3, v3
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v1, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v8half:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f16_e32 v4, v0, v0
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v4, v0
; GFX8-GISEL-NEXT:    v_max_f16_e32 v4, v1, v1
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v1, v4, v1
; GFX8-GISEL-NEXT:    v_max_f16_e32 v4, v2, v2
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v2, v4, v2
; GFX8-GISEL-NEXT:    v_max_f16_e32 v4, v3, v3
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v3, v4, v3
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v8half:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_pk_max_f16 v3, v3, v3
; GFX9-SDAG-NEXT:    v_pk_max_f16 v1, v1, v1
; GFX9-SDAG-NEXT:    v_pk_max_f16 v2, v2, v2
; GFX9-SDAG-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX9-SDAG-NEXT:    v_pk_min_f16 v1, v1, v3
; GFX9-SDAG-NEXT:    v_pk_min_f16 v0, v0, v2
; GFX9-SDAG-NEXT:    s_nop 0
; GFX9-SDAG-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX9-SDAG-NEXT:    s_nop 0
; GFX9-SDAG-NEXT:    v_min_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v8half:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f16_e32 v4, v0, v0
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v4, v0
; GFX9-GISEL-NEXT:    v_max_f16_e32 v4, v1, v1
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v1, v4, v1
; GFX9-GISEL-NEXT:    v_max_f16_e32 v4, v2, v2
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v2, v4, v2
; GFX9-GISEL-NEXT:    v_max_f16_e32 v4, v3, v3
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v3, v4, v3
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v8half:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_pk_max_f16 v3, v3, v3
; GFX10-SDAG-NEXT:    v_pk_max_f16 v1, v1, v1
; GFX10-SDAG-NEXT:    v_pk_max_f16 v2, v2, v2
; GFX10-SDAG-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX10-SDAG-NEXT:    v_pk_min_f16 v1, v1, v3
; GFX10-SDAG-NEXT:    v_pk_min_f16 v0, v0, v2
; GFX10-SDAG-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX10-SDAG-NEXT:    v_min_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v8half:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f16_e32 v4, v0, v0
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v5, v1, v1
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v6, v2, v2
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v7, v3, v3
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v4, v0
; GFX10-GISEL-NEXT:    v_min_f16_e32 v1, v5, v1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v2, v6, v2
; GFX10-GISEL-NEXT:    v_min_f16_e32 v3, v7, v3
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-TRUE16-NEXT:    v_pk_max_f16 v3, v3, v3
; GFX11-SDAG-TRUE16-NEXT:    v_pk_max_f16 v1, v1, v1
; GFX11-SDAG-TRUE16-NEXT:    v_pk_max_f16 v2, v2, v2
; GFX11-SDAG-TRUE16-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-TRUE16-NEXT:    v_pk_min_f16 v1, v1, v3
; GFX11-SDAG-TRUE16-NEXT:    v_pk_min_f16 v0, v0, v2
; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX11-SDAG-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-FAKE16-NEXT:    v_pk_max_f16 v3, v3, v3
; GFX11-SDAG-FAKE16-NEXT:    v_pk_max_f16 v1, v1, v1
; GFX11-SDAG-FAKE16-NEXT:    v_pk_max_f16 v2, v2, v2
; GFX11-SDAG-FAKE16-NEXT:    v_pk_max_f16 v0, v0, v0
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-FAKE16-NEXT:    v_pk_min_f16 v1, v1, v3
; GFX11-SDAG-FAKE16-NEXT:    v_pk_min_f16 v0, v0, v2
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-FAKE16-NEXT:    v_pk_min_f16 v0, v0, v1
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v0.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.h, v0.h, v0.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v1.l, v1.l, v1.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v1.h, v1.h, v1.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v2.l, v2.l, v2.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v2.h, v2.h, v2.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v3.l, v3.l, v3.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v3.h, v3.h, v3.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.h, v1.l, v1.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v1.l, v2.l, v2.h
; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v1.h, v3.l, v3.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.h, v1.l, v1.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v0
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v1
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v2
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v3
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v4, v4, v4
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v5, v5, v5
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v2, v2, v2
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v6, v6, v6
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v3, v3, v3
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v7, v7, v7
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v4
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v1, v1, v5
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v2, v2, v6
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v3, v3, v7
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX1170-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v3, v3, v3
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v1, v1, v1
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v2, v2, v2
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX1170-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v1, v1, v3
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v0, v0, v2
; GFX1170-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX1170-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v3, v3, v3
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v1, v1, v1
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v2, v2, v2
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v1, v1, v3
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v0, v0, v2
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX1170-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.l, v1.l, v1.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.h, v1.h, v1.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.h, v2.h, v2.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v3.l, v3.l, v3.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v3.h, v3.h, v3.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.l, v2.l, v2.h
; GFX1170-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.h, v3.l, v3.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX1170-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v0
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v1
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v2
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v3
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v4, v4, v4
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v5, v5, v5
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v2, v2, v2
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v6, v6, v6
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v3, v3, v3
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v7, v7, v7
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v4
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v1, v5
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v2, v2, v6
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v3, v3, v7
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v2, v3
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX12-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX12-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v3, v3, v3
; GFX12-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v1, v1, v1
; GFX12-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v2, v2, v2
; GFX12-SDAG-TRUE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX12-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v1, v1, v3
; GFX12-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v0, v0, v2
; GFX12-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX12-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX12-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v3, v3, v3
; GFX12-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v1, v1, v1
; GFX12-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v2, v2, v2
; GFX12-SDAG-FAKE16-NEXT:    v_pk_max_num_f16 v0, v0, v0
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v1, v1, v3
; GFX12-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v0, v0, v2
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT:    v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX12-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX12-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.l, v1.l, v1.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.h, v1.h, v1.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.h, v2.h, v2.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v3.l, v3.l, v3.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v3.h, v3.h, v3.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.l, v2.l, v2.h
; GFX12-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.h, v3.l, v3.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX12-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX12-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v0
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v1
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v2
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v3
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v4, v4, v4
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v5, v5, v5
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v2, v2, v2
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v6, v6, v6
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v3, v3, v3
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v7, v7, v7
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v4
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v1, v5
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v2, v2, v6
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v3, v3, v7
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v2, v3
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call half @llvm.vector.reduce.fmin.v8half(<8 x half> %v)
  ret half %res
}

define half @test_vector_reduce_fmin_v16half(<16 x half> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v16half:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v8, 16, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v8, v8
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v8
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v8, v1
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v8
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v2
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v2
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v3
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v3
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v4
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v4
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v5
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v5
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v6
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v6
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v7
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v7
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v16half:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v8, 16, v0
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v9, 16, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v8, v8
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v9, v9
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v10, 16, v2
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v11, 16, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v8
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v1, v9
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v8, v10
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v9, v11
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v12, 16, v4
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v13, 16, v5
; GFX7-GISEL-NEXT:    v_min_f32_e32 v2, v2, v8
; GFX7-GISEL-NEXT:    v_min_f32_e32 v3, v3, v9
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v4, v4
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v8, v12
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v5, v5
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v9, v13
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v14, 16, v6
; GFX7-GISEL-NEXT:    v_lshrrev_b32_e32 v15, 16, v7
; GFX7-GISEL-NEXT:    v_min_f32_e32 v4, v4, v8
; GFX7-GISEL-NEXT:    v_min_f32_e32 v5, v5, v9
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v6, v6
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v8, v14
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v7, v7
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v9, v15
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v2, v2
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v3, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v6, v6, v8
; GFX7-GISEL-NEXT:    v_min_f32_e32 v7, v7, v9
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v4, v4
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v5, v5
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v6, v6
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v7, v7
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v4
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v3, v5
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v4, v6
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v5, v7
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v2, v2, v3
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v2, v2
; GFX7-GISEL-NEXT:    v_min_f32_e32 v3, v4, v5
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v3, v3
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX7-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v16half:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v9, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v9
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v8
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v2, v2
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v1, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v3, v3
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v1, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v4, v4
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v1, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v5, v5
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v1, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v6, v6
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v1, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_e32 v1, v7, v7
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_max_f16_sdwa v1, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v16half:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f16_e32 v8, v0, v0
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v8, v0
; GFX8-GISEL-NEXT:    v_max_f16_e32 v8, v1, v1
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v1, v8, v1
; GFX8-GISEL-NEXT:    v_max_f16_e32 v8, v2, v2
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v2, v8, v2
; GFX8-GISEL-NEXT:    v_max_f16_e32 v8, v3, v3
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v3, v8, v3
; GFX8-GISEL-NEXT:    v_max_f16_e32 v8, v4, v4
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v4, v8, v4
; GFX8-GISEL-NEXT:    v_max_f16_e32 v8, v5, v5
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v5, v8, v5
; GFX8-GISEL-NEXT:    v_max_f16_e32 v8, v6, v6
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v6, v8, v6
; GFX8-GISEL-NEXT:    v_max_f16_e32 v8, v7, v7
; GFX8-GISEL-NEXT:    v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v7, v8, v7
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX8-GISEL-NEXT:    v_min_f16_e32 v2, v4, v5
; GFX8-GISEL-NEXT:    v_min_f16_e32 v3, v6, v7
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX8-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v16half:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f16_sdwa v15, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-SDAG-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX9-SDAG-NEXT:    v_lshrrev_b32_e32 v14, 16, v1
; GFX9-SDAG-NEXT:    v_min_f16_e32 v0, v0, v15
; GFX9-SDAG-NEXT:    v_lshrrev_b32_e32 v13, 16, v2
; GFX9-SDAG-NEXT:    v_min3_f16 v0, v0, v1, v14
; GFX9-SDAG-NEXT:    v_lshrrev_b32_e32 v12, 16, v3
; GFX9-SDAG-NEXT:    v_min3_f16 v0, v0, v2, v13
; GFX9-SDAG-NEXT:    v_lshrrev_b32_e32 v11, 16, v4
; GFX9-SDAG-NEXT:    v_min3_f16 v0, v0, v3, v12
; GFX9-SDAG-NEXT:    v_lshrrev_b32_e32 v10, 16, v5
; GFX9-SDAG-NEXT:    v_min3_f16 v0, v0, v4, v11
; GFX9-SDAG-NEXT:    v_lshrrev_b32_e32 v9, 16, v6
; GFX9-SDAG-NEXT:    v_min3_f16 v0, v0, v5, v10
; GFX9-SDAG-NEXT:    v_lshrrev_b32_e32 v8, 16, v7
; GFX9-SDAG-NEXT:    v_min3_f16 v0, v0, v6, v9
; GFX9-SDAG-NEXT:    v_min3_f16 v0, v0, v7, v8
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v16half:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f16_e32 v8, v0, v0
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v8, v0
; GFX9-GISEL-NEXT:    v_max_f16_e32 v8, v1, v1
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v1, v8, v1
; GFX9-GISEL-NEXT:    v_max_f16_e32 v8, v2, v2
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v2, v8, v2
; GFX9-GISEL-NEXT:    v_max_f16_e32 v8, v3, v3
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v3, v8, v3
; GFX9-GISEL-NEXT:    v_max_f16_e32 v8, v4, v4
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v4, v8, v4
; GFX9-GISEL-NEXT:    v_max_f16_e32 v8, v5, v5
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v5, v8, v5
; GFX9-GISEL-NEXT:    v_max_f16_e32 v8, v6, v6
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v6, v8, v6
; GFX9-GISEL-NEXT:    v_max_f16_e32 v8, v7, v7
; GFX9-GISEL-NEXT:    v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v7, v8, v7
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX9-GISEL-NEXT:    v_min_f16_e32 v2, v4, v5
; GFX9-GISEL-NEXT:    v_min_f16_e32 v3, v6, v7
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX9-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v16half:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f16_sdwa v8, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-SDAG-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX10-SDAG-NEXT:    v_lshrrev_b32_e32 v9, 16, v1
; GFX10-SDAG-NEXT:    v_min_f16_e32 v0, v0, v8
; GFX10-SDAG-NEXT:    v_lshrrev_b32_e32 v8, 16, v2
; GFX10-SDAG-NEXT:    v_min3_f16 v0, v0, v1, v9
; GFX10-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v3
; GFX10-SDAG-NEXT:    v_min3_f16 v0, v0, v2, v8
; GFX10-SDAG-NEXT:    v_lshrrev_b32_e32 v2, 16, v4
; GFX10-SDAG-NEXT:    v_min3_f16 v0, v0, v3, v1
; GFX10-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v5
; GFX10-SDAG-NEXT:    v_min3_f16 v0, v0, v4, v2
; GFX10-SDAG-NEXT:    v_lshrrev_b32_e32 v2, 16, v6
; GFX10-SDAG-NEXT:    v_min3_f16 v0, v0, v5, v1
; GFX10-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v7
; GFX10-SDAG-NEXT:    v_min3_f16 v0, v0, v6, v2
; GFX10-SDAG-NEXT:    v_min3_f16 v0, v0, v7, v1
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v16half:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f16_e32 v8, v0, v0
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v9, v1, v1
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v10, v2, v2
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v8, v0
; GFX10-GISEL-NEXT:    v_max_f16_e32 v8, v3, v3
; GFX10-GISEL-NEXT:    v_min_f16_e32 v1, v9, v1
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v2, v10, v2
; GFX10-GISEL-NEXT:    v_max_f16_e32 v9, v4, v4
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v10, v5, v5
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v11, v6, v6
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_max_f16_e32 v12, v7, v7
; GFX10-GISEL-NEXT:    v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v3, v8, v3
; GFX10-GISEL-NEXT:    v_min_f16_e32 v4, v9, v4
; GFX10-GISEL-NEXT:    v_min_f16_e32 v5, v10, v5
; GFX10-GISEL-NEXT:    v_min_f16_e32 v6, v11, v6
; GFX10-GISEL-NEXT:    v_min_f16_e32 v7, v12, v7
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX10-GISEL-NEXT:    v_min_f16_e32 v2, v4, v5
; GFX10-GISEL-NEXT:    v_min_f16_e32 v3, v6, v7
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX10-GISEL-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX11-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX11-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-TRUE16-NEXT:    v_max_f16_e32 v0.h, v0.h, v0.h
; GFX11-SDAG-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v0.l
; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-SDAG-TRUE16-NEXT:    v_min3_f16 v0.l, v0.l, v1.l, v1.h
; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT:    v_min3_f16 v0.l, v0.l, v2.l, v2.h
; GFX11-SDAG-TRUE16-NEXT:    v_min3_f16 v0.l, v0.l, v3.l, v3.h
; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT:    v_min3_f16 v0.l, v0.l, v4.l, v4.h
; GFX11-SDAG-TRUE16-NEXT:    v_min3_f16 v0.l, v0.l, v5.l, v5.h
; GFX11-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-TRUE16-NEXT:    v_min3_f16 v0.l, v0.l, v6.l, v6.h
; GFX11-SDAG-TRUE16-NEXT:    v_min3_f16 v0.l, v0.l, v7.l, v7.h
; GFX11-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX11-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX11-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v0
; GFX11-SDAG-FAKE16-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v9, 16, v1
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-FAKE16-NEXT:    v_max_f16_e32 v8, v8, v8
; GFX11-SDAG-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v8
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v2
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-FAKE16-NEXT:    v_min3_f16 v0, v0, v1, v9
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v3
; GFX11-SDAG-FAKE16-NEXT:    v_min3_f16 v0, v0, v2, v8
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v4
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-FAKE16-NEXT:    v_min3_f16 v0, v0, v3, v1
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v5
; GFX11-SDAG-FAKE16-NEXT:    v_min3_f16 v0, v0, v4, v2
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v6
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-FAKE16-NEXT:    v_min3_f16 v0, v0, v5, v1
; GFX11-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v7
; GFX11-SDAG-FAKE16-NEXT:    v_min3_f16 v0, v0, v6, v2
; GFX11-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-FAKE16-NEXT:    v_min3_f16 v0, v0, v7, v1
; GFX11-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX11-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX11-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v0.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v0.h, v0.h, v0.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v1.l, v1.l, v1.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v1.h, v1.h, v1.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v2.l, v2.l, v2.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v2.h, v2.h, v2.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.h, v1.l, v1.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v1.h, v3.l, v3.l
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v1.l, v2.l, v2.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v2.l, v3.h, v3.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v2.h, v4.l, v4.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v3.l, v4.h, v4.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v3.h, v5.l, v5.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v4.l, v5.h, v5.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v4.h, v6.l, v6.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v5.l, v6.h, v6.h
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v5.h, v7.l, v7.l
; GFX11-GISEL-TRUE16-NEXT:    v_max_f16_e32 v6.l, v7.h, v7.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v1.h, v1.h, v2.l
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v2.l, v2.h, v3.l
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v2.h, v3.h, v4.l
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v3.l, v4.h, v5.l
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v3.h, v5.h, v6.l
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.h, v1.l, v1.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v1.l, v2.l, v2.h
; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v1.h, v3.l, v3.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.h, v1.l, v1.h
; GFX11-GISEL-TRUE16-NEXT:    v_min_f16_e32 v0.l, v0.l, v0.h
; GFX11-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX11-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX11-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v0
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v9, 16, v1
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v10, 16, v2
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v11, 16, v3
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v12, 16, v4
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v13, 16, v5
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v0, v0, v0
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v8, v8, v8
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v1, v1, v1
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v9, v9, v9
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v2, v2, v2
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v10, v10, v10
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v14, 16, v6
; GFX11-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v15, 16, v7
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v8
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v1, v1, v9
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v2, v2, v10
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v3, v3, v3
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v8, v11, v11
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v4, v4, v4
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v9, v12, v12
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v5, v5, v5
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v10, v13, v13
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v6, v6, v6
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v11, v14, v14
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v7, v7, v7
; GFX11-GISEL-FAKE16-NEXT:    v_max_f16_e32 v12, v15, v15
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v3, v3, v8
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v4, v4, v9
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v5, v5, v10
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v6, v6, v11
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v7, v7, v12
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v2, v4, v5
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v3, v6, v7
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v1, v2, v3
; GFX11-GISEL-FAKE16-NEXT:    v_min_f16_e32 v0, v0, v1
; GFX11-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX1170-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX1170-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX1170-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v1.l, v1.h
; GFX1170-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v2.l, v2.h
; GFX1170-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v3.l, v3.h
; GFX1170-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v4.l, v4.h
; GFX1170-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v5.l, v5.h
; GFX1170-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v6.l, v6.h
; GFX1170-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v7.l, v7.h
; GFX1170-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX1170-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v0
; GFX1170-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v9, 16, v1
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v8, v8, v8
; GFX1170-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v8
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v2
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v1, v9
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v3
; GFX1170-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v2, v8
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v4
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v3, v1
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v5
; GFX1170-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v4, v2
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v6
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v5, v1
; GFX1170-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v7
; GFX1170-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v6, v2
; GFX1170-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v7, v1
; GFX1170-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX1170-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.l, v1.l, v1.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.h, v1.h, v1.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.h, v2.h, v2.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.h, v3.l, v3.l
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.l, v2.l, v2.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.l, v3.h, v3.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.h, v4.l, v4.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v3.l, v4.h, v4.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v3.h, v5.l, v5.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v4.l, v5.h, v5.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v4.h, v6.l, v6.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v5.l, v6.h, v6.h
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v5.h, v7.l, v7.l
; GFX1170-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v6.l, v7.h, v7.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.h, v1.h, v2.l
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v2.l, v2.h, v3.l
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v2.h, v3.h, v4.l
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v3.l, v4.h, v5.l
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v3.h, v5.h, v6.l
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.l, v2.l, v2.h
; GFX1170-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.h, v3.l, v3.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX1170-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX1170-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX1170-GISEL-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v0
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v9, 16, v1
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v10, 16, v2
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v11, 16, v3
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v12, 16, v4
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v13, 16, v5
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v8, v8, v8
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v9, v9, v9
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v2, v2, v2
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v10, v10, v10
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v14, 16, v6
; GFX1170-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v15, 16, v7
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v8
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v1, v9
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v2, v2, v10
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v3, v3, v3
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v8, v11, v11
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v4, v4, v4
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v9, v12, v12
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v5, v5, v5
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v10, v13, v13
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v6, v6, v6
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v11, v14, v14
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v7, v7, v7
; GFX1170-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v12, v15, v15
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v3, v3, v8
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v4, v4, v9
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v5, v5, v10
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v6, v6, v11
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v7, v7, v12
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v2, v3
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v2, v4, v5
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v3, v6, v7
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v2, v3
; GFX1170-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX1170-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX12-SDAG-TRUE16:       ; %bb.0: ; %entry
; GFX12-SDAG-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX12-SDAG-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v1.l, v1.h
; GFX12-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v2.l, v2.h
; GFX12-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v3.l, v3.h
; GFX12-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v4.l, v4.h
; GFX12-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v5.l, v5.h
; GFX12-SDAG-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v6.l, v6.h
; GFX12-SDAG-TRUE16-NEXT:    v_min3_num_f16 v0.l, v0.l, v7.l, v7.h
; GFX12-SDAG-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX12-SDAG-FAKE16:       ; %bb.0: ; %entry
; GFX12-SDAG-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v0
; GFX12-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v9, 16, v1
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT:    v_max_num_f16_e32 v8, v8, v8
; GFX12-SDAG-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v8
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v2
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v1, v9
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v3
; GFX12-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v2, v8
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v4
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v3, v1
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v5
; GFX12-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v4, v2
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v6
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v5, v1
; GFX12-SDAG-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v7
; GFX12-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v6, v2
; GFX12-SDAG-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT:    v_min3_num_f16 v0, v0, v7, v1
; GFX12-SDAG-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX12-GISEL-TRUE16:       ; %bb.0: ; %entry
; GFX12-GISEL-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v0.h, v0.h, v0.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.l, v1.l, v1.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.h, v1.h, v1.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.h, v2.h, v2.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v1.h, v3.l, v3.l
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.l, v2.l, v2.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.l, v3.h, v3.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v2.h, v4.l, v4.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v3.l, v4.h, v4.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v3.h, v5.l, v5.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v4.l, v5.h, v5.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v4.h, v6.l, v6.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v5.l, v6.h, v6.h
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v5.h, v7.l, v7.l
; GFX12-GISEL-TRUE16-NEXT:    v_max_num_f16_e32 v6.l, v7.h, v7.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.h, v1.h, v2.l
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v2.l, v2.h, v3.l
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v2.h, v3.h, v4.l
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v3.l, v4.h, v5.l
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v3.h, v5.h, v6.l
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.l, v2.l, v2.h
; GFX12-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v1.h, v3.l, v3.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.h, v1.l, v1.h
; GFX12-GISEL-TRUE16-NEXT:    v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-GISEL-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX12-GISEL-FAKE16:       ; %bb.0: ; %entry
; GFX12-GISEL-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v0
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v9, 16, v1
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v10, 16, v2
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v11, 16, v3
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v12, 16, v4
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v13, 16, v5
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v0, v0, v0
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v8, v8, v8
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v1, v1, v1
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v9, v9, v9
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v2, v2, v2
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v10, v10, v10
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v14, 16, v6
; GFX12-GISEL-FAKE16-NEXT:    v_lshrrev_b32_e32 v15, 16, v7
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v8
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v1, v9
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v2, v2, v10
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v3, v3, v3
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v8, v11, v11
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v4, v4, v4
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v9, v12, v12
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v5, v5, v5
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v10, v13, v13
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v6, v6, v6
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v11, v14, v14
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v7, v7, v7
; GFX12-GISEL-FAKE16-NEXT:    v_max_num_f16_e32 v12, v15, v15
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v3, v3, v8
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v4, v4, v9
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v5, v5, v10
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v6, v6, v11
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v7, v7, v12
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v2, v3
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v2, v4, v5
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v3, v6, v7
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-GISEL-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v1, v2, v3
; GFX12-GISEL-FAKE16-NEXT:    v_min_num_f16_e32 v0, v0, v1
; GFX12-GISEL-FAKE16-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call half @llvm.vector.reduce.fmin.v16half(<16 x half> %v)
  ret half %res
}

define float @test_vector_reduce_fmin_v2float(<2 x float> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v2float:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX7-SDAG-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v2float:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v2float:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX8-SDAG-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX8-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v2float:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v2float:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX9-SDAG-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX9-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v2float:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX9-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v2float:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX10-SDAG-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX10-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v2float:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX10-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v2float:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v2float:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v2float:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v2float:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v2float:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v2float:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call float @llvm.vector.reduce.fmin.v2float(<2 x float> %v)
  ret float %res
}

define float @test_vector_reduce_fmin_v3float(<3 x float> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v3float:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v1, v2
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v3float:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v2
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v3float:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v1, v2
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v3float:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v2
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v3float:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v1, v2
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v3float:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX9-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_max_f32_e32 v1, v2, v2
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v3float:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v1, v2
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v3float:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX10-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_max_f32_e32 v1, v2, v2
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v3float:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v1, v2
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v3float:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_max_f32 v1, v2, v2
; GFX11-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v3float:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v1, v2
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v3float:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v2
; GFX1170-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v3float:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v1, v2
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v3float:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v2
; GFX12-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call float @llvm.vector.reduce.fmin.v3float(<3 x float> %v)
  ret float %res
}

define float @test_vector_reduce_fmin_v4float(<4 x float> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v4float:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX7-SDAG-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v4float:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v2
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v1, v2
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v4float:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX8-SDAG-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX8-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v4float:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v2
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v3
; GFX8-GISEL-NEXT:    v_min_f32_e32 v1, v1, v2
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v4float:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX9-SDAG-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX9-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v4float:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX9-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_max_f32_e32 v1, v2, v2
; GFX9-GISEL-NEXT:    v_max_f32_e32 v2, v3, v3
; GFX9-GISEL-NEXT:    v_min_f32_e32 v1, v1, v2
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v4float:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX10-SDAG-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX10-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v4float:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX10-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX10-GISEL-NEXT:    v_max_f32_e32 v2, v2, v2
; GFX10-GISEL-NEXT:    v_max_f32_e32 v3, v3, v3
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v4float:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v4float:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
; GFX11-GISEL-NEXT:    v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_min_f32 v1, v2, v3
; GFX11-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v4float:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v4float:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_min_num_f32 v1, v2, v3
; GFX1170-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v4float:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v4float:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_min_num_f32 v1, v2, v3
; GFX12-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call float @llvm.vector.reduce.fmin.v4float(<4 x float> %v)
  ret float %res
}

define float @test_vector_reduce_fmin_v8float(<8 x float> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v8float:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX7-SDAG-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v8float:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v2
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v1, v2
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v4
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v3, 1.0, v5
; GFX7-GISEL-NEXT:    v_min_f32_e32 v2, v2, v3
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v3, 1.0, v6
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v4, 1.0, v7
; GFX7-GISEL-NEXT:    v_min_f32_e32 v3, v3, v4
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v8float:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX8-SDAG-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX8-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v8float:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v2
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v3
; GFX8-GISEL-NEXT:    v_min_f32_e32 v1, v1, v2
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v4
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v3, 1.0, v5
; GFX8-GISEL-NEXT:    v_min_f32_e32 v2, v2, v3
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v3, 1.0, v6
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v4, 1.0, v7
; GFX8-GISEL-NEXT:    v_min_f32_e32 v3, v3, v4
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v8float:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX9-SDAG-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX9-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v8float:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX9-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_max_f32_e32 v1, v2, v2
; GFX9-GISEL-NEXT:    v_max_f32_e32 v2, v3, v3
; GFX9-GISEL-NEXT:    v_min_f32_e32 v1, v1, v2
; GFX9-GISEL-NEXT:    v_max_f32_e32 v2, v4, v4
; GFX9-GISEL-NEXT:    v_max_f32_e32 v3, v5, v5
; GFX9-GISEL-NEXT:    v_min_f32_e32 v2, v2, v3
; GFX9-GISEL-NEXT:    v_max_f32_e32 v3, v6, v6
; GFX9-GISEL-NEXT:    v_max_f32_e32 v4, v7, v7
; GFX9-GISEL-NEXT:    v_min_f32_e32 v3, v3, v4
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v8float:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX10-SDAG-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX10-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v8float:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX10-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX10-GISEL-NEXT:    v_max_f32_e32 v2, v2, v2
; GFX10-GISEL-NEXT:    v_max_f32_e32 v3, v3, v3
; GFX10-GISEL-NEXT:    v_max_f32_e32 v4, v4, v4
; GFX10-GISEL-NEXT:    v_max_f32_e32 v5, v5, v5
; GFX10-GISEL-NEXT:    v_max_f32_e32 v6, v6, v6
; GFX10-GISEL-NEXT:    v_max_f32_e32 v7, v7, v7
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX10-GISEL-NEXT:    v_min_f32_e32 v2, v4, v5
; GFX10-GISEL-NEXT:    v_min_f32_e32 v3, v6, v7
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v8float:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v8float:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
; GFX11-GISEL-NEXT:    v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
; GFX11-GISEL-NEXT:    v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
; GFX11-GISEL-NEXT:    v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-GISEL-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_min_f32 v1, v2, v3
; GFX11-GISEL-NEXT:    v_dual_min_f32 v2, v4, v5 :: v_dual_min_f32 v3, v6, v7
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_min_f32 v1, v2, v3
; GFX11-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v8float:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v4, v5
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v6, v7
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v8float:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_min_num_f32 v1, v2, v3
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v2, v4, v5 :: v_dual_min_num_f32 v3, v6, v7
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_min_num_f32 v1, v2, v3
; GFX1170-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v8float:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v4, v5
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v6, v7
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v8float:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_min_num_f32 v1, v2, v3
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v2, v4, v5 :: v_dual_min_num_f32 v3, v6, v7
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_min_num_f32 v1, v2, v3
; GFX12-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call float @llvm.vector.reduce.fmin.v8float(<8 x float> %v)
  ret float %res
}

define float @test_vector_reduce_fmin_v16float(<16 x float> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v16float:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX7-SDAG-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX7-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v8, v9
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v10, v11
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v12, v13
; GFX7-SDAG-NEXT:    v_min3_f32 v0, v0, v14, v15
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v16float:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v2
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v1, v2
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v4
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v3, 1.0, v5
; GFX7-GISEL-NEXT:    v_min_f32_e32 v2, v2, v3
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v3, 1.0, v6
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v4, 1.0, v7
; GFX7-GISEL-NEXT:    v_min_f32_e32 v3, v3, v4
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v4, 1.0, v8
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v5, 1.0, v9
; GFX7-GISEL-NEXT:    v_min_f32_e32 v4, v4, v5
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v5, 1.0, v10
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v6, 1.0, v11
; GFX7-GISEL-NEXT:    v_min_f32_e32 v5, v5, v6
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v6, 1.0, v12
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v7, 1.0, v13
; GFX7-GISEL-NEXT:    v_min_f32_e32 v6, v6, v7
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v7, 1.0, v14
; GFX7-GISEL-NEXT:    v_mul_f32_e32 v8, 1.0, v15
; GFX7-GISEL-NEXT:    v_min_f32_e32 v7, v7, v8
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v2, v4, v5
; GFX7-GISEL-NEXT:    v_min_f32_e32 v3, v6, v7
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX7-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v16float:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX8-SDAG-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX8-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v8, v9
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v10, v11
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v12, v13
; GFX8-SDAG-NEXT:    v_min3_f32 v0, v0, v14, v15
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v16float:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v0, 1.0, v0
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v1
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v1, 1.0, v2
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v3
; GFX8-GISEL-NEXT:    v_min_f32_e32 v1, v1, v2
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v2, 1.0, v4
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v3, 1.0, v5
; GFX8-GISEL-NEXT:    v_min_f32_e32 v2, v2, v3
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v3, 1.0, v6
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v4, 1.0, v7
; GFX8-GISEL-NEXT:    v_min_f32_e32 v3, v3, v4
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v4, 1.0, v8
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v5, 1.0, v9
; GFX8-GISEL-NEXT:    v_min_f32_e32 v4, v4, v5
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v5, 1.0, v10
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v6, 1.0, v11
; GFX8-GISEL-NEXT:    v_min_f32_e32 v5, v5, v6
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v6, 1.0, v12
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v7, 1.0, v13
; GFX8-GISEL-NEXT:    v_min_f32_e32 v6, v6, v7
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v7, 1.0, v14
; GFX8-GISEL-NEXT:    v_mul_f32_e32 v8, 1.0, v15
; GFX8-GISEL-NEXT:    v_min_f32_e32 v7, v7, v8
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX8-GISEL-NEXT:    v_min_f32_e32 v2, v4, v5
; GFX8-GISEL-NEXT:    v_min_f32_e32 v3, v6, v7
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX8-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v16float:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX9-SDAG-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX9-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v8, v9
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v10, v11
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v12, v13
; GFX9-SDAG-NEXT:    v_min3_f32 v0, v0, v14, v15
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v16float:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX9-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_max_f32_e32 v1, v2, v2
; GFX9-GISEL-NEXT:    v_max_f32_e32 v2, v3, v3
; GFX9-GISEL-NEXT:    v_min_f32_e32 v1, v1, v2
; GFX9-GISEL-NEXT:    v_max_f32_e32 v2, v4, v4
; GFX9-GISEL-NEXT:    v_max_f32_e32 v3, v5, v5
; GFX9-GISEL-NEXT:    v_min_f32_e32 v2, v2, v3
; GFX9-GISEL-NEXT:    v_max_f32_e32 v3, v6, v6
; GFX9-GISEL-NEXT:    v_max_f32_e32 v4, v7, v7
; GFX9-GISEL-NEXT:    v_min_f32_e32 v3, v3, v4
; GFX9-GISEL-NEXT:    v_max_f32_e32 v4, v8, v8
; GFX9-GISEL-NEXT:    v_max_f32_e32 v5, v9, v9
; GFX9-GISEL-NEXT:    v_min_f32_e32 v4, v4, v5
; GFX9-GISEL-NEXT:    v_max_f32_e32 v5, v10, v10
; GFX9-GISEL-NEXT:    v_max_f32_e32 v6, v11, v11
; GFX9-GISEL-NEXT:    v_min_f32_e32 v5, v5, v6
; GFX9-GISEL-NEXT:    v_max_f32_e32 v6, v12, v12
; GFX9-GISEL-NEXT:    v_max_f32_e32 v7, v13, v13
; GFX9-GISEL-NEXT:    v_min_f32_e32 v6, v6, v7
; GFX9-GISEL-NEXT:    v_max_f32_e32 v7, v14, v14
; GFX9-GISEL-NEXT:    v_max_f32_e32 v8, v15, v15
; GFX9-GISEL-NEXT:    v_min_f32_e32 v7, v7, v8
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX9-GISEL-NEXT:    v_min_f32_e32 v2, v4, v5
; GFX9-GISEL-NEXT:    v_min_f32_e32 v3, v6, v7
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX9-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v16float:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX10-SDAG-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX10-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v8, v9
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v10, v11
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v12, v13
; GFX10-SDAG-NEXT:    v_min3_f32 v0, v0, v14, v15
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v16float:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f32_e32 v0, v0, v0
; GFX10-GISEL-NEXT:    v_max_f32_e32 v1, v1, v1
; GFX10-GISEL-NEXT:    v_max_f32_e32 v2, v2, v2
; GFX10-GISEL-NEXT:    v_max_f32_e32 v3, v3, v3
; GFX10-GISEL-NEXT:    v_max_f32_e32 v4, v4, v4
; GFX10-GISEL-NEXT:    v_max_f32_e32 v5, v5, v5
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX10-GISEL-NEXT:    v_max_f32_e32 v3, v6, v6
; GFX10-GISEL-NEXT:    v_min_f32_e32 v2, v4, v5
; GFX10-GISEL-NEXT:    v_max_f32_e32 v4, v7, v7
; GFX10-GISEL-NEXT:    v_max_f32_e32 v5, v8, v8
; GFX10-GISEL-NEXT:    v_max_f32_e32 v6, v9, v9
; GFX10-GISEL-NEXT:    v_max_f32_e32 v7, v10, v10
; GFX10-GISEL-NEXT:    v_max_f32_e32 v8, v11, v11
; GFX10-GISEL-NEXT:    v_max_f32_e32 v9, v12, v12
; GFX10-GISEL-NEXT:    v_max_f32_e32 v10, v13, v13
; GFX10-GISEL-NEXT:    v_max_f32_e32 v11, v14, v14
; GFX10-GISEL-NEXT:    v_max_f32_e32 v12, v15, v15
; GFX10-GISEL-NEXT:    v_min_f32_e32 v3, v3, v4
; GFX10-GISEL-NEXT:    v_min_f32_e32 v4, v5, v6
; GFX10-GISEL-NEXT:    v_min_f32_e32 v5, v7, v8
; GFX10-GISEL-NEXT:    v_min_f32_e32 v6, v9, v10
; GFX10-GISEL-NEXT:    v_min_f32_e32 v7, v11, v12
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX10-GISEL-NEXT:    v_min_f32_e32 v2, v4, v5
; GFX10-GISEL-NEXT:    v_min_f32_e32 v3, v6, v7
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX10-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v16float:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v2, v3
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v4, v5
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v6, v7
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v8, v9
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v10, v11
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v12, v13
; GFX11-SDAG-NEXT:    v_min3_f32 v0, v0, v14, v15
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v16float:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
; GFX11-GISEL-NEXT:    v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
; GFX11-GISEL-NEXT:    v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-GISEL-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_min_f32 v1, v2, v3
; GFX11-GISEL-NEXT:    v_dual_max_f32 v3, v6, v6 :: v_dual_min_f32 v2, v4, v5
; GFX11-GISEL-NEXT:    v_dual_max_f32 v4, v7, v7 :: v_dual_max_f32 v5, v8, v8
; GFX11-GISEL-NEXT:    v_dual_max_f32 v6, v9, v9 :: v_dual_max_f32 v7, v10, v10
; GFX11-GISEL-NEXT:    v_dual_max_f32 v8, v11, v11 :: v_dual_max_f32 v9, v12, v12
; GFX11-GISEL-NEXT:    v_dual_max_f32 v10, v13, v13 :: v_dual_max_f32 v11, v14, v14
; GFX11-GISEL-NEXT:    v_max_f32_e32 v12, v15, v15
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-GISEL-NEXT:    v_dual_min_f32 v3, v3, v4 :: v_dual_min_f32 v4, v5, v6
; GFX11-GISEL-NEXT:    v_dual_min_f32 v5, v7, v8 :: v_dual_min_f32 v6, v9, v10
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-GISEL-NEXT:    v_dual_min_f32 v7, v11, v12 :: v_dual_min_f32 v0, v0, v1
; GFX11-GISEL-NEXT:    v_dual_min_f32 v1, v2, v3 :: v_dual_min_f32 v2, v4, v5
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_dual_min_f32 v3, v6, v7 :: v_dual_min_f32 v0, v0, v1
; GFX11-GISEL-NEXT:    v_min_f32_e32 v1, v2, v3
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_min_f32_e32 v0, v0, v1
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v16float:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v4, v5
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v6, v7
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v8, v9
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v10, v11
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v12, v13
; GFX1170-SDAG-NEXT:    v_min3_num_f32 v0, v0, v14, v15
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v16float:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_min_num_f32 v1, v2, v3
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v3, v6, v6 :: v_dual_min_num_f32 v2, v4, v5
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v4, v7, v7 :: v_dual_max_num_f32 v5, v8, v8
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v6, v9, v9 :: v_dual_max_num_f32 v7, v10, v10
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v8, v11, v11 :: v_dual_max_num_f32 v9, v12, v12
; GFX1170-GISEL-NEXT:    v_dual_max_num_f32 v10, v13, v13 :: v_dual_max_num_f32 v11, v14, v14
; GFX1170-GISEL-NEXT:    v_max_num_f32_e32 v12, v15, v15
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v3, v3, v4 :: v_dual_min_num_f32 v4, v5, v6
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v5, v7, v8 :: v_dual_min_num_f32 v6, v9, v10
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v7, v11, v12 :: v_dual_min_num_f32 v0, v0, v1
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v1, v2, v3 :: v_dual_min_num_f32 v2, v4, v5
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_dual_min_num_f32 v3, v6, v7 :: v_dual_min_num_f32 v0, v0, v1
; GFX1170-GISEL-NEXT:    v_min_num_f32_e32 v1, v2, v3
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v16float:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v4, v5
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v6, v7
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v8, v9
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v10, v11
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v12, v13
; GFX12-SDAG-NEXT:    v_min3_num_f32 v0, v0, v14, v15
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v16float:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v0, v0, v1 :: v_dual_min_num_f32 v1, v2, v3
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v3, v6, v6 :: v_dual_min_num_f32 v2, v4, v5
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v4, v7, v7 :: v_dual_max_num_f32 v5, v8, v8
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v6, v9, v9 :: v_dual_max_num_f32 v7, v10, v10
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v8, v11, v11 :: v_dual_max_num_f32 v9, v12, v12
; GFX12-GISEL-NEXT:    v_dual_max_num_f32 v10, v13, v13 :: v_dual_max_num_f32 v11, v14, v14
; GFX12-GISEL-NEXT:    v_max_num_f32_e32 v12, v15, v15
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v3, v3, v4 :: v_dual_min_num_f32 v4, v5, v6
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v5, v7, v8 :: v_dual_min_num_f32 v6, v9, v10
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v7, v11, v12 :: v_dual_min_num_f32 v0, v0, v1
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v1, v2, v3 :: v_dual_min_num_f32 v2, v4, v5
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_dual_min_num_f32 v3, v6, v7 :: v_dual_min_num_f32 v0, v0, v1
; GFX12-GISEL-NEXT:    v_min_num_f32_e32 v1, v2, v3
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call float @llvm.vector.reduce.fmin.v16float(<16 x float> %v)
  ret float %res
}

define double @test_vector_reduce_fmin_v2double(<2 x double> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v2double:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v2double:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v2double:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v2double:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v2double:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v2double:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v2double:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v2double:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v2double:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v2double:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v2double:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v2double:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v2double:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v2double:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call double @llvm.vector.reduce.fmin.v2double(<2 x double> %v)
  ret double %res
}

define double @test_vector_reduce_fmin_v3double(<3 x double> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v3double:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v3double:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v3double:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v3double:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v3double:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v3double:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v3double:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v3double:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v3double:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v3double:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v3double:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v3double:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v3double:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v3double:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call double @llvm.vector.reduce.fmin.v3double(<3 x double> %v)
  ret double %res
}

define double @test_vector_reduce_fmin_v4double(<4 x double> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v4double:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v4double:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX7-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v4double:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v4double:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX8-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v4double:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v4double:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX9-GISEL-NEXT:    v_max_f64 v[4:5], v[6:7], v[6:7]
; GFX9-GISEL-NEXT:    v_min_f64 v[2:3], v[2:3], v[4:5]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v4double:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v4double:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX10-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v4double:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v4double:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX11-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v4double:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[6:7], v[6:7]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v4double:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[6:7], v[6:7], v[6:7]
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[2:3], v[4:5], v[6:7]
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v4double:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[6:7], v[6:7]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v4double:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[2:3], v[4:5], v[6:7]
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call double @llvm.vector.reduce.fmin.v4double(<4 x double> %v)
  ret double %res
}

define double @test_vector_reduce_fmin_v8double(<8 x double> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v8double:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[6:7], v[6:7]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[8:9], v[8:9]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[10:11], v[10:11]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[12:13], v[12:13]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[14:15], v[14:15]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v8double:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX7-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX7-GISEL-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX7-GISEL-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX7-GISEL-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX7-GISEL-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX7-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX7-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v8double:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[6:7], v[6:7]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[8:9], v[8:9]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[10:11], v[10:11]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[12:13], v[12:13]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[14:15], v[14:15]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v8double:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX8-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX8-GISEL-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX8-GISEL-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX8-GISEL-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX8-GISEL-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX8-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX8-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v8double:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[8:9], v[8:9]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[10:11], v[10:11]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[12:13], v[12:13]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[14:15], v[14:15]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v8double:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX9-GISEL-NEXT:    v_max_f64 v[4:5], v[6:7], v[6:7]
; GFX9-GISEL-NEXT:    v_min_f64 v[2:3], v[2:3], v[4:5]
; GFX9-GISEL-NEXT:    v_max_f64 v[4:5], v[8:9], v[8:9]
; GFX9-GISEL-NEXT:    v_max_f64 v[6:7], v[10:11], v[10:11]
; GFX9-GISEL-NEXT:    v_min_f64 v[4:5], v[4:5], v[6:7]
; GFX9-GISEL-NEXT:    v_max_f64 v[6:7], v[12:13], v[12:13]
; GFX9-GISEL-NEXT:    v_max_f64 v[8:9], v[14:15], v[14:15]
; GFX9-GISEL-NEXT:    v_min_f64 v[6:7], v[6:7], v[8:9]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v8double:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[8:9], v[8:9]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[10:11], v[10:11]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[12:13], v[12:13]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[14:15], v[14:15]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v8double:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX10-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX10-GISEL-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX10-GISEL-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX10-GISEL-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX10-GISEL-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX10-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX10-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v8double:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[8:9], v[8:9]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[10:11], v[10:11]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[12:13], v[12:13]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[14:15], v[14:15]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v8double:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX11-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX11-GISEL-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX11-GISEL-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX11-GISEL-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX11-GISEL-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX11-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v8double:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[6:7], v[6:7]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[8:9], v[8:9]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[10:11], v[10:11]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[12:13], v[12:13]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[14:15], v[14:15]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v8double:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[6:7], v[6:7], v[6:7]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[8:9], v[8:9], v[8:9]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[10:11], v[10:11], v[10:11]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[12:13], v[12:13], v[12:13]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[14:15], v[14:15], v[14:15]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[2:3], v[4:5], v[6:7]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[4:5], v[8:9], v[10:11]
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[6:7], v[12:13], v[14:15]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[2:3], v[4:5], v[6:7]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v8double:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[6:7], v[6:7]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[8:9], v[8:9]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[10:11], v[10:11]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[12:13], v[12:13]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[14:15], v[14:15]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v8double:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[12:13], v[12:13], v[12:13]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[14:15], v[14:15], v[14:15]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[2:3], v[4:5], v[6:7]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[4:5], v[8:9], v[10:11]
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[6:7], v[12:13], v[14:15]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[2:3], v[4:5], v[6:7]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call double @llvm.vector.reduce.fmin.v8double(<8 x double> %v)
  ret double %res
}

define double @test_vector_reduce_fmin_v16double(<16 x double> %v) {
; GFX7-SDAG-LABEL: test_vector_reduce_fmin_v16double:
; GFX7-SDAG:       ; %bb.0: ; %entry
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-SDAG-NEXT:    buffer_load_dword v31, off, s[0:3], s32
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[12:13], v[12:13]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[8:9], v[8:9]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[10:11], v[10:11]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[14:15], v[14:15]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[16:17], v[16:17]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[18:19], v[18:19]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[20:21], v[20:21]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[22:23], v[22:23]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[24:25], v[24:25]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[26:27], v[26:27]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    v_max_f64 v[4:5], v[28:29], v[28:29]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    s_waitcnt vmcnt(0)
; GFX7-SDAG-NEXT:    v_max_f64 v[2:3], v[30:31], v[30:31]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX7-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: test_vector_reduce_fmin_v16double:
; GFX7-GISEL:       ; %bb.0: ; %entry
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT:    buffer_load_dword v31, off, s[0:3], s32
; GFX7-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX7-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX7-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX7-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX7-GISEL-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX7-GISEL-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX7-GISEL-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX7-GISEL-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX7-GISEL-NEXT:    v_max_f64 v[16:17], v[16:17], v[16:17]
; GFX7-GISEL-NEXT:    v_max_f64 v[18:19], v[18:19], v[18:19]
; GFX7-GISEL-NEXT:    v_max_f64 v[20:21], v[20:21], v[20:21]
; GFX7-GISEL-NEXT:    v_max_f64 v[22:23], v[22:23], v[22:23]
; GFX7-GISEL-NEXT:    v_max_f64 v[24:25], v[24:25], v[24:25]
; GFX7-GISEL-NEXT:    v_max_f64 v[26:27], v[26:27], v[26:27]
; GFX7-GISEL-NEXT:    v_max_f64 v[28:29], v[28:29], v[28:29]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX7-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX7-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX7-GISEL-NEXT:    v_min_f64 v[8:9], v[16:17], v[18:19]
; GFX7-GISEL-NEXT:    v_min_f64 v[10:11], v[20:21], v[22:23]
; GFX7-GISEL-NEXT:    v_min_f64 v[12:13], v[24:25], v[26:27]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX7-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    s_waitcnt vmcnt(0)
; GFX7-GISEL-NEXT:    v_max_f64 v[30:31], v[30:31], v[30:31]
; GFX7-GISEL-NEXT:    v_min_f64 v[14:15], v[28:29], v[30:31]
; GFX7-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX7-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX7-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: test_vector_reduce_fmin_v16double:
; GFX8-SDAG:       ; %bb.0: ; %entry
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-SDAG-NEXT:    buffer_load_dword v31, off, s[0:3], s32
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[4:5], v[4:5]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[12:13], v[12:13]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[8:9], v[8:9]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[10:11], v[10:11]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[14:15], v[14:15]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[16:17], v[16:17]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[18:19], v[18:19]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[20:21], v[20:21]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[22:23], v[22:23]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[24:25], v[24:25]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[26:27], v[26:27]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    v_max_f64 v[4:5], v[28:29], v[28:29]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    s_waitcnt vmcnt(0)
; GFX8-SDAG-NEXT:    v_max_f64 v[2:3], v[30:31], v[30:31]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX8-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_vector_reduce_fmin_v16double:
; GFX8-GISEL:       ; %bb.0: ; %entry
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT:    buffer_load_dword v31, off, s[0:3], s32
; GFX8-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX8-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX8-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX8-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX8-GISEL-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX8-GISEL-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX8-GISEL-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX8-GISEL-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX8-GISEL-NEXT:    v_max_f64 v[16:17], v[16:17], v[16:17]
; GFX8-GISEL-NEXT:    v_max_f64 v[18:19], v[18:19], v[18:19]
; GFX8-GISEL-NEXT:    v_max_f64 v[20:21], v[20:21], v[20:21]
; GFX8-GISEL-NEXT:    v_max_f64 v[22:23], v[22:23], v[22:23]
; GFX8-GISEL-NEXT:    v_max_f64 v[24:25], v[24:25], v[24:25]
; GFX8-GISEL-NEXT:    v_max_f64 v[26:27], v[26:27], v[26:27]
; GFX8-GISEL-NEXT:    v_max_f64 v[28:29], v[28:29], v[28:29]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX8-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX8-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX8-GISEL-NEXT:    v_min_f64 v[8:9], v[16:17], v[18:19]
; GFX8-GISEL-NEXT:    v_min_f64 v[10:11], v[20:21], v[22:23]
; GFX8-GISEL-NEXT:    v_min_f64 v[12:13], v[24:25], v[26:27]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX8-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    s_waitcnt vmcnt(0)
; GFX8-GISEL-NEXT:    v_max_f64 v[30:31], v[30:31], v[30:31]
; GFX8-GISEL-NEXT:    v_min_f64 v[14:15], v[28:29], v[30:31]
; GFX8-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX8-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX8-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_vector_reduce_fmin_v16double:
; GFX9-SDAG:       ; %bb.0: ; %entry
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT:    scratch_load_dword v31, off, s32
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX9-SDAG-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[6:7]
; GFX9-SDAG-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[8:9]
; GFX9-SDAG-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[10:11]
; GFX9-SDAG-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[12:13]
; GFX9-SDAG-NEXT:    v_max_f64 v[16:17], v[16:17], v[16:17]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[14:15]
; GFX9-SDAG-NEXT:    v_max_f64 v[18:19], v[18:19], v[18:19]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[16:17]
; GFX9-SDAG-NEXT:    v_max_f64 v[20:21], v[20:21], v[20:21]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[18:19]
; GFX9-SDAG-NEXT:    v_max_f64 v[22:23], v[22:23], v[22:23]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[20:21]
; GFX9-SDAG-NEXT:    v_max_f64 v[24:25], v[24:25], v[24:25]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[22:23]
; GFX9-SDAG-NEXT:    v_max_f64 v[26:27], v[26:27], v[26:27]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[24:25]
; GFX9-SDAG-NEXT:    v_max_f64 v[28:29], v[28:29], v[28:29]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[26:27]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[28:29]
; GFX9-SDAG-NEXT:    s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT:    v_max_f64 v[2:3], v[30:31], v[30:31]
; GFX9-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_vector_reduce_fmin_v16double:
; GFX9-GISEL:       ; %bb.0: ; %entry
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT:    scratch_load_dword v31, off, s32
; GFX9-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX9-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX9-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX9-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX9-GISEL-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX9-GISEL-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX9-GISEL-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX9-GISEL-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX9-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX9-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX9-GISEL-NEXT:    v_max_f64 v[16:17], v[16:17], v[16:17]
; GFX9-GISEL-NEXT:    v_max_f64 v[18:19], v[18:19], v[18:19]
; GFX9-GISEL-NEXT:    v_max_f64 v[20:21], v[20:21], v[20:21]
; GFX9-GISEL-NEXT:    v_max_f64 v[22:23], v[22:23], v[22:23]
; GFX9-GISEL-NEXT:    v_max_f64 v[24:25], v[24:25], v[24:25]
; GFX9-GISEL-NEXT:    v_max_f64 v[26:27], v[26:27], v[26:27]
; GFX9-GISEL-NEXT:    v_max_f64 v[28:29], v[28:29], v[28:29]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[8:9], v[16:17], v[18:19]
; GFX9-GISEL-NEXT:    v_min_f64 v[10:11], v[20:21], v[22:23]
; GFX9-GISEL-NEXT:    v_min_f64 v[12:13], v[24:25], v[26:27]
; GFX9-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX9-GISEL-NEXT:    s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT:    v_max_f64 v[2:3], v[30:31], v[30:31]
; GFX9-GISEL-NEXT:    v_min_f64 v[2:3], v[28:29], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[2:3], v[12:13], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[2:3]
; GFX9-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: test_vector_reduce_fmin_v16double:
; GFX10-SDAG:       ; %bb.0: ; %entry
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT:    buffer_load_dword v31, off, s[0:3], s32
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[8:9], v[8:9]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[10:11], v[10:11]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[12:13], v[12:13]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[14:15], v[14:15]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[16:17], v[16:17]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[18:19], v[18:19]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[20:21], v[20:21]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[22:23], v[22:23]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[24:25], v[24:25]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[26:27], v[26:27]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    v_max_f64 v[4:5], v[28:29], v[28:29]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX10-SDAG-NEXT:    s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT:    v_max_f64 v[2:3], v[30:31], v[30:31]
; GFX10-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: test_vector_reduce_fmin_v16double:
; GFX10-GISEL:       ; %bb.0: ; %entry
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT:    buffer_load_dword v31, off, s[0:3], s32
; GFX10-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX10-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX10-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX10-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX10-GISEL-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX10-GISEL-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX10-GISEL-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX10-GISEL-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX10-GISEL-NEXT:    v_max_f64 v[16:17], v[16:17], v[16:17]
; GFX10-GISEL-NEXT:    v_max_f64 v[18:19], v[18:19], v[18:19]
; GFX10-GISEL-NEXT:    v_max_f64 v[20:21], v[20:21], v[20:21]
; GFX10-GISEL-NEXT:    v_max_f64 v[22:23], v[22:23], v[22:23]
; GFX10-GISEL-NEXT:    v_max_f64 v[24:25], v[24:25], v[24:25]
; GFX10-GISEL-NEXT:    v_max_f64 v[26:27], v[26:27], v[26:27]
; GFX10-GISEL-NEXT:    v_max_f64 v[28:29], v[28:29], v[28:29]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX10-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX10-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX10-GISEL-NEXT:    v_min_f64 v[8:9], v[16:17], v[18:19]
; GFX10-GISEL-NEXT:    v_min_f64 v[10:11], v[20:21], v[22:23]
; GFX10-GISEL-NEXT:    v_min_f64 v[12:13], v[24:25], v[26:27]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX10-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT:    v_max_f64 v[30:31], v[30:31], v[30:31]
; GFX10-GISEL-NEXT:    v_min_f64 v[14:15], v[28:29], v[30:31]
; GFX10-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX10-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX10-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: test_vector_reduce_fmin_v16double:
; GFX11-SDAG:       ; %bb.0: ; %entry
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX11-SDAG-NEXT:    scratch_load_b32 v31, off, s32
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[6:7], v[6:7]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[8:9], v[8:9]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[10:11], v[10:11]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[12:13], v[12:13]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[14:15], v[14:15]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[16:17], v[16:17]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[18:19], v[18:19]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[20:21], v[20:21]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[22:23], v[22:23]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[24:25], v[24:25]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[26:27], v[26:27]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    v_max_f64 v[4:5], v[28:29], v[28:29]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT:    v_max_f64 v[2:3], v[30:31], v[30:31]
; GFX11-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[4:5]
; GFX11-SDAG-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_vector_reduce_fmin_v16double:
; GFX11-GISEL:       ; %bb.0: ; %entry
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT:    scratch_load_b32 v31, off, s32
; GFX11-GISEL-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-GISEL-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-GISEL-NEXT:    v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX11-GISEL-NEXT:    v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX11-GISEL-NEXT:    v_max_f64 v[8:9], v[8:9], v[8:9]
; GFX11-GISEL-NEXT:    v_max_f64 v[10:11], v[10:11], v[10:11]
; GFX11-GISEL-NEXT:    v_max_f64 v[12:13], v[12:13], v[12:13]
; GFX11-GISEL-NEXT:    v_max_f64 v[14:15], v[14:15], v[14:15]
; GFX11-GISEL-NEXT:    v_max_f64 v[16:17], v[16:17], v[16:17]
; GFX11-GISEL-NEXT:    v_max_f64 v[18:19], v[18:19], v[18:19]
; GFX11-GISEL-NEXT:    v_max_f64 v[20:21], v[20:21], v[20:21]
; GFX11-GISEL-NEXT:    v_max_f64 v[22:23], v[22:23], v[22:23]
; GFX11-GISEL-NEXT:    v_max_f64 v[24:25], v[24:25], v[24:25]
; GFX11-GISEL-NEXT:    v_max_f64 v[26:27], v[26:27], v[26:27]
; GFX11-GISEL-NEXT:    v_max_f64 v[28:29], v[28:29], v[28:29]
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX11-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX11-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX11-GISEL-NEXT:    v_min_f64 v[8:9], v[16:17], v[18:19]
; GFX11-GISEL-NEXT:    v_min_f64 v[10:11], v[20:21], v[22:23]
; GFX11-GISEL-NEXT:    v_min_f64 v[12:13], v[24:25], v[26:27]
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-GISEL-NEXT:    v_min_f64 v[4:5], v[8:9], v[10:11]
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT:    v_max_f64 v[30:31], v[30:31], v[30:31]
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_min_f64 v[14:15], v[28:29], v[30:31]
; GFX11-GISEL-NEXT:    v_min_f64 v[6:7], v[12:13], v[14:15]
; GFX11-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT:    v_min_f64 v[2:3], v[4:5], v[6:7]
; GFX11-GISEL-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v16double:
; GFX1170-SDAG:       ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-SDAG-NEXT:    scratch_load_b32 v31, off, s32
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[6:7], v[6:7]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[8:9], v[8:9]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[10:11], v[10:11]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[12:13], v[12:13]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[14:15], v[14:15]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[16:17], v[16:17]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[18:19], v[18:19]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[20:21], v[20:21]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[22:23], v[22:23]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[24:25], v[24:25]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[26:27], v[26:27]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[4:5], v[28:29], v[28:29]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    s_waitcnt vmcnt(0)
; GFX1170-SDAG-NEXT:    v_max_num_f64 v[2:3], v[30:31], v[30:31]
; GFX1170-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v16double:
; GFX1170-GISEL:       ; %bb.0: ; %entry
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-GISEL-NEXT:    scratch_load_b32 v31, off, s32
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[0:1], v[0:1], v[0:1]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[2:3], v[2:3], v[2:3]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[6:7], v[6:7], v[6:7]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[8:9], v[8:9], v[8:9]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[10:11], v[10:11], v[10:11]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[12:13], v[12:13], v[12:13]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[14:15], v[14:15], v[14:15]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[16:17], v[16:17], v[16:17]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[18:19], v[18:19], v[18:19]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[20:21], v[20:21], v[20:21]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[22:23], v[22:23], v[22:23]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[24:25], v[24:25], v[24:25]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[26:27], v[26:27], v[26:27]
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[28:29], v[28:29], v[28:29]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[2:3], v[4:5], v[6:7]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[4:5], v[8:9], v[10:11]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[6:7], v[12:13], v[14:15]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[8:9], v[16:17], v[18:19]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[10:11], v[20:21], v[22:23]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[12:13], v[24:25], v[26:27]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[2:3], v[4:5], v[6:7]
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[4:5], v[8:9], v[10:11]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    s_waitcnt vmcnt(0)
; GFX1170-GISEL-NEXT:    v_max_num_f64 v[30:31], v[30:31], v[30:31]
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[14:15], v[28:29], v[30:31]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[6:7], v[12:13], v[14:15]
; GFX1170-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[2:3], v[4:5], v[6:7]
; GFX1170-GISEL-NEXT:    v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-GISEL-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_vector_reduce_fmin_v16double:
; GFX12-SDAG:       ; %bb.0: ; %entry
; GFX12-SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT:    s_wait_expcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT:    s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT:    s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-SDAG-NEXT:    scratch_load_b32 v31, off, s32
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[6:7], v[6:7]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[8:9], v[8:9]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[10:11], v[10:11]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[12:13], v[12:13]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[14:15], v[14:15]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[16:17], v[16:17]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[18:19], v[18:19]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[20:21], v[20:21]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[22:23], v[22:23]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[24:25], v[24:25]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[26:27], v[26:27]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[4:5], v[28:29], v[28:29]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT:    v_max_num_f64_e32 v[2:3], v[30:31], v[30:31]
; GFX12-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v16double:
; GFX12-GISEL:       ; %bb.0: ; %entry
; GFX12-GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT:    s_wait_expcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT:    s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT:    s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT:    scratch_load_b32 v31, off, s32
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[12:13], v[12:13], v[12:13]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[14:15], v[14:15], v[14:15]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[16:17], v[16:17], v[16:17]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[18:19], v[18:19], v[18:19]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[20:21], v[20:21], v[20:21]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[22:23], v[22:23], v[22:23]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[24:25], v[24:25], v[24:25]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[26:27], v[26:27], v[26:27]
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[28:29], v[28:29], v[28:29]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[2:3], v[4:5], v[6:7]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[4:5], v[8:9], v[10:11]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[6:7], v[12:13], v[14:15]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[8:9], v[16:17], v[18:19]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[10:11], v[20:21], v[22:23]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[12:13], v[24:25], v[26:27]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[2:3], v[4:5], v[6:7]
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[4:5], v[8:9], v[10:11]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT:    v_max_num_f64_e32 v[30:31], v[30:31], v[30:31]
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[14:15], v[28:29], v[30:31]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[6:7], v[12:13], v[14:15]
; GFX12-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[2:3], v[4:5], v[6:7]
; GFX12-GISEL-NEXT:    v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT:    s_setpc_b64 s[30:31]
entry:
  %res = call double @llvm.vector.reduce.fmin.v16double(<16 x double> %v)
  ret double %res
}

declare half @llvm.vector.reduce.fmin.v2half(<2 x half>)
declare half @llvm.vector.reduce.fmin.v3half(<3 x half>)
declare half @llvm.vector.reduce.fmin.v4half(<4 x half>)
declare half @llvm.vector.reduce.fmin.v8half(<8 x half>)
declare half @llvm.vector.reduce.fmin.v16half(<16 x half>)
declare float @llvm.vector.reduce.fmin.v2float(<2 x float>)
declare float @llvm.vector.reduce.fmin.v3float(<3 x float>)
declare float @llvm.vector.reduce.fmin.v4float(<4 x float>)
declare float @llvm.vector.reduce.fmin.v8float(<8 x float>)
declare float @llvm.vector.reduce.fmin.v16float(<16 x float>)
declare double @llvm.vector.reduce.fmin.v2double(<2 x double>)
declare double @llvm.vector.reduce.fmin.v3double(<3 x double>)
declare double @llvm.vector.reduce.fmin.v4double(<4 x double>)
declare double @llvm.vector.reduce.fmin.v8double(<8 x double>)
declare double @llvm.vector.reduce.fmin.v16double(<16 x double>)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFX10: {{.*}}
; GFX11: {{.*}}
; GFX1170: {{.*}}
; GFX12: {{.*}}
; GFX8: {{.*}}
; GFX9: {{.*}}