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llvm/llvm-project/b7bd84ff2a30e08e7f1bd2b36db5f8ec9ba300ee/./llvm/test/Transforms/AggressiveInstCombine
tree: 0be7cbe7bf55f07a334ed24f51cdeaae3fd13a85
  1. AArch64/
  2. AMDGPU/
  3. ARM/
  4. RISCV/
  5. X86/
  6. dbgloc-memchr.ll
  7. fold-split-ctlz.ll
  8. fold-split-cttz.ll
  9. funnel.ll
  10. inline-strcmp-debugloc.ll
  11. logic-combine.ll
  12. lower-table-based-cttz-basics.ll
  13. lower-table-based-cttz-dereferencing-pointer.ll
  14. lower-table-based-cttz-non-argument-value.ll
  15. lower-table-based-cttz-zero-element.ll
  16. lower-table-based-lowbits-mask-n32.ll
  17. lower-table-based-lowbits-mask.ll
  18. masked-cmp.ll
  19. memchr.ll
  20. memset.ll
  21. negative-lower-table-based-cttz.ll
  22. or-shift-chain.ll
  23. patterned-load.ll
  24. popcount.ll
  25. pr50555.ll
  26. rotate.ll
  27. strncmp-1.ll
  28. strncmp-2.ll
  29. trunc_ashr.ll
  30. trunc_assume.ll
  31. trunc_const_expr.ll
  32. trunc_illegal_type.ll
  33. trunc_lshr.ll
  34. trunc_multi_uses.ll
  35. trunc_phi.ll
  36. trunc_select.ll
  37. trunc_select_cmp.ll
  38. trunc_shl.ll
  39. trunc_udivrem.ll
  40. trunc_umin_umax.ll
  41. trunc_unreachable_bb.ll
  42. trunc_vector_instrs.ll
  43. umulh_carry.ll
  44. umulh_carry4.ll
  45. umulh_ladder.ll
  46. umulh_ladder4.ll
  47. vector-or-load.ll