llvm/test/CodeGen/RISCV/add_shl_constant.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=riscv32  < %s | FileCheck -check-prefix=RV32 %s

define i32 @add_shl_oneUse(i32 %x, i32 %y) nounwind {
; RV32-LABEL: add_shl_oneUse:
; RV32:       # %bb.0:
; RV32-NEXT:    slli a0, a0, 3
; RV32-NEXT:    add a0, a0, a1
; RV32-NEXT:    addi a0, a0, 984
; RV32-NEXT:    ret
  %add.0 = add i32 %x, 123
  %shl = shl i32 %add.0, 3
  %add.1 = add i32 %shl, %y
  ret i32 %add.1
}

define void @add_shl_moreOneUse_inStore(ptr %array1, i32 %a, i32 %b)  {
; RV32-LABEL: add_shl_moreOneUse_inStore:
; RV32:       # %bb.0: # %entry
; RV32-NEXT:    addi a3, a1, 5
; RV32-NEXT:    slli a1, a1, 2
; RV32-NEXT:    add a0, a0, a1
; RV32-NEXT:    sw a2, 20(a0)
; RV32-NEXT:    sw a2, 24(a0)
; RV32-NEXT:    sw a3, 140(a0)
; RV32-NEXT:    ret
entry:
  %add = add nsw i32 %a, 5
  %arrayidx = getelementptr inbounds i32, ptr %array1, i32 %add
  store i32 %b, ptr %arrayidx
  %0 = getelementptr i32, ptr %array1, i32 %a
  %arrayidx3 = getelementptr i8, ptr %0, i32 24
  store i32 %b, ptr %arrayidx3
  %arrayidx5 = getelementptr i8, ptr %0, i32 140
  store i32 %add, ptr %arrayidx5
  ret void
}

define void @add_shl_moreOneUse_inStore_addexceedsign12(ptr %array1, i32 %a, i32 %b)  {
; RV32-LABEL: add_shl_moreOneUse_inStore_addexceedsign12:
; RV32:       # %bb.0: # %entry
; RV32-NEXT:    addi a3, a1, 2047
; RV32-NEXT:    lui a4, 2
; RV32-NEXT:    slli a1, a1, 2
; RV32-NEXT:    addi a3, a3, 1
; RV32-NEXT:    add a0, a0, a1
; RV32-NEXT:    add a0, a0, a4
; RV32-NEXT:    sw a2, 0(a0)
; RV32-NEXT:    sw a3, 4(a0)
; RV32-NEXT:    sw a2, 120(a0)
; RV32-NEXT:    ret
entry:
  %add = add nsw i32 %a, 2048
  %arrayidx = getelementptr inbounds i32, ptr %array1, i32 %add
  store i32 %b, ptr %arrayidx
  %0 = getelementptr i32, ptr %array1, i32 %a
  %arrayidx2 = getelementptr i8, ptr %0, i32 8196
  store i32 %add, ptr %arrayidx2
  %arrayidx4 = getelementptr i8, ptr %0, i32 8312
  store i32 %b, ptr %arrayidx4
  ret void
}

define void @add_shl_moreOneUse_inSelect(ptr %array1, i32 %a, i32 %b, i32 %x) {
; RV32-LABEL: add_shl_moreOneUse_inSelect:
; RV32:       # %bb.0: # %entry
; RV32-NEXT:    addi a4, a1, 5
; RV32-NEXT:    mv a5, a4
; RV32-NEXT:    bgtz a3, .LBB3_2
; RV32-NEXT:  # %bb.1: # %entry
; RV32-NEXT:    mv a5, a2
; RV32-NEXT:  .LBB3_2: # %entry
; RV32-NEXT:    slli a1, a1, 2
; RV32-NEXT:    add a0, a0, a1
; RV32-NEXT:    sw a5, 20(a0)
; RV32-NEXT:    sw a5, 24(a0)
; RV32-NEXT:    sw a4, 140(a0)
; RV32-NEXT:    ret
entry:
  %add = add nsw i32 %a, 5
  %cmp = icmp sgt i32 %x, 0
  %cond = select i1 %cmp, i32 %add, i32 %b
  %arrayidx = getelementptr inbounds i32, ptr %array1, i32 %add
  store i32 %cond, ptr %arrayidx
  %0 = getelementptr i32, ptr %array1, i32 %a
  %arrayidx2 = getelementptr i32, ptr %0, i32 6
  store i32 %cond, ptr %arrayidx2
  %arrayidx4 = getelementptr i32, ptr %0, i32 35
  store i32 %add, ptr %arrayidx4
  ret void
}

define void @add_shl_moreOneUse_inSelect_addexceedsign12(ptr %array1, i32 %a, i32 %b, i32 %x) {
; RV32-LABEL: add_shl_moreOneUse_inSelect_addexceedsign12:
; RV32:       # %bb.0: # %entry
; RV32-NEXT:    addi a4, a1, 2047
; RV32-NEXT:    addi a4, a4, 1
; RV32-NEXT:    mv a5, a4
; RV32-NEXT:    bgtz a3, .LBB4_2
; RV32-NEXT:  # %bb.1: # %entry
; RV32-NEXT:    mv a5, a2
; RV32-NEXT:  .LBB4_2: # %entry
; RV32-NEXT:    lui a2, 2
; RV32-NEXT:    slli a1, a1, 2
; RV32-NEXT:    add a0, a0, a1
; RV32-NEXT:    add a0, a0, a2
; RV32-NEXT:    sw a5, 0(a0)
; RV32-NEXT:    sw a5, 4(a0)
; RV32-NEXT:    sw a4, 120(a0)
; RV32-NEXT:    ret
entry:
  %add = add nsw i32 %a, 2048
  %cmp = icmp sgt i32 %x, 0
  %spec.select = select i1 %cmp, i32 %add, i32 %b
  %0 = getelementptr inbounds i32, ptr %array1, i32 %add
  store i32 %spec.select, ptr %0, align 4
  %1 = getelementptr i32, ptr %array1, i32 %a
  %arrayidx4 = getelementptr i8, ptr %1, i32 8196
  store i32 %spec.select, ptr %arrayidx4
  %arrayidx6 = getelementptr i8, ptr %1, i32 8312
  store i32 %add, ptr %arrayidx6
  ret void
}