)]}'
{
  "commit": "b563e763065deb0bb5365a3dbdab283ae852dc7e",
  "tree": "ec1fad35917af9c8e3b2524f1674e0caafd7882e",
  "parents": [
    "597ee882a5575987b63d82805e3bbaf3cedc7cc5"
  ],
  "author": {
    "name": "Ricardo Jesus",
    "email": "rjj@nvidia.com",
    "time": "Mon Jun 30 09:04:45 2025 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon Jun 30 09:04:45 2025 +0100"
  },
  "message": "[AArch64] Improve scalar and Neon popcount with SVE CNT. (#143870)\n\nWhen available, we can use SVE\u0027s CNT instruction to improve the lowering\nof scalar and fixed-length popcount (CTPOP) since the SVE instruction\nsupports types that the Neon variant doesn\u0027t.\n\nFor the scalar types, I see the following speedups on NVIDIA Grace CPU:\n| size (bits) | before (Gibit/s) | after (Gibit/s) | speedup |\n|------------:|-----------------:|----------------:|--------:|\n|         32  |           75.20  |          86.79  |   1.15  |\n|         64  |          149.87  |         173.70  |   1.16  |\n|        128  |          158.56  |         164.88  |   1.04  |\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c8b1eafd35495aa0c73bfe193d62977575be5949",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AArch64/AArch64ISelLowering.cpp",
      "new_id": "fb8bd81c033aff1d6b14d6e6b7868a43ecd54fd0",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AArch64/AArch64ISelLowering.cpp"
    },
    {
      "type": "modify",
      "old_id": "c158d8ad93b055e8e45faac044d118938d1a3242",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AArch64/popcount.ll",
      "new_id": "3900910c103188ab80f41b15e39c7b3aed770697",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AArch64/popcount.ll"
    },
    {
      "type": "modify",
      "old_id": "1e71c4b66156cb6ce25eb939a0f3f4d0ded4caf2",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AArch64/sve-fixed-length-bit-counting.ll",
      "new_id": "b62b850434469cb571dea31a38c366f081a4fb31",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AArch64/sve-fixed-length-bit-counting.ll"
    }
  ]
}