)]}'
{
  "commit": "afd42fb3038904e8c09c0fb735e713bc052ec0e4",
  "tree": "b8299e779e5afa33605984786dd3d02a0fa05a16",
  "parents": [
    "248e88523518ae66a20d02bd3636cd0a15453958"
  ],
  "author": {
    "name": "Brox Chen",
    "email": "broxigarchen@outlook.com",
    "time": "Tue Aug 13 12:23:39 2024 -0400"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Tue Aug 13 12:23:39 2024 -0400"
  },
  "message": "[AMDGPU][True16][CodeGen] Support AND/OR/XOR and LDEXP True16 format (#102620)\n\nSupport AND/OR/XOR true16 and LDEXP true/fake16 format.\r\n\r\nThese instructions are previously implemented with fake16 profile.\r\nFixing the implementation.\r\n\r\nAdded a RA hint so that when using 16bit register in a 32bit\r\ninstruction, try to use the register directly without an extra 16bit\r\nmove\r\n\r\n---------\r\n\r\nCo-authored-by: guochen2 \u003cguochen2@amd.com\u003e",
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