[aarch64][globalisel] Legalize G_ATOMIC_CMPXCHG_WITH_SUCCESS and G_ATOMICRMW_*
G_ATOMICRMW_* is generally legal on AArch64. The exception is G_ATOMICRMW_NAND.
G_ATOMIC_CMPXCHG_WITH_SUCCESS needs to be lowered to G_ATOMIC_CMPXCHG with an
external comparison.
Note that IRTranslator doesn't generate these instructions yet.
llvm-svn: 319466
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index bb2e615..53d6758 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -868,6 +868,18 @@
MI.eraseFromParent();
return Legalized;
}
+ case TargetOpcode::G_ATOMIC_CMPXCHG_WITH_SUCCESS: {
+ unsigned OldValRes = MI.getOperand(0).getReg();
+ unsigned SuccessRes = MI.getOperand(1).getReg();
+ unsigned Addr = MI.getOperand(2).getReg();
+ unsigned CmpVal = MI.getOperand(3).getReg();
+ unsigned NewVal = MI.getOperand(4).getReg();
+ MIRBuilder.buildAtomicCmpXchg(OldValRes, Addr, CmpVal, NewVal,
+ **MI.memoperands_begin());
+ MIRBuilder.buildICmp(CmpInst::ICMP_EQ, SuccessRes, OldValRes, CmpVal);
+ MI.eraseFromParent();
+ return Legalized;
+ }
}
}